Bus System
In Computer architecture, a bus is a collection of wires, chips and slots inside the
computer through which data are transmitted from one part of the computer to
another. It is often compared to a highway as data; control signal and memory
address can be transferred through this.
Figure 1 Bus system
1. Data Bus
The data bus is responsible for carrying the actual data between the CPU, memory,
and peripherals. The data bus is bidirectional, meaning it can carry data in both
directions from the CPU to memory or an I/O device, and vice versa. This allows
for the transfer of both read and write operations. The width of the data bus (often
called the word size) often determines the amount of data a CPU can process at
once. For example, a 32-bit data bus can transfer 32 bits of data in a single
operation.
This is a bi-directional bus, because data can flow to or from the CPU. The CPU’s
eight data pins, D0 through D7, can be either inputs or outputs, depending on
whether the CPU is performing a read or a write operation. During data bus by the
memory or I/O element. During a write operation the CPU’s data pins act as
outputs and place data on the data bus, which are then sent to the selected memory
or I/O element.
2. Address Bus
The address bus is responsible for carrying the addresses of memory locations or
I/O devices where data is to be read and write but devices don't send addresses
back to the CPU on this bus. It helps the CPU identify the location of the data in
memory. The address bus is unidirectional, meaning data only flows in one
direction from the CPU to memory or an I/O device. The width (number of wires
or lines) determines how many memory locations can be addressed. For example,
a 16-bit wide address bus can access 2^16 or 65,536 unique memory locations.
This is a unidirectional bus, because information flows over it in only one
direction, from the CPU to the memory or I/O elements. The CPU alone can place
logic levels on the lines of the address bus, thereby generating 216 = 65,536
different possible addresses. Each of these addresses corresponds to one memory
location or one I/O element. When the CPU wants to communicate (read or write)
with a certain memory location or I/O device, it places the appropriate 16-bit
address code on its 16 address pin outputs, A0 through A15, and onto the address
bus. These address bits are then decoded to select the desired memory location or
I/O device.
3. Control Bus
The control bus carries control signals that synchronize the actions of all
components in the system. It is bi-directional. It acts as a coordination
mechanism for different devices, ensuring that data is transferred at the right time
and that the CPU and other components are working in synchronization without
conflicts.
This is the set of signals that is used to synchronize the activities of the separate
microcomputer elements. Some of these control signals, such as RD and WR are
sent by the CPU to the other elements to tell them what type of operation is
currently in progress. The I/O elements can send control signals to the CPU. An
example is the rest input (RES) of the CPU which, when driven LOW, causes the
CPU to reset to a particular starting stare.