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Mini Computer and Logic Circuit Design

The document outlines the steps to create a basic CPU simulation using Logisim Evolution, including the design of a 4-bit register, ALU for addition and subtraction, control unit, and memory. It also details the implementation of basic logic gates and combinational circuits, such as half adders and multiplexers, with testing procedures and deliverables. The final output includes a working mini-computer simulation with inputs, registers, ALU, memory, and output LEDs.

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ziishahzadi
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0% found this document useful (0 votes)
5 views9 pages

Mini Computer and Logic Circuit Design

The document outlines the steps to create a basic CPU simulation using Logisim Evolution, including the design of a 4-bit register, ALU for addition and subtraction, control unit, and memory. It also details the implementation of basic logic gates and combinational circuits, such as half adders and multiplexers, with testing procedures and deliverables. The final output includes a working mini-computer simulation with inputs, registers, ALU, memory, and output LEDs.

Uploaded by

ziishahzadi
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Step 1: Create Basic Modules

A. 4-bit Register

1. Go to Memory → Register.

2. Place two registers (Register A and Register B).


3. Set Bit Width = 4.

4. Add:

o Input pins (4) for data input.

o Load pin (switch) → connected to the Load input of the register.

o Clock → connect a clock component.

5. Label outputs as A_out[3:0] and B_out[3:0].

Now you have 2 registers to hold operands.

B. ALU (Adder/Subtractor)

1. Go to Arithmetic → Adder and place one.

2. Set Bit Width = 4.

3. Connect:

o Register A output → Adder input A

o Register B output → Adder input B

4. To make it Adder/Subtractor:
o Add XOR gates between Register B output and Adder input B.

o Add a control switch labeled Add/Sub.

o Connect Add/Sub to all XOR gate control inputs.

o Also connect Add/Sub to the Carry In (Cin) of the adder.

When Add/Sub = 0 → Addition


When Add/Sub = 1 → Subtraction

5. Connect adder output to an output register or LEDs.

C. Control Unit
Since this is a simple manual control design:
1. Use Input Pins / Switches for:

o LoadA

o LoadB

o Add/Sub
o Clock

o Memory Read/Write

2. Connect each to corresponding control inputs of Register and ALU.

You now have manual control over each step of the CPU cycle.

D. Memory (ROM or RAM)

1. Go to Memory → ROM or Memory → RAM.

2. Set Address Bit Width = 4, Data Bit Width = 4.


3. Right-click → Edit Contents:

o Example data:

o 0000: 0101 (Value = 5)

o 0001: 0011 (Value = 3)

4. Connect:

o Address input (from switches or counter)

o Data output → Register input (A or B)

Now you can fetch values from memory and load into registers.

Step 2: Connect Modules Together

Make the data path like this:

ROM (Memory) → Register A → ALU → Register B → Output LEDs

Example:
• Load value from ROM address 0 into Register A.

• Load value from ROM address 1 into Register B.

• Set Add/Sub = 0 for addition.


• Observe output on LEDs.
Step 3: Load a Simple Instruction Sequence

Use manual steps (switches) as control signals:

1. Set memory address = 0000, press LoadA = 1 → Load Register A.


2. Set memory address = 0001, press LoadB = 1 → Load Register B.

3. Set Add/Sub = 0, pulse Clock → Perform addition.

4. Observe ALU output.

Step 4: Run and Observe

Check:

• Data flow (memory → register → ALU)

• Operation result (Sum/Sub)


• Control signal effect (manual CPU control)

You’ll see the ALU result light up in output LEDs (e.g., 0101 + 0011 = 1000).

Final Output

When done, you’ll have a working mini-computer simulation:

• Inputs: switches for control


• Registers: store data

• ALU: perform add/sub

• Memory: store values

• Outputs: LEDs show result


Diagram

Deliverables

• Save your file as [Link]

• Take screenshots showing:

o Circuit layout
o Simulation outputs for addition/subtraction

Experiment 3: Implementation of Basic Logic Gates and Combinational Circuits

Purpose

To design, simulate, and verify the operation of basic logic gates and combinational circuits
using Logisim Evolution.

Tools Needed

• Software: Logisim Evolution (free download)

• Components used:
o Input Pins (Switches)
o Output Pins (LEDs)

o Logic Gates (AND, OR, NOT, etc.)

o Adder, XOR, Multiplexer, Decoder, etc.

Step-by-Step Procedure

Step 1: Open Logisim Evolution

1. Launch Logisim Evolution.

2. Go to File → New Project.

3. Save your file as Logic_Gates_And_Circuits.circ.

Step 2: Design and Test Basic Logic Gates

Example 1: AND Gate

1. Place two Input Pins (Wiring → Input Pin).

2. Place one AND Gate (Gates → AND).

3. Place one Output Pin (Wiring → Output Pin).

4. Connect both inputs to the AND gate inputs, and the AND gate output to the output pin.

Repeat the same setup for these gates:

• OR gate (Gates → OR)


• NOT gate (Gates → NOT)

• NAND gate (Gates → NAND)

• NOR gate (Gates → NOR)

• XOR gate (Gates → XOR)

• XNOR gate (Gates → XNOR)

Testing:

• Toggle input pins (0 or 1).

• Observe LED output (0 = OFF, 1 = ON).

• Compare with the truth table.

Step 3: Build Combinational Circuits


(a) Half Adder

• Logic:

o Sum = A XOR B

o Carry = A AND B
Steps:

1. Place 2 input pins (A, B).

2. Place XOR gate → output = Sum.

3. Place AND gate → output = Carry.

4. Add two output LEDs for Sum and Carry.

Test:
Try combinations (00, 01, 10, 11) → verify with truth table.

A B Sum Carry

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

(b) Full Adder


• Logic:

o Sum = A XOR B XOR Cin

o Carry = (A·B) + (Cin·(A⊕B))

Steps:
1. Place 3 inputs (A, B, Cin).

2. Connect:

o XOR gates for the sum logic.

o AND + OR gates for carry.


3. Add 2 output LEDs for Sum and Carry.
Tip:
You can also create this using two half adders + one OR gate:

Half Adder 1: Inputs A, B → S1, C1

Half Adder 2: Inputs S1, Cin → S, C2

Carry = C1 OR C2

Test:
Use all 8 input combinations.
(c) 4-bit Adder

• Use the Adder component from Arithmetic → Adder.


• Set Bit Width = 4.

• Connect:

o A[3:0] inputs (from 4 switches)

o B[3:0] inputs (from another 4 switches)

o Carry In (0 or switch)
o Output LEDs for 4-bit Sum + Carry Out

Test cases:
Example — A=0101 (5), B=0011 (3) → Sum=1000 (8), Carry=0.

(d) Multiplexer

Steps:

1. From Plexers → Multiplexer.

2. Choose 2-to-1 MUX.

3. Connect:

o Two data inputs (D0, D1)


o One select line (S)

o Output LED.

4. When S=0 → Output=D0; when S=1 → Output=D1.

Try also 4-to-1 MUX with 2 select lines.

(e) Decoder (2-to-4)


Steps:

1. From Plexers → Decoder.

2. Choose 2-to-4 Decoder.

3. Connect:
o Two input pins for A0, A1.

o Four output LEDs (Y0–Y3).

4. Observe which output turns ON for each input combination.

A1 A0 Y0 Y1 Y2 Y3

0 0 1 0 0 0

0 1 0 1 0 0

1 0 0 0 1 0

1 1 0 0 0 1

Step 4: Verification

For each circuit:


1. Create a truth table (input → output).

2. Toggle switches for all input combinations.

3. Confirm that outputs match theoretical results.

Take screenshots showing:

• The designed circuit.

• LED outputs for different test cases.

Diagram:
Deliverables

1. .circ file — e.g., Exp3_Logic_Circuits.circ

2. Screenshots for each circuit.

3. Truth tables (can be included in your lab report)

Common questions

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A simple digital circuit simulation can emulate a manual CPU cycle by utilizing switches to control each function of the CPU, such as data loading (via LoadA and LoadB), ALU operation choice (via Add/Sub), and clock synchronization. During this process, users can observe the data flow from memory to registers, through the ALU, and to outputs, verifying operations by checking individual LED outputs for correctness as per expected results (such as arithmetic operations outcomes) and seeing the effects of different control signal states, ensuring manual control over the entire cycle .

XOR gates are used in the 4-bit ALU setup to allow the ALU to perform both addition and subtraction. This is achieved by placing XOR gates between the outputs of Register B and the inputs to the Adder. A control switch labeled Add/Sub determines the operation type: when Add/Sub is 0, the XOR gates allow straightforward addition; when Add/Sub is 1, the XOR gates invert the inputs from Register B to perform subtraction by implementing two's complement logic .

The outcomes and deliverables from a project designed to simulate combinational circuits using Logisim Evolution include a functional simulation file (.circ), visual diagrams of circuit layouts, and screenshot evidence of the simulation's output. It's essential to have truth tables verifying the accuracy of each circuit's logical operations, particularly for different circuit types such as adders and multiplexers, demonstrating comprehensive testing across all input combinations. These deliverables ensure stakeholders can readily assess the simulation's fidelity and educational effectiveness .

The control inputs needed for manual operation of a simple CPU simulation include LoadA, LoadB, Add/Sub, Clock, and Memory Read/Write. These controls facilitate manual input and operation within the CPU. LoadA and LoadB are used to load data into Register A and Register B, respectively. The Add/Sub control switch determines whether the ALU performs an addition or a subtraction operation. The Clock input synchronizes data transfers and operations, while Memory Read/Write controls data flow to and from memory .

To design a half-adder circuit, one must place two input pins representing bits A and B, connect these to an XOR gate for the Sum output and to an AND gate for the Carry output, and provide two output LEDs for displaying Sum and Carry. The half-adder can be integrated into a full-adder configuration by cascading two half-adders and an OR gate to accommodate the carry-in input (Cin) while computing the full-adder carry-out logic: Carry = C1 OR C2, where C1 and C2 are the outputs of each half-adder .

A 2-to-4 decoder illustrates the mapping of binary inputs to distinct outputs by using two input pins (A0 and A1) to control four output lines (Y0–Y3). Each combination of inputs activates one specific output line while turning off all others. This binary-to-one-hot conversion is crucial in applications such as memory address decoding and selecting among multiple data sources, where distinct binary expressions need unique outputs for signal routing .

In a basic digital circuit setup, memory components like ROM or RAM are configured by setting the address bit width and data bit width to define the memory capacity and data size per address. For instance, a setup with 4-bit address width and 4-bit data width allows 16 memory locations each holding a 4-bit value. The configuration involves connecting address input sources, such as switches or counters, to memory address inputs, and memory data outputs to other components such as registers, facilitating data retrieval and storage as a part of processing pathways .

A truth table is essential in the verification of logic circuits as it provides a comprehensive reference of expected behaviors for every possible input combination. In the context of experiments with basic gates like AND, OR, NOT, etc., a truth table facilitates a systematic approach to testing, ensuring circuit outputs consistently align with theoretical predictions. This aids in confirming correct gate operations and identifying any discrepancies due to incorrect wiring or component faults .

Input pins (switches) and output pins (LEDs) help in verifying the functionality of combinational circuits by providing an interactive and visual method to test and observe circuit behavior. Switches allow users to manually set input conditions, while LEDs indicate the state of the outputs, enabling real-time comparison against expected results as per truth tables. This setup facilitates easy troubleshooting and confirmation that the circuit behaves as intended under various input combinations .

Setting the Bit Width to 4 affects the design and operation by determining the input and output sizes of components such as registers and adders in the digital circuit. For example, in a 4-bit register or adder, four input pins are required to handle the 4-bit data, which affects the size and complexity of the overall circuit. This Bit Width setting also dictates the range of numerical values each component can operate on (0 to 15 for unsigned numbers) and the carry-out implications in arithmetic operations .

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