ARSI UNIVERSITY

COLLEGE OF COMPUTATIONAL SCIENCE

DEPARTMENT OF COMPUTER SCIENCE
GROUP NAME ID

[Link] Arega ----------------------------------------------------------ugr/ 13610/15

[Link] Belete ----------------------------------------------------------ugr/ 14482 /15
[Link] Worku ---------------------------------------------------- ugr/ 13745/15
[Link] Kassaye----------------------------------------------------ugr/ 13750 /15
[Link] Gero ------------------------------------------------------------- ugr/ 14429 /15
[Link] Mengistu--------------------------------------------------------- ugr/13704 /15
[Link] Yohannes ---------------------------------------------------------ugr/13682 /15
[Link] Kayo ---------------------------------------------------------------ugr/14511/15
MICROPROCESSOR AND ASSEMBLY
LANGUAGE ASSIGNMENT
1. What is the size of the address and data bus in the 8086?

[Link] Bus: 20-bit (can address up to 2^20= =1 MB of memory)

The 8086 microprocessor has a 20-bit address bus, which allows it to address up to 1 MB of
memory (since 2^20=1,048,576 bytes)

b. Data Bus: 16-bit (can transfer 16 bits of data at a time).

The 16-bit data bus means the processor can read or write 16 bits (2 bytes) of data at a time.
2. Draw the register organization of the 8086 and explain typical applications of each register.
Register Organization Diagram:
+-------------------+-------------------+
| AX (AH/AL) | BX (BH/BL) | General-purpose registers
+-------------------+-------------------+
| CX (CH/CL) | DX (DH/DL) | General-purpose registers
+-------------------+-------------------+
| SI | DI | Index registers (used for string operations)
+-------------------+-------------------+
| SP | BP | Stack Pointer and Base Pointer (used for stack operations)
+-------------------+-------------------+
| CS | DS | Segment registers (CS: Code, DS: Data)
+-------------------+-------------------+
| SS | ES | Segment registers (SS: Stack, ES: Extra)
+-------------------+-------------------+
| IP | FLAGS | Instruction Pointer and Flags register
+-------------------+-------------------+

Applications of Registers:
AX, BX, CX, DX: Used for arithmetic, logical operations, and data movement.

SI, DI: Used as source and destination pointers in string operations.

SP: Points to the top of the stack.

BP: Used to access data in the stack segment.

CS: Holds the code segment address.

DS: Holds the data segment address.

SS: Holds the stack segment address.

ES: Holds the extra segment address.

IP: Points to the next instruction to be executed.

FLAGS: Stores the status of the processor (e.g., carry, zero, overflow).

[Link] is the 20-bit physical memory address calculated in the 8086 processor?
The 8086 uses segmented memory addressing.

Formula:
Physical Address = (Segment Register × 16) + Offset

Example: If CS = F000H and IP = 1234H, the physical address is:

F000H×16+1234H=F0000H+1234H=F1234H

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NB:The 8086 has a 16-bit architecture, but it needs to address 1 MB of memory (which requires 20
bits).To achieve this, the 8086 uses segmented memory addressing, where the segment register (CS,
DS, SS, or ES) holds the base address of a segment, and the offset specifies the location within the
segment.
The physical address is calculated by multiplying the segment register by 16 (or shifting left by 4 bits)
and adding the offset.
4. Write the different memory segments used in the 8086 and their functions.
 Code Segment (CS): Stores the program instructions.
 Data Segment (DS): Stores the data used by the program.
 Stack Segment (SS): Manages the stack (used for function calls, local variables, etc.).
 Extra Segment (ES): Additional data segment, often used for string operations.
NB:The 8086 divides memory into segments, each of which is 64 KB in size.
The CS segment stores the program instructions, the DS segment stores the data, the SS segment
manages the stack, and the ES segment is used for additional data (e.g., string operations).
5. Write the function of the DF, IF, and TF bits in the 8086.
 DF (Direction Flag):
The DF flag controls the direction of string operations (e.g., MOVSB, MOVSW).
0 = Increment (process strings from low to high memory).
1 = Decrement (process strings from high to low memory).

 IF (Interrupt Flag):
The IF flag enables or disables hardware interrupts (e.g., keyboard, timer).
1 = Enabled (processor can accept interrupts).
0 = Disabled (processor ignores interrupts).
 TF (Trap Flag):
The TF flag is used for debugging, allowing the processor to execute one instruction at a time.
1 = Enabled (processor executes one instruction and then traps to the debugger).
0 = Disabled (normal execution).

6. The content of the different registers in the 8086 is CS = F000H, DS = 1000H, SS = 2000H, and ES =
3000H. Find the base address of the different segments in the memory.
Base Address Calculation:The base address of a segment is calculated by multiplying the segment
register by 16 (or shifting left by 4 bits).
Base Address = Segment Register × 16
CS = F000H → Base Address = F0000H
DS = 1000H → Base Address = 10000H
SS = 2000H → Base Address = 20000H
ES = 3000H → Base Address = 30000H

7. What is the difference between the minimum and maximum mode operation of the 8086

Minimum Mode:In minimum mode, the 8086 is the only processor in the system, and it generates all
the control signals.
 Single processor system.
 Control signals (e.g., RD, WR, M/IO) are generated by the 8086 itself.
Maximum Mode:In maximum mode, the 8086 is part of a multiprocessor system, and an external bus
controller (8288) generates the control signals.
 Multiprocessor system.
 Control signals are generated by an external bus controller (8288).

8. What is meant by DMA operation? Which pins of the 8086 are used to perform the DMA
operation in the minimum and maximum modes of the 8086?

DMA (Direct Memory Access):

Allows peripherals to access memory directly without CPU intervention(DMA allows peripherals (e.g.,
disk drives) to access memory directly, bypassing the CPU).

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The HOLD pin is used by the peripheral to request DMA, and the HLDA pin is used by the 8086 to
acknowledge the request.
Pins Used:
HOLD: Request for DMA operation.
HLDA: Acknowledgment of DMA operation.
9. Explain the architecture of the 8086 with a neat functional block diagram.
Functional Block Diagram
+-------------------+ +-------------------+
| Bus Interface Unit |<----->| Execution Unit |
| (BIU) | | (EU) |
+-------------------+ +-------------------+
| - Segment Registers| | - General Registers|
| - Instruction Queue| | - ALU |
| - Address Adder | | - Control Unit |
+-------------------+ +-------------------+
The BIU is responsible for fetching instructions and data from memory, while the EU executes the
instructions.
The BIU contains the segment registers, instruction queue, and address adder, while the EU contains
the general-purpose registers, ALU, and control unit.

10. Explain the function of different flags in the 8086.

 Carry Flag (CF): Indicates carry/borrow in arithmetic operations.
 Parity Flag (PF): Indicates even parity in the result.
 Auxiliary Flag (AF): Indicates carry/borrow in BCD operations.
 Zero Flag (ZF): Indicates a zero result.
 Sign Flag (SF): Indicates the sign of the result.
 Overflow Flag (OF): Indicates overflow in signed arithmetic.
 Trap Flag (TF): Enables single-step debugging.
 Interrupt Flag (IF): Enables/disables interrupts.
A. Direction Flag (DF): Controls string direction
11. What is the function of the segment override prefix? Give two examples.
The segment override prefix is a 1-byte instruction prefix that modifies the default segment register
used in the [Link] is added before the instruction that performs the memory [Link] prefix
tells the processor to use the specified segment register instead of the default one.
The segment override prefix allows the programmer to specify a different segment register than the
default (e.g., using ES instead of DS for a memory access).
MOV AX, ES:[BX] (uses ES instead of DS).
MOV AX, CS:[SI] (uses CS instead of DS).
Why Use Segment Override Prefix?
Accessing Data in Different Segments: Sometimes, data may be stored in a segment other than the
default (e.g., in the ES or CS segment). The override prefix allows access to this data
.
String Operations: In string operations, the ES segment is often used as the destination segment. The
override prefix ensures the correct segment is used.

Code Segment Access: In some cases, the program may need to access data stored in the code
segment (CS), which requires overriding the default DS segment

12. What is the difference between inter-segment and intra-segment jump in the 8086?
Inter-segment Jump: Jumps to a different segment (changes CS and IP).An inter-segment jump
changes both the segment (CS) and the offset (IP), allowing the program to jump to a different
segment
Intra-segment Jump: Jumps within the same segment (changes only IP).An intra-segment jump
changes only the offset (IP), keeping the segment (CS) the same.
13. What is the difference between short and near jump in the 8086?
Short Jump: Jumps within -128 to +127 bytes (uses 1-byte offset).

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 Near Jump: Jumps within the same segment (uses 2-byte offset).
GENERALLY:A short jump is used for small jumps within a limited range, while a near jump is used for
larger jumps within the same segment
14. What are the different uses of the stack in a microprocessor?
The stack is a Last-In-First-Out (LIFO) data structure used to store temporary data, such as return
addresses, register values, and function parameters.
 Store return addresses for function calls.
 Save register values.
 Pass parameters to functions.
 Manage local variables.
[Link] is the difference between the MUL and IMUL instructions in the 8086?
 MUL: Performs unsigned multiplication.
 IMUL: Performs signed multiplication
The MUL instruction is used for multiplying unsigned numbers, while the IMUL instruction is used for
multiplying signed numbers

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[Link] is the difference between the DIV and IDIV instructions in the 8086?
The DIV instruction is used for dividing unsigned numbers, while the IDIV instruction is used for
dividing signed numbers.

a. DIV (Unsigned Division):

The DIV instruction treats all numbers as unsigned, meaning they are always [Link] dividend
and divisor are interpreted as positive integers, and the result (quotient and remainder) is also
[Link] the divisor is zero, the processor generates a divide-by-zero exception.
MOV AX, 1000 ; Load dividend (1000) into AX
MOV BL, 10 ; Load divisor (10) into BL
DIV BL ; Divide AX by BL
b. IDIV (Signed Division):
The IDIV instruction treats numbers as signed, meaning they can be positive or [Link] dividend
and divisor are interpreted as signed integers, and the result (quotient and remainder) is also signed.
The sign of the remainder is always the same as the sign of the [Link] the divisor is zero, the
processor generates a divide-by-zero exception.
MOV AX, -1000 ; Load dividend (-1000) into AX
MOV BL, 10 ; Load divisor (10) into BL
IDIV BL ; Divide AX by BL

17. What is the function of the DAA instruction in the 8086?

DAA (Decimal Adjust after Addition): Adjusts the result of BCD addition to a valid BCD [Link]
DAA instruction is used after adding two BCD (Binary-Coded Decimal) numbers to ensure the result is
a valid BCD number.
Why is DAA Needed?
When two BCD numbers are added using the ADD instruction, the result may not be a valid BCD
number.
For example, adding two BCD numbers 5 (0101) and 7 (0111) gives 12 (1100 in binary), which is not a
valid BCD number because BCD only allows values from 0000 to 1001 (0-9).The DAA instruction
corrects this by adjusting the result to a valid BCD number.
How DAA Works:
The DAA instruction operates on the AL register, which contains the result of a previous ADD or ADC
[Link] checks the lower 4 bits (nibble) and the upper 4 bits of the AL register to determine if
they are valid BCD digits (0-9).If a nibble is invalid (greater than 9), it adds 6 to that nibble to correct
it.
If there is a carry from the lower nibble to the upper nibble, it also adds 6 to the upper nibble.

18. What is the difference between maskable and non-maskable interrupts?

Interrupts are signals sent to the processor to request its attention. They can be triggered by
hardware events (e.g., keyboard input, timer) or software events (e.g., system calls). Interrupts are
classified into two types:
[Link] Interrupts
[Link]-Maskable Interrupts
failure).
A. Maskable interrupts are interrupts that can be enabled or disabled by the programmer.
Control: The Interrupt Flag (IF) in the FLAGS register controls whether maskable interrupts are
enabled or disabled.
IF = 1: Maskable interrupts are enabled.
IF = 0: Maskable interrupts are disabled.
Handling: The processor can ignore maskable interrupts if they are disabled (IF = 0)

Examples:
Keyboard input.
Timer interrupts.
Disk I/O operations.
B. Non-Maskable Interrupts (NMI):

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Non-maskable interrupts are interrupts that cannot be disabled by the programmer.

Control: The processor must respond to non-maskable interrupts, regardless of the state of the
Interrupt Flag (IF)
Examples:
 Power failure.
 Hardware errors (e.g., memory parity error).
 Critical system events
Handling: The processor cannot ignore non-maskable interrupts. They are always serviced
immediately.
19. What is the difference between hardware and software interrupts?
Hardware interrupts are generated by external devices, while software interrupts are generated by
the program itself (e.g., using the INT instruction).
[Link] Interrupts:
Hardware interrupts are generated by external hardware devices to request the processor's
attention.
Trigger: These interrupts are triggered by signals sent to the processor's interrupt pins (e.g., INTR,
NMI).
Examples:
 Keyboard input.
 Mouse movement.
 Timer interrupts.
 Disk I/O completion.

Handling: The processor suspends its current task, saves its state, and executes an Interrupt Service
Routine (ISR) to handle the interrupt

Types of Hardware Interrupts:

 Maskable Interrupts: Can be enabled or disabled by the programmer (e.g., INTR).
 Non-Maskable Interrupts (NMI): Cannot be disabled and are used for critical events (e.g., power
failure).
[Link] Interrupts:
Software interrupts are generated by software instructions to request services from the operating
system or BIOS.
Trigger: These interrupts are triggered by executing a specific instruction, such as INT in assembly
language.
Examples:
 System calls (e.g., reading a file, printing to the screen).
 Debugging (e.g., breakpoints).
 Error handling (e.g., division by zero).
Handling: The processor executes the corresponding Interrupt Service Routine (ISR) to handle the
interrupt.
20. Write a program to move a word string 200 bytes (i.e., 100 words) long from the offset address
1000H to the offset address 3000H in the segment 5000H.
MOV AX, 5000H
MOV DS, AX
MOV SI, 1000H
MOV DI, 3000H
MOV CX, 100
REP MOVSW
HLT
This program moves 100 words (200 bytes) from the offset address 1000H to 3000H in the segment
[Link] REP MOVSW instruction repeats the move operation 100 times

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21. Write a program to find the smallest word in an array of 100 words stored sequentially in the
memory; starting at the offset address 1000H in the segment address 5000H. Store the result at the
offset address 2000H in the same segm
MOV AX, 5000H
MOV DS, AX
MOV SI, 1000H
MOV CX, 99
LODSW
MOV BX, AX
LOOP1: LODSW
CMP AX, BX
JAE NEXT
MOV BX, AX
NEXT: LOOP LOOP1
MOV [2000H], BX
HLT

This program finds the smallest word in an array of 100 words and stores the result at the offset
address [Link] LODSW instruction loads a word from memory into AX, and the CMP instruction
compares it with the current smallest word (stored in BX).