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Indian Institute of Technology Kharagpur
Course Name: Computer Architecture and Organization
Assignment- Week 2
TYPE OF QUESTION: MCQ/MSQ/SA
Number of questions: 10 Total mark: 10 x 1 = 10
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QUESTION 1:
What is the binary representation of the decimal number 45.625?
a. 101101.101
b. 101101.100
c. 101100.101
d. 101100.011
Correct Answer: a
Detailed Solution:
- Integer part: 45 → divide by 2 → binary = 101101
- Fractional part: 0.625
→ 0.625 × 2 = 1.25 → 1
→ 0.25 × 2 = 0.5 → 0
→ 0.5 × 2 = 1.0 → 1
⇒ Fraction = .101
- Final binary = 101101.101
The correct option is (a).
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QUESTION 2:
What is the binary representation of (4F.A)₁₆ ?
a. 0100 1111 . 1010
b. 0100 1111 . 1100
c. 0101 1111 . 1010
d. None of these
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Indian Institute of Technology Kharagpur
Correct Answer: a
Detailed Solution:
- Convert integer part (4F)₁₆:
4 = 0100
F = 1111
→ Integer part = 0100 1111
- Convert fractional part (.A)₁₆:
A = 1010
→ Fractional part = .1010
- Final binary = 0100 1111 . 1010
The correct option is (a).
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QUESTION 3:
What is the largest number that can be represented using 20-bit unsigned representation?
a) + 2¹⁹
b) + (2¹⁹ – 1)
c) + 2²⁰
d) + (2²⁰ – 1)
Correct Answer: d
Detailed Solution:
- For an n-bit unsigned binary number, the maximum value is: 2ⁿ – 1
- Here, n = 20 → Max = 2²⁰ – 1 = 1,048,575
- So, the correct representation is: + (2²⁰ – 1)
The correct option is (d).
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
______________________________________________________________________________
QUESTION 4:
How do you represent -73 using 16-bit, 2’s complement representation?
a. 1111 1111 1011 0101
b. 1111 1111 1011 0111
c. 1000 0000 1011 0111
d. 0000 0000 1011 0111
Correct Answer: b
Detailed Solution:
Step 1: Convert +73 to binary:
73 = 0100 1001
Step 2: Find 2’s complement of 73:
- Invert bits: 1011 0110
- Add 1: 1011 0111
So, -73 in 8-bit = 1011 0111
Sign-extend to 16-bit: 1111 1111 1011 0111
The correct option is (b).
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QUESTION 5:
For the instruction LOAD R4, 1200(R7), what addressing modes are used?
a. Register, Direct
b. Register Indirect, Indexed
c. Register, Indexed
d. Immediate, Register
Correct Answer: c
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Indian Institute of Technology Kharagpur
Detailed Solution:
- The format LOAD R4, 1200(R7) uses:
→ A base register (R7)
→ An offset (1200)
- The effective address = R7 + 1200, so this is Indexed Addressing.
- R4 is the destination register → regular register usage.
Hence, the addressing modes are: Register, Indexed
The correct option is (c).
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QUESTION 6:
Consider the following code snippet. Assume $s0 contains variable x and $s1 contains variable
y. What is the correct MIPS32 representation of the following high-level code?
if (x < y)
Result = x + y;
else
Result = x – y;
a. slt $t0, $s0, $s1
beq $t0, $zero, Else
add $s2, $s0, $s1
j Exit
Else: sub $s2, $s0, $s1
Exit: …
b. slt $t0, $s0, $s1
bne $t0, $zero, Else
add $s2, $s0, $s1
j Exit
Else: sub $s2, $s0, $s1
Exit: …
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Indian Institute of Technology Kharagpur
c. bge $s0, $s1, Else
add $s2, $s0, $s1
j Exit
Else: sub $s2, $s0, $s1
Exit: …
Correct Answer: a, c
Detailed Answer:
- Option a uses slt + beq, which is valid:
slt sets $t0 = 1 if x < y
beq $t0, $zero → jump if x ≥ y → go to Else
So, if x < y → execute ADD, else go to SUB → ✅
- Option b is incorrect because `bne` inverts the condition incorrectly.
- Option c uses `bge`, a pseudo-instruction (translated internally to `slt + bne`), and works correctly.
If x ≥ y → go to Else, else execute ADD → ✅
The correct options are (a) and (c).
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QUESTION 7:
What does the instruction beq $t0,$t1,Label do?
a. Branches to Label if $t0 is less than $t1
b. Branches to Label if $t0 is not equal to $t1
c. Branches to Label if $t0 is equal to $t1
d. Sets $t0 to the value at address Label
Correct Answer: c
Detailed Answer:
- `beq` stands for Branch if Equal
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Indian Institute of Technology Kharagpur
- It compares two registers: if their values are equal, program execution jumps (branches) to the target
label.
- If not equal, the next instruction in sequence is executed.
The correct option is (c).
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QUESTION 8:
Consider the following code snippet in C:
M = P - 50;
Q = M + 30;
The corresponding MIPS code is shown below, where it is assumed that $s1, $s2, and $s3
contain the addresses of the variables M, P, and Q respectively in memory.
What do “X”, “Y”, “Z”, and “W” represent in the code below?
addi X,Y,-50
addi Z,X,30
a. X = $s1, Z = $s2, Y = $s3, W = 30
b. X = $s3, Y = $s2, Z = $s1, W = 30
c. X = $s1, Y = $s2, Z = $s3, W = 30
d. None of these
Correct Answer: c
Detailed Solution:
- `addi $s1, $s2, -50` ⇒ M = P - 50
→ X = $s1 (M), Y = $s2 (P)
- `addi $s3, $s1, 30` ⇒ Q = M + 30
→ Z = $s3 (Q), W = 30
→ So, X = $s1, Y = $s2, Z = $s3, W = 30
The correct option is (c).
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
______________________________________________________________________________
QUESTION 9:
When a function call is made using the “jal” instruction in MIPS, where is the return address
stored automatically?
a. On the stack by the compiler
b. In a general-purpose register specified by the caller
c. In a memory location pointed to by $sp
d. In the return address register $ra
Correct Answer: d
Detailed Answer:
- In MIPS, the `jal` (Jump and Link) instruction stores the return address (i.e., the address of the
instruction following `jal`) into the $ra register.
- The called function can then return using `jr $ra` to jump back to the caller.
The correct option is (d).
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QUESTION 10:
Suppose that the “sub” instruction in MIPS is encoded with opcode = 000000 and funct =
100010.
What will be the complete 32-bit hexadecimal encoding of the following instruction?
sub $t2,$s1,$t0
a. 02304820
b. 02304822
c. 02284023
d. 02285022
Correct Answer: d
Detailed Solution:
Instruction format for R-type instructions:
[opcode (6)][rs (5)][rt (5)][rd (5)][shamt (5)][funct (6)]
sub $t2, $s1, $t0
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→ opcode = 000000
→ rs = $s1 = 17
→ rt = $t0 = 8
→ rd = $t2 = 10
→ shamt = 00000
→ funct = 100010 (for sub)
Binary: 000000 10001 01000 01010 00000 100010
= 0000|0010|0010|1000|0101|0000|0010|0010
→ Hex: 0x02285022
The correct option is (d).
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