49th BCS Special (EEE) MCQ Model Test by Rony Parvej

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Answer Sheet with Explanations

PART - I: ELECTRICAL CIRCUITS

Q1. Answer: b) 1 ms

Explanation: Time constant τ = RC = 10Ω × 100μF = 10 × 100×10⁻⁶ = 1×10⁻³ s = 1 ms

Q2. Answer: a) Zero (lagging)

Explanation: In a purely inductive circuit, current lags voltage by 90°, so cosφ = cos(90°) = 0. The
power factor is zero lagging.

Q3. Answer: a) b - n + 1

Explanation: The number of independent mesh equations = number of branches - number of

nodes + 1 (for a connected planar circuit).

Q4. Answer: a) Linear circuits only

Explanation: Thevenin's theorem applies only to linear circuits where superposition principle is
valid. It cannot be applied to non-linear circuits.

Q5. Answer: b) Minimum and equal to R

Explanation: At resonance in series RLC circuit, XL = XC, so they cancel out. Impedance Z = R
(minimum value).

Q6. Answer: a) ωL/R

Explanation: Quality factor Q = ωL/R = 1/(ωCR) = (1/R)√(L/C). It represents the sharpness of

resonance.

Q7. Answer: b) √3 times phase voltage

Explanation: In a Y-connected system, VL = √3 × Vph. This is a fundamental relationship in 3-

phase systems.

Q8. Answer: a) Active power to apparent power

Explanation: Power factor = P/S = Real Power/Apparent Power = cosφ

Q9. Answer: b) A current source in parallel with a resistance

Explanation: Norton's theorem converts any linear network into an equivalent current source (IN)
in parallel with Norton resistance (RN).

Q10. Answer: b) Complex conjugate of source impedance

 Explanation: For maximum power transfer in AC circuits, ZL = ZS*, where ZS* is the complex
conjugate of source impedance.

Q11. Answer: a) Resistor

Explanation: In a low-pass RL filter, output is taken across the resistor (R). At low frequencies,
inductor acts as short circuit, allowing signal to pass.

Q12. Answer: c) Three-phase circuits

Explanation: The two-wattmeter method is a standard technique for measuring power in balanced
or unbalanced 3-phase systems.

ELECTRICAL MACHINES & TRANSFORMERS

Q13. Answer: b) Using thin laminations

Explanation: Thin laminations increase resistance to eddy current paths, thereby reducing eddy
current losses (Pe ∝ t², where t = thickness).

Q14. Answer: b) Convert AC to DC

Explanation: The commutator in a DC generator rectifies the AC generated in the armature

conductors to DC output.

Q15. Answer: a) E = ΦZNP/60A

Explanation: EMF equation of DC generator: E = (ΦZN/60) × (P/A), where Φ=flux, Z=conductors,

N=speed, P=poles, A=parallel paths.

Q16. Answer: b) Demagnetizing effect

Explanation: Armature reaction distorts and weakens the main field flux, causing a demagnetizing
effect at the pole tips.

Q17. Answer: c) Less than supply voltage

Explanation: Back EMF Eb = V - IaRa, so Eb is always less than supply voltage V by the armature
drop.

Q18. Answer: b) Above base speed

Explanation: Field control weakens the flux, which increases speed (N ∝ 1/Φ). This method
provides speeds above the base speed.

Q19. Answer: a) f = NP/120

Explanation: Frequency f = (Pole pairs × RPM)/60 = (P/2 × N)/60 = PN/120 Hz

Q20. Answer: b) (E₀ - V)/V × 100%

 Explanation: Voltage regulation = [(No-load voltage - Full-load voltage)/Full-load voltage] ×
100% = (E₀ - V)/V × 100%

Q21. Answer: a) Synchronous speed only

Explanation: Synchronous motors are locked to the supply frequency and run at exactly
synchronous speed Ns = 120f/P.

Q22. Answer: b) Small (1-3%)

Explanation: At no-load, an induction motor runs very close to synchronous speed with a small
slip (typically 1-3%) to produce the torque needed to overcome friction.

Q23. Answer: a) sf

Explanation: Rotor frequency fr = s × f, where s is slip and f is supply frequency.

Q24. Answer: b) 0.1 to 0.2

Explanation: Maximum torque (breakdown torque) in an induction motor typically occurs at slip
values between 0.1 to 0.2 (10-20%).

Q25. Answer: b) Short circuit parameters

Explanation: The blocked rotor test (locked rotor test) determines short circuit parameters:
equivalent resistance and reactance referred to stator.

Q26. Answer: c) 1/3 times

Explanation: Star-delta starting reduces the starting current to 1/3 of direct-on-line starting
current (since line voltage reduces to 1/√3, current reduces to 1/3).

Q27. Answer: c) Both a and b

Explanation: Single-phase induction motors produce a pulsating field, not a rotating field, resulting
in zero starting torque. Hence they are not self-starting.

Q28. Answer: d) All of the above

Explanation: Transformation ratio K = N₁/N₂ = E₁/E₂ = I₂/I₁. All three ratios are equal.

Q29. Answer: b) Core losses

Explanation: Open circuit test is performed at rated voltage with one winding open. It determines
core losses (hysteresis and eddy current losses) and magnetizing current.

Q30. Answer: b) 50% of winding

Explanation: In Scott connection, the main transformer has a center tap at 50% of its winding to
convert 3-phase to 2-phase supply.
POWER SYSTEM
Q31. Answer: d) Any convenient value

Explanation: Base power can be chosen as any convenient value (often 10 MVA, 100 MVA, or
rated power) for per-unit calculations.

Q32. Answer: a) Less than 80 km

Explanation: Short transmission lines: < 80 km; Medium: 80-200 km; Long: > 200 km. Line
capacitance is neglected in short lines.

Q33. Answer: b) 1 + YZ/2

Explanation: For nominal π model, A = D = 1 + YZ/2, where Y is total shunt admittance and Z is
series impedance.

Q34. Answer: b) Voltage rise at receiving end

Explanation: Ferranti effect occurs in lightly loaded or open-circuited lines where receiving end
voltage exceeds sending end voltage due to line capacitance.

Q35. Answer: a) √(L/C)

Explanation: Surge impedance (characteristic impedance) Zc = √(L/C) for a lossless line, where L
and C are inductance and capacitance per unit length.

Q36. Answer: c) Positive, negative, and zero sequence

Explanation: Any unbalanced 3-phase system can be resolved into three balanced symmetrical
components: positive, negative, and zero sequence.

Q37. Answer: a) Positive sequence only

Explanation: In a balanced symmetrical 3-phase fault, only positive sequence components exist.
Negative and zero sequences are absent.

Q38. Answer: c) M(d²δ/dt²) = Pₘ - Pₑ

Explanation: The swing equation is M(d²δ/dt²) = Pa = Pₘ - Pₑ, where M is inertia constant, δ is

rotor angle, Pₘ is mechanical power, Pₑ is electrical power.

Q39. Answer: b) Shunt FACTS device

Explanation: STATCOM (Static Synchronous Compensator) is a shunt-connected FACTS device

used for reactive power compensation and voltage control.

Q40. Answer: b) Long distance and underwater cables

Explanation: HVDC is preferred for very long distances (>600 km), underwater/underground
cables, and asynchronous interconnections due to lower losses and no stability issues.

Q41. Answer: b) Break a circuit under fault conditions

 Explanation: A circuit breaker's primary function is to interrupt fault currents and isolate faulty
sections while maintaining system stability.

Q42. Answer: b) Inverse Definite Minimum Time

Explanation: IDMT = Inverse Definite Minimum Time. Operating time is inversely proportional
to fault current magnitude.

Q43. Answer: b) Transformers

Explanation: Buchholz relay detects internal faults in oil-immersed transformers by sensing gas
accumulation or oil flow due to faults.

POWER PLANT ENGINEERING

Q44. Answer: a) Average load to maximum demand

Explanation: Load factor = Average load/Maximum demand. A high load factor indicates
efficient utilization of plant capacity.

Q45. Answer: a) Always greater than 1

Explanation: Diversity factor = Sum of individual maximum demands/Maximum demand of the

group. It's always ≥ 1 due to non-coincident peaks.

Q46. Answer: c) 0.9 to 0.95 lagging

Explanation: A power factor of 0.9-0.95 lagging is most economical as it balances penalty costs
and capacitor bank expenses.

Q47. Answer: b) Nuclear and large hydro plants

Explanation: Base load plants operate continuously at high capacity factors. Nuclear and large
hydro plants are ideal due to low operating costs and high reliability.

Q48. Answer: b) 35-45%

Explanation: Modern thermal power plants have efficiencies of 35-45%. Losses occur in
combustion, heat transfer, and thermodynamic cycle limitations.

Q49. Answer: b) Slow down neutrons

Explanation: A moderator (water, heavy water, graphite) slows down fast neutrons to thermal
energies, making them more likely to cause fission.

Q50. Answer: a) Actual energy produced / Maximum possible energy

Explanation: Capacity factor = (Actual energy output)/(Maximum possible energy output) ×

100%. It measures plant utilization.
PART - II: ANALOG ELECTRONICS
Q51. Answer: b) 0.7 V

Explanation: The barrier potential (built-in voltage) for silicon PN junction is approximately 0.7 V
at room temperature. For germanium, it's 0.3 V.

Q52. Answer: b) 2Vₘ

Explanation: In full-wave center-tap rectifier, each diode experiences reverse voltage = 2Vₘ (twice
the peak input voltage) during its non-conducting half cycle.

Q53. Answer: c) 180°

Explanation: Common emitter amplifier produces a phase shift of 180° between input and output
signals due to its inverting nature.

Q54. Answer: a) β = α/(1-α)

Explanation: Relationship between current gains: β = α/(1-α) or α = β/(1+β), where α = IC/IE and
β = IC/IB.

Q55. Answer: c) Zero

Explanation: When VGS = VP (pinch-off voltage), the channel is completely pinched off and drain
current ID becomes zero.

Q56. Answer: b) Very low static power consumption

Explanation: CMOS inverters consume negligible static power because in steady state, either
PMOS or NMOS is OFF, preventing DC current flow.

Q57. Answer: a) Decreases gain and increases bandwidth

Explanation: Negative feedback reduces gain (A' = A/(1+Aβ)) but increases bandwidth
proportionally, improving stability and reducing distortion.

Q58. Answer: a) Infinite input impedance and zero output impedance

Explanation: An ideal op-amp has: Infinite input impedance (Zin = ∞), zero output impedance
(Zout = 0), infinite open-loop gain, and infinite bandwidth.

Q59. Answer: b) -20 dB/decade

Explanation: An integrator has frequency response with -20 dB/decade slope (or -6 dB/octave).
Output decreases with increasing frequency.

Q60. Answer: a) Loop gain = 1 and phase shift = 0° or 360°

Explanation: Barkhausen criterion for sustained oscillation: |Aβ| = 1 (magnitude) and ∠Aβ = 0° or
360° (phase).

Q61. Answer: b) 50%

 Explanation: Maximum theoretical efficiency of Class A power amplifier = 50% (with transformer
coupling). With RC coupling, it's only 25%.

Q62. Answer: c) Hysteresis

Explanation: Schmitt trigger provides hysteresis (two different threshold voltages) for noise
immunity and converts slowly varying inputs to clean digital outputs.

Q63. Answer: b) Frequency synthesis and demodulation

Explanation: PLL is used for frequency synthesis, FM/PM demodulation, clock recovery,
frequency multiplication, and signal synchronization.

DIGITAL ELECTRONICS
Q64. Answer: c) Y = (A · B)'

Explanation: NAND gate output is complement of AND operation: Y = (A·B)' = A'+ B' (using De
Morgan's theorem).

Q65. Answer: d) Both b and c

Explanation: De Morgan's theorems: (A+B)' = A'·B' and (A·B)' = A'+B'. Both statements b and c
are correct.

Q66. Answer: c) 3 inputs and 2 outputs

Explanation: Full adder has 3 inputs (A, B, Cin) and 2 outputs (Sum and Carry). It adds three bits.

Q67. Answer: b) 2

Explanation: A 4-to-1 MUX requires 2 select lines (2² = 4). Generally, n-to-1 MUX needs log₂(n)
select lines.

Q68. Answer: b) Q(n+1) = JQ' + K'Q

Explanation: JK flip-flop characteristic equation: Q(n+1) = JQ' + K'Q. This represents toggle when
J=K=1, set when J=1,K=0, reset when J=0,K=1.

Q69. Answer: c) 16

Explanation: A 4-bit counter has 2⁴ = 16 states (0000 to 1111). Generally, n-bit counter has 2ⁿ
states.

Q70. Answer: b) Fastest conversion

Explanation: Flash ADC (parallel ADC) is the fastest type as all bits are determined simultaneously
using 2ⁿ-1 comparators.
POWER ELECTRONICS
Q71. Answer: a) Forward biasing with gate trigger

Explanation: SCR turns ON when: (1) Anode is positive w.r.t. cathode (forward biased), AND (2)
Positive gate trigger pulse is applied.

Q72. Answer: c) Four SCRs

Explanation: Single-phase full-wave controlled rectifier uses 4 SCRs in a bridge configuration (one
SCR in each arm of the bridge).

Q73. Answer: b) Step-down DC-DC converter

Explanation: Buck converter is a step-down (voltage reducing) DC-DC converter where output
voltage is less than input voltage.

Q74. Answer: b) Changing pulse width

Explanation: PWM (Pulse Width Modulation) inverters control output voltage by varying the width
of pulses while keeping frequency constant.

Q75. Answer: a) BJT and MOSFET

Explanation: IGBT (Insulated Gate Bipolar Transistor) combines high input impedance of
MOSFET with low on-state losses of BJT.

COMMUNICATION ENGINEERING
Q76. Answer: b) 2fₘ

Explanation: AM signal bandwidth = 2fₘ (contains USB and LSB). It's independent of modulation
index μ.

Q77. Answer: c) Both power and bandwidth

Explanation: SSB transmits only one sideband, saving 50% bandwidth and approximately 83%
power compared to conventional AM.

Q78. Answer: a) Δf/fₘ

Explanation: FM modulation index β = Δf/fₘ, where Δf is frequency deviation and fₘ is modulating

frequency.

Q79. Answer: b) Twice the highest signal frequency

Explanation: Nyquist sampling theorem: fs ≥ 2fₘₐₓ (sampling frequency must be at least twice the
highest frequency component to avoid aliasing).

Q80. Answer: a) Number of bits

 Explanation: Quantization noise power decreases with increasing number of bits. Signal-to-
quantization-noise ratio = 6.02n + 1.76 dB, where n = number of bits.

Q81. Answer: a) 1-bit DPCM

Explanation: Delta modulation is a 1-bit differential PCM where only the sign of the difference (Δ)
between successive samples is transmitted.

Q82. Answer: b) Digital line coding

Explanation: Manchester encoding (biphase encoding) is a line coding technique where each bit
has a transition at midpoint, ensuring self-clocking.

Q83. Answer: b) 2 bits

Explanation: QPSK (Quadrature Phase Shift Keying) uses 4 phase states (0°, 90°, 180°, 270°), so
each symbol represents 2 bits (2² = 4).

Q84. Answer: b) Immunity to interference

Explanation: Spread spectrum spreads signal over wide bandwidth, providing excellent resistance
to jamming, interference, and interception.

Q85. Answer: c) Both analog and digital

Explanation: FDM (Frequency Division Multiplexing) can be used in both analog systems
(traditional) and digital systems (OFDM).

Q86. Answer: c) Unique codes

Explanation: CDMA (Code Division Multiple Access) assigns unique orthogonal codes to each
user, allowing simultaneous transmission on same frequency.

Q87. Answer: b) Resistance to multipath fading

Explanation: OFDM (Orthogonal Frequency Division Multiplexing) divides channel into many
narrow subcarriers, making it highly resistant to multipath fading and ISI.

MICROPROCESSOR & INTERFACING

Q88. Answer: b) 16 bits

Explanation: 8086 is a 16-bit microprocessor with 16-bit data bus, 20-bit address bus, and 16-bit
internal registers.

Q89. Answer: a) Segment × 16 + Offset

Explanation: Physical address = Segment × 16 + Offset = Segment × 10H + Offset. This gives 20-
bit address from two 16-bit values.

Q90. Answer: b) Programmable Interrupt Controller

 Explanation: 8259A is a PIC (Programmable Interrupt Controller) that manages up to 8 interrupt
requests and can be cascaded for more interrupts.

Q91. Answer: c) 3

Explanation: 8255A PPI (Programmable Peripheral Interface) has 3 ports: Port A (8-bit), Port B
(8-bit), and Port C (8-bit, can be split into two 4-bit ports).

Q92. Answer: b) Bypassing CPU

Explanation: In DMA (Direct Memory Access), data transfer occurs directly between memory and
I/O device, bypassing the CPU for faster operation.

Q93. Answer: a) Programmable timer

Explanation: 8254 is a programmable interval timer with 3 independent 16-bit counters, used for
timing, counting, and waveform generation.

Q94. Answer: b) Mnemonics

Explanation: Assembly language uses mnemonics (symbolic names) like MOV, ADD, SUB for
instructions, making it more readable than machine code.

CONTROL SYSTEMS
Q95. Answer: a) Stability

Explanation: Routh-Hurwitz criterion determines system stability without solving characteristic

equation. If all elements in first column are positive, system is stable.

Q96. Answer: b) One pole at origin

Explanation: Type of system = number of poles at origin (s=0). Type 0: no poles at origin; Type 1:
one pole; Type 2: two poles.

Q97. Answer: a) Zero

Explanation: For Type 1 system with unit step input, steady-state error ess = 1/(1+Kp) = 0, because
position error constant Kp = ∞.

Q98. Answer: b) Closed-loop poles as gain varies

Explanation: Root locus is the path traced by closed-loop poles in s-plane as open-loop gain K
varies from 0 to ∞.

Q99. Answer: c) Proportional, integral, and derivative action

Explanation: PID controller combines three actions: P (proportional - present error), I (integral -
past error accumulation), D (derivative - future error prediction).

Q100. Answer: b) Phase crossover frequency

 Explanation: Gain margin is measured at phase crossover frequency (where phase = -180°). It
indicates how much gain can increase before instability.

End of Answer Sheet