MP2238

High-Efficiency, 8A, 18V,

Synchronous Step-Down Converter

DESCRIPTION FEATURES
The MP2238 is a high frequency, synchronous,  Wide 4.2V to 18V Operating Input Range
rectified, step-down switch-mode converter. It  8A Continuous Output Current
offers a fully integrated solution to achieve an  22mΩ/10mΩ Low RDS(ON) Internal Power
8A continuous output current with excellent load MOSFETs
and line regulation over a wide input supply  Default 600mV Reference Voltage
range.  Adjustable Output Voltage
Constant-on-time (COT) control operation  600kHz Switching Frequency
provides fast transient response. Full protection  Ton Extension
features include hiccup over-current protection  Hiccup OCP Protection
and thermal shutdown.  Thermal Shutdown Protection
The MP2238 requires a minimal number of  Available in a 12-Pin QFN 2mmx3mm
readily available, standard, external Package
components with a space-saving 12-pin QFN APPLICATIONS
2mmx3mm package.
 Flat-Panel Television and Monitors
 Digital TV Power Supply
 Digital Set-Top Boxes
 Distributed Power Systems
 General Consumer
All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For
MPS green status, please visit the MPS website under Quality
Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are trademarks
of Monolithic Power Systems, Inc. or its subsidiaries.

TYPICAL APPLICATION

Efficiency
VOUT = 1V, L = 0.68μH, DCR = 3.1mΩ
100
95
90
EFFICIENCY (%)

85
80
75
70
65 Vin=5V
60 Vin=12V
55 Vin=18V
50
0.01 0.1 1 10
LOAD CURRENT (A)

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ORDERING INFORMATION
Part Number* Package Top Marking
MP2238GD QFN-12 (2mmx3mm) See Below

* For Tape & Reel, add suffix –Z (e.g. MP2238GD–Z).

TOP MARKING

BGB: Product code of MP2238GD

Y: Year code
WW: Week code
LLL: Lot number

PACKAGE REFERENCE
TOP VIEW

QFN-12 (2mmx3mm)

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PIN FUNCTIONS
PIN # Name Description
Enable pin. Pull EN high to enable the MP2238. EN has a 2MΩ pull-down resistor to
1 EN
GND.
2,8 SW Switch output. Connect using a wide PCB trace.
Bootstrap. Requires a 0.1µF capacitor between SW and BST to form a floating supply
3 BST
across the high-side switch driver.
System power ground. Reference ground of the regulated output voltage. Requires
4,5,6,7 GND special consideration during PCB layout. Connect to ground plane with copper traces
and vias.
Supply voltage. The MP2238 operates from a 4.2V to 18V input rail. Requires a ceramic
9 IN
capacitor to decouple the input rail. Connect using a wide PCB trace.
10 AGND Analog ground. Connect AGND to GND.
Feedback. Connect to the tap of an external resistor divider from output to GND to set
11 FB
the output voltage.
Internal bias supply. Decouple with a 1µF capacitor. The VCC capacitor should be
12 VCC
placed as close as possible to VCC and GND.

ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance

VIN …………………………….. ....... -0.3V to 20V QFN-12 (2mmx3mm) θJA θJC
VSW……………………… -0.3V (-6.5V for <10ns) EV2238-D-00A (5).................
34….. 9 ..…...°C/W
to VIN + 0.7V (25V for <25ns)
JESD51-7 (6)......................... 65…..13 …...°C/W
VBST……………………………. .............. VSW + 4V
VEN……………………………. ....................... 20V Notes:
1) Exceeding these ratings may damage the device.
All other pins……………… .............. -0.3V to 4V 2) The maximum allowable power dissipation is a function of the
Continuous power dissipation (TA = +25°C) (2)(5) maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
QFN-12 (2mmx3mm)…………………..….. 3.6W TA. The maximum allowable continuous power dissipation at
Junction temperature.………………….….150°C any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
Lead temperature.………………………... 260°C dissipation will cause excessive die temperature, and the
Storage temperature………..…. -65°C to 150°C regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
Recommended Operating Conditions (3) damage.
3) The device is not guaranteed to function outside of its
Supply voltage (VIN)……....………... 4.2V to 18V operating conditions.
Output voltage (VOUT).....……..……. 0.6V to 12V 4) For more information on DMAX, please see the Low-Dropout
Operation section on page 13.
or VIN*DMAX (4) 5) Measured on EV2238-D-00A, 4-layer PCB.
Operating junction temp (TJ). ....-40°C to +125°C 6) The value of θJA given in this table is only valid for comparison
with other packages and cannot be used for design purposes.
These values were calculated in accordance with JESD51-7,
and simulated on a specified JEDEC board. They do not
represent the performance obtained in an actual application.

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ELECTRICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C (7), typical value is tested at TJ = +25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
Supply current (shutdown) IIN VEN = 0V, TJ = 25°C 1 μA
Supply current (quiescent) Iq VFB = 0.63V, PFM mode 150 210 μA
HS switch on resistance HSRDS-ON VBST-SW = 3.3V 22 mΩ
LS switch on resistance LSRDS-ON 10 mΩ
VEN = 0V, VSW = 0V,
Switch leakage SWLKG 1 μA
TJ = 25°C
Low-side valley current limit ILIMIT_L 8 9.5 A
Low-side ZCD threshold IZCD 50 mA
Switching frequency fSW1 VIN = 12V, VOUT = 3.3V 480 600 720 kHz
Minimum off time (8) τOFF_MIN 170 ns
Minimum on time (8) tON_MIN 70 ns
TJ = 25°C 594 600 606 mV
Reference voltage VFB
TJ = -40°C to +125°C 591 600 609 mV
FB pin current IFB VFB = 0.63V 10 50 nA
EN rising threshold VEN_RISING 1.12 1.2 1.28 V
EN hysteresis VEN_HYS 200 mV
EN to GND pull-down resistor REN VEN = 2V 2 MΩ
VIN under-voltage lockout
INUVVth 3.55 3.85 4.15 V
threshold rising
VIN under-voltage lockout
INUVHYS 400 mV
threshold hysteresis
VCC regulator VCC ICC = 5mA 3.5 V
UVP1 threshold (8)
UVTH1 Hiccup entry 80% VREF
TJ = 25°C, from 10% to
Soft-start time TSS 90%
0.5 1 1.5 ms

Thermal shutdown (8) TTSD 150 °C

Thermal hysteresis (8)
TTSD_HYS 20 °C
Notes:
7) Not tested in production. Guaranteed by over-temperature correlation.
8) Guaranteed by design and engineering sample characterization.

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TYPICAL PERFORMANCE CHARACTERISTICS

Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 12V, VOUT = 1V, L = 0.68µH, TA = 25°C, unless otherwise noted.
Efficiency Efficiency
VOUT = 5V, L = 2.2μH, DCR = 11.4mΩ VOUT = 3.3V, L = 1.5μH, DCR = 4.3mΩ
100 100

95 95

EFFICIENCY (%)
EFFICIENCY (%)

90 90

85 85

80 80
Vin=7V Vin=5V
75 Vin=12V 75 Vin=12V
Vin=18V Vin=18V
70 70
0.01 0.1 1 10 0.01 0.1 1 10
LOAD CURRENT (A) LOAD CURRENT (A)

Efficiency Efficiency
VOUT = 2.5V, L = 1.5μH, DCR = 4.3mΩ VOUT = 1.8V, L = 1μH, DCR = 4.6mΩ
100 100
95 95
90
EFFICIENCY (%)
EFFICIENCY (%)

90
85
85 80

80 75
Vin=5V Vin=5V
70
75 Vin=12V Vin=12V
65
Vin=18V Vin=18V
70 60
0.01 0.1 1 10 0.01 0.1 1 10
LOAD CURRENT (A) LOAD CURRENT (A)

Efficiency Efficiency
VOUT = 1.2V, L = 1μH, DCR = 4.6mΩ VOUT = 1V, L = 0.68μH, DCR = 3.1mΩ
100 100
95 95
90 90
EFFICIENCY (%)

EFFICIENCY (%)

85 85
80 80
75 75
70 70
65 Vin=5V 65 Vin=5V
60 Vin=12V 60 Vin=12V
55 Vin=18V 55 Vin=18V
50 50
0.01 0.1 1 10 0.01 0.1 1 10
LOAD CURRENT (A) LOAD CURRENT (A)

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 12V, VOUT = 1V, L = 0.68µH, TA = 25°C, unless otherwise noted.
Load Regulation Line Regulation
IOUT = 0.01A to 8A VIN = 5V to 18V
0.3 0.3
LOAD REGULATION (%)

0.2

LINE REGULATION (%)

0.2

0.1 0.1

0 0

-0.1 Vin=5V -0.1

Iout=0.01A
-0.2 Vin=12V -0.2 Iout=4A
Vin=18V Iout=8A
-0.3 -0.3
0 1 2 3 4 5 6 7 8 4 6 8 10 12 14 16 18
LOAD CURRENT (A) INPUT VOLTAGE (V)
Case Temperature Rise vs. Load Enabled Supply Current vs. Input
Current Voltage
VIN = 12V, VOUT = 1V VEN = 2V, VFB = 0.63V
70 200
CASE TEMPERATURE RISE

180
60
160
ENABLED SUPPLY

50 140
CURRENT (μA)

40 120
(°C)

100
30 80
20 60
40
10
20
0 0
0 1 2 3 4 5 6 7 8 4 6 8 10 12 14 16 18
LOAD CURRENT (A) INPUT VOLTAGE (V)
Disabled Supply Current vs. Input Input Voltage Threshold vs.
Voltage Temperature
VEN = 0V
18 4.2
16 4
DISABLED SUPPLY

14
INPUT VOLTAGE
THRESHOLD (V)
CURRENT (nA)

3.8
12
10 3.6
8 3.4
6
3.2
4 Rising Threshold
2 3 Falling Threshold
0 2.8
4 6 8 10 12 14 16 18 -40 -20 0 20 40 60 80 100 120 140
INPUT VOLTAGE (V) TEMPERATURE (℃)

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 12V, VOUT = 1V, L = 0.68µH, TA = 25°C, unless otherwise noted.
EN Threshold vs. Temperature Switching Frequency vs. Temperature

1.4 680

1.3 660

SWITCHING FREQUENCY
EN THRESHOLD (V)

640
1.2
620
1.1 600

(kHz)
1 580
Rising Threshold 560
0.9
Falling Threshold 540
0.8 520
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
TEMPERATURE (℃) TEMPERATURE (℃)

FB Voltage vs. Temperature Valley Current Limit vs. Temperature

610 11
VALLEY CURRENT LIMIT

605 10.5
FB VOLTAGE (mV)

600 10

595 9.5
(A)

590 9

585 8.5

580 8
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
TEMPERATURE (℃) TEMPERATURE (℃)

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 12V, VOUT = 1V, L = 0.68µH, TA = 25°C, unless otherwise noted.
Input / Output Ripple Input / Output Ripple
IOUT = 0A IOUT = 8A

CH1: CH1:
VOUT/AC VOUT/AC
20mV/div. 20mV/div.
CH2: VIN/AC CH2:
50mV/div. VIN/AC
100mV/div.
CH3: VSW
10V/div. CH3: VSW
10V/div.

CH4: IL CH4: IL
2A/div. 5A/div.
4μs/div. 2μs/div.

Start-Up through Input Voltage Start-Up through Input Voltage

IOUT = 0A IOUT = 8A

CH1: VOUT CH1: VOUT

1V/div. 1V/div.
CH2: VIN CH2: VIN
10V/div. 10V/div.

CH3: VSW CH3: VSW

5V/div. 5V/div.
CH4: IL CH4: IL
2A/div. 5A/div.

1ms/div. 1ms/div.

Shutdown through Input Voltage Shutdown through Input Voltage

IOUT = 0A IOUT = 8A

CH1: VOUT
1V/div. CH1: VOUT
CH2: VIN 1V/div.
10V/div. CH2: VIN
10V/div.
CH3: VSW
5V/div. CH3: VSW
CH4: IL 5V/div.
2A/div. CH4: IL
5A/div.
20ms/div. 1ms/div.

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 12V, VOUT = 1V, L = 0.68µH, TA = 25°C, unless otherwise noted.
Start-Up through Enable Start-Up through Enable
IOUT = 0A IOUT = 8A

CH1: VOUT
CH1: VOUT
1V/div.
1V/div.
CH2: VEN
CH2: VEN
5V/div.
5V/div.

CH3: VSW
10V/div.
CH3: VSW
5V/div.
CH4: IL
CH4: IL
5A/div.
2A/div.
1ms/div. 1ms/div.

Shutdown through Enable Shutdown through Enable

IOUT = 0A IOUT = 8A

CH1: VOUT
CH1: VOUT
1V/div.
1V/div.
CH2: VEN
CH2: VEN
5V/div.
5V/div.

CH3: VSW
CH3: VSW
10V/div.
5V/div.
CH4: IL
2A/div. CH4: IL
5A/div.

200ms/div. 100µs/div.

Short-Circuit Entry Short-Circuit Recovery

CH1: VOUT CH1: VOUT

1V/div. 1V/div.

CH2: VIN CH2: VIN

10V/div. 10V/div.
CH3: VSW CH3: VSW
10V/div. 10V/div.
CH4: IL CH4: IL
5A/div. 5A/div.

10ms/div. 10ms/div.

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 12V, VOUT = 1V, L = 0.68µH, TA = 25°C, unless otherwise noted.
Short-Circuit Steady Transient Response
IOUT = 4A to 8A

CH1: VOUT CH1:

1V/div. VOUT/AC
50mV/div.
CH2: VIN
10V/div.
CH3: VSW
10V/div.
CH4: IOUT
CH4: IL 5A/div.
5A/div.

4ms/div. 100µs/div.

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FUNCTIONAL BLOCK DIAGRAM

2MEG

Figure 1: Functional Block Diagram

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OPERATION reaches zero, the LS-FET driver goes into tri-

state (high Z). The output capacitors discharge
PWM Operation
slowly to GND through the LS-FET, R1, and R2.
The MP2238 is a fully integrated, synchronous, This operation greatly improves device
rectified, step-down switch converter. The efficiency when the output current is low.
device uses constant-on-time (COT) control to
provide fast transient response and easy loop
stabilization. Figure 2 shows the simplified ramp
compensation block in the MP2238. At the
beginning of each cycle, the high-side MOSFET
(HS-FET) turns on whenever the ramp voltage
(VRAMP) is lower than the error amplifier output
voltage (VEAO), which indicates insufficient
output voltage. The on period is determined by
both the output voltage and input voltage, to
ensure the switching frequency is fairly constant Figure 3: Light-Load Operation
over a wide input voltage range.
Light-load operation is also called skip mode
After the on period elapses, the HS-FET enters because the HS-FET does not turn on as
the off state. By cycling the HS-FET between frequently as it does during heavy-load
the on and off states, the converter regulates conditions. The frequency at which the HS-FET
the output voltage. The integrated low-side turns on is a function of the output current. As
MOSFET (LS-FET) turns on when the HS-FET the output current increases, the current
is in its off state to minimize conduction loss. modulator regulates shorter time periods, and
Shoot-through occurs when both the HS-FET the HS-FET turns on more frequently. The
and LS-FET are turned on at the same time, switching frequency then increases in turn. The
causing a dead short between the input and output current reaches the critical level when
GND. Shoot-through dramatically reduces the current modulator time is zero, and can be
efficiency, and the MP2238 avoids this by determined using Equation (1):
internally generating a dead time (DT) between
(VIN  VOUT )  VOUT
when the HS-FET turns off and the LS-FET IOUT  (1)
2  L  FSW  VIN
turns on, or vice versa. The device enters
heavy-load operation or light-load operation The device reverts to PWM mode once the
depending on the amplitude of the output output current exceeds the critical level. Then
current. the switching frequency stays fairly constant
over the output current range.
Error Amplifier
REF
L VOUT
The error amplifier compares the FB voltage
FB/VOUT On
Timer
Logic
Control
SW
against the internal 0.6V reference (REF) and
RAMP RESR R1 outputs the PWM modulation signal. The
Cout
optimized internal ramp compensation
R2
minimizes the external component count and
simplifies the control loop design.
Enable
Figure 2: Simplified Compensation Block
EN is a digital control pin that turns the
Light-Load Operation regulator on and off. Drive EN high to turn on
When the MP2238 works in PFM and during the regulator; drive it low to turn it off. An
light-load operation, the switching frequency internal 2MΩ resistor is connected from EN to
automatically reduces to maintain high ground. EN can function with a 20V input
efficiency, and the inductor current drops near voltage, which allows EN to be connected
zero (see Figure 3). When the inductor current directly to VIN for automatic start-up.

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Under-Voltage Lockout (UVLO) current-sensing node, and should be connected

Under-voltage lockout (UVLO) protects the chip to the source terminal of the bottom MOSFET.
from operating at an insufficient supply voltage. The PWM is not allowed to initiate a new cycle
The MP2238 UVLO comparator monitors the before the inductor current falls to the valley
input voltage. The part is active when the input threshold.
voltage exceeds the UVLO rising threshold. After the MP2238 reaches the cycle-by-cycle
Soft Start and Pre-Bias Start-Up over-current limit, the output voltage drops until
VOUT is below the under-voltage (UV)
Soft start prevents the converter output voltage
threshold. There are two UV thresholds: 80%
from overshooting during start-up. When the
UV1 and 60% UV2. Once UV1 and OC are both
chip starts, the internal circuitry generates a
triggered, the MP2238 waits 30 cycles. If OC
soft-start voltage (SS) that ramps up from 0V to
exits after 31 cycles, the chip enters hiccup
internal VCC. When SS is lower than REF, the
mode to restart the part periodically. If UV2 and
error amplifier uses SS as the reference. When
OC are triggered, the MP2238 enters hiccup
SS is higher than REF, REF takes over.
mode after 3 cycles. This protection mode is
The soft-start time is internally set to 1ms (VOUT especially useful when the output is dead-
from 10% to 90%). If the output of the MP2238 shorted to ground. The average short-circuit
is pre-biased to a certain voltage during start-up, current is greatly reduced to alleviate thermal
the IC will disable the switching of both the issues and to protect the regulator. The
high-side and low-side switches until the MP2238 exits hiccup mode once it is no longer
voltage on the internal soft-start capacitor in an over-current condition.
exceeds the sensed output voltage at FB.
Thermal Shutdown
Low Dropout Operation Thermal shutdown prevents the MP2238 from
To improve dropout, the MP2238 is designed to operating at exceedingly high temperatures.
extend the on time when the duty cycle is over When the silicon die reaches temperatures that
85% of its typical value. The HS-FET on time exceed 150°C, it shuts down the whole chip.
then extends and the frequency drops. The When the temperature is less than its lower
typical minimum frequency is 260kHz. When threshold, typically 130°C, the chip is enabled
the frequency drops to 260kHz, it cannot again.
reduce anymore and the HS-FET off time starts
Floating Driver and Bootstrap Charging
to decrease. The duty cycle reaches DMAX when
the off time is down to its minimum value. If the An external bootstrap capacitor powers the
input voltage continues to drop, the MP2238 floating power MOSFET driver. This floating
works at max duty cycle and the output voltage driver has its own UVLO protection. This
drops. UVLO’s rising threshold is 1.2V, with a
hysteresis of 150mV. The bootstrap capacitor
The typical max duty cycle (DMAX) is determined voltage is regulated internally by VIN through D1,
with Equation (2): M1, C4, L1, and C2 (see Figure 4). If (VIN - VSW)
D MAX  1  TOFF _ MIN  fSW _ MIN (2) exceeds 3.3V, U1 will regulate M1 to maintain a
3.3V BST voltage across C4.
Where TOFF_MIN = 170ns and fSW_MIN = 260kHz.
Over-Current Protection and Hiccup
The MP2238 has cycle-by-cycle over-current
limiting control. The current-limit circuit employs
a low-side valley current-sensing algorithm. The
part uses the RDS(ON) of the LS-FET as a
current-sensing element for the valley current
limit. During the LS-FET turn-on, the inductor
current is monitored by the voltage between
GND and SW. GND is used as the positive

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 MP2238 – 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER

3.3V

Figure 4: Internal Bootstrap Charging Circuit

Start-Up and Shutdown
If both VIN and EN exceed their respective
thresholds, the chip starts. The reference block
starts first, generating stable reference voltage
and currents, and then the internal regulator is
enabled. The regulator provides a stable supply
for the remaining circuitries.
Three events can shut down the chip: EN low,
VIN low, and thermal shutdown. In the shutdown
procedure, the signaling path is blocked to
avoid any fault triggering, and then the internal
supply rail is pulled down.

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 MP2238 – 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER

APPLICATION INFORMATION capacitors for the best performance. Ceramic

capacitors with X5R or X7R dielectrics are
Setting the Output Voltage
recommended for best results because of their
The external resistor divider can set the output low ESR and small temperature coefficients.
voltage through FB. Choose R1 and R2 using For most applications, use two 22µF capacitors.
Equation (3):
Since C1 absorbs the input switching current, it
R1 requires an adequate ripple current rating. The
R2  (3)
VOUT RMS current in the input capacitor can be
1
0.6V estimated with Equation (6):
Table 1 lists the recommended feedback VOUT  VOUT 
I C1  ILOAD   1  (6)
resistor values for common output voltages. VIN  VIN 

Table 1: Resistor Selection for Common Output
The worst-case condition occurs at VIN = 2VOUT,
Voltages
determined using Equation (7):
VOUT (V) R1 (kΩ) R2 (kΩ)
ILOAD
1.0 40.2 60.4 I C1  (7)
2
1.2 40.2 40.2
1.8 100 49.9 For simplification, choose an input capacitor
with an RMS current rating greater than half of
2.5 100 31.6
the maximum load current.
3.3 100 22.1
The input capacitor can be electrolytic, tantalum,
5 100 13.7
or ceramic. When using electrolytic or tantalum
Selecting the Inductor capacitors, add a small, high-quality ceramic
Use a 0.47µH to 10µH inductor with a DC capacitor (e.g. 1μF) placed as close to the IC as
current rating at least 25% percent higher than possible. When using ceramic capacitors,
the maximum load current for most applications. ensure they have enough capacitance to
For highest efficiency, use an inductor with a provide sufficient charge to prevent excessive
DC resistance of less than 15mΩ. For most voltage ripple at the input. The input voltage
designs, the inductance value can be derived ripple caused by capacitance can be estimated
using Equation (4): with Equation (8):

VOUT  (VIN  VOUT ) ILOAD V  V  (8)

VIN   OUT   1  OUT 
L1  (4) fS  C1 VIN  VIN 
VIN  IL  fOSC
Selecting the Output Capacitor
Where ∆IL is the inductor ripple current.
The traditional COT control scheme is
The inductor ripple current should be intrinsically unstable if the output capacitor’s
approximately 30% of the maximum load ESR is not large enough as an effective
current. The maximum inductor peak current is current-sense resistor. The MP2238 has built-in
calculated with Equation (5): internal ramp compensation to ensure the
IL system is stable without the output capacitor’s
IL(MAX)  ILOAD  (5) ESR. The pure ceramic capacitor solution can
2 significantly reduce the output ripple, total BOM
Use a larger inductor for improved efficiency cost, and the board area.
under light-load conditions (below 100mA). The output capacitor (C2) maintains the DC
Selecting the Input Capacitor output voltage. Use ceramic, tantalum, or low
The input current to the step-down converter is ESR electrolytic capacitors. For best results,
discontinuous, and requires a capacitor to use low ESR capacitors to keep the output
supply the AC current to the converter while voltage ripple low. The output voltage ripple can
maintaining the DC input voltage. Use low ESR be estimated using Equation (9):

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VOUT  VOUT   1  (9) PCB Layout Guidelines (9)

VOUT   1    RESR  
fS  L1  VIN   8  fS  C2  PCB layout is very important for stable
operation. A 4-layer board is recommended for
Where L1 is the inductor value and RESR is the
better thermal performance. Figure 6 and
ESR value of the output capacitor.
Figure 7 show the top and bottom layers (Inner
For ceramic capacitors, the capacitance 1 and Inner 2 are GND). For best results, refer
dominates the impedance at the switching to Figure 6 and Figure 7, and follow the
frequency, and the capacitance causes the guidelines below:
majority of the output voltage ripple. For
1. Connect the input ground to GND using the
simplification, the output voltage ripple can be
shortest and widest trace possible.
estimated with Equation (10):
2. Connect the input capacitor to IN using the
VOUT  V  (10)
∆VOUT    1  OUT  shortest and widest trace possible.
8  fS 2  L1  C2  VIN 
3. Ensure all feedback connections are short
For tantalum or electrolytic capacitors, the ESR and direct. Place the feedback resistors and
dominates the impedance at the switching compensation components as close to the
frequency. For simplification, the output ripple chip as possible.
can be approximated with Equation (11):
4. Route SW away from sensitive analog
V  V  (11) areas, such as VOUT.
∆VOUT  OUT   1  OUT   RESR
fS  L1  VIN 
5. Connect AGND to PGND using the shortest
The characteristics of the output capacitor also and widest trace possible.
affect the stability of the regulation system. The Notes:
MP2238 can be optimized for a wide range of 9) The recommended layout is based on the Figure 8 in Typical
Application Circuit section.
capacitance and ESR values.
External Bootstrap Diode
An external bootstrap diode can enhance the
efficiency of the regulator if VIN is below 5V,
VOUT is 3.3V, and the duty cycle is high, which
can be determined using Equation (12):
VOUT
D= > 65% (12)
VIN
In these cases, add an external BST diode from
VCC to BST see Figure 5).

Figure 5: Optional External Bootstrap Diode to

Enhance Efficiency
The recommended external BST diode is
1N4148, and the recommended BST capacitor
value is 0.1µF.

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Design Example
Table 2 is a design example following the
application guidelines for the following
GND specifications:
Table 2: Design Example
VIN 12V
VOUT 1V
VIN IOUT 8A
VOUT
Figure 8 shows a detailed application
GND schematic. See the Typical Performance
Characteristics section on pages 5 to 10 for the
typical performance and circuit waveforms. For
Figure 6: Recommended PCB Layout, Top Layer
more device applications, see the related
evaluation board datasheets.

Figure 7: Recommended PCB Layout, Bottom

Layer

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TYPICAL APPLICATION CIRCUITS

Figure 8: VIN = 12V, Output = 1.0V/8A

Figure 9: VIN = 12V, Output = 1.2V/8A

Figure 10: VIN = 12V, Output = 1.8V/8A

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TYPICAL APPLICATION CIRCUITS (continued)

Figure 11: VIN = 12V, Output = 2.5V/8A

Figure 12: VIN = 12V, Output = 3.3V/8A

Figure 13: VIN = 12V, Output = 5V/8A

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 MP2238 – 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER

PACKAGE INFORMATION
QFN-12 (2mmx3mm)

NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third-
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.

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