Bipolar Junction Transistor & it’s Biasing

Basic Electronics

BE01000111
2nd Semester
 Classification of Transistor
Transistor can be classified as follow in different ways.

Classification Transistor

BJT FET
(Bipolar Junction Transistor) (Field Effect Transistor)

NPN PNP JFET MOSFET

Construction of Bipolar Junction Transistor (BJT)

BJT is introduced in 1948 by Shockley, BJT is an electronic component mainly used for
switching and amplification purpose.

BJT is called bipolar because the main flow of electrons through them takes place in two types
of semiconductor material P type and N type, as the main current goes from emitter to
collector (or vice versa). In other words, two types of charge carriers electrons and holes
comprise this main current through the transistor so it is called bipolar.

Transistor implies transfer of resistance because it transfers current from low resistance input
path to high resistance output path.

BJT is called a current controlled device where small current at the base side is used to
control the large current at other terminals.

BJT comes in two types called

- NPN transistor and
- PNP transistor

This transistor comes with two PN junctions.

- PN junction exists between emitter and base is called emitter-base junction
- PN junction exists between collector and base is called collector-base junction
It is composed of three terminals called Emitter (E), Base (B) and Collector(C)

All three terminals of the BJT are different in terms of their doping concentrations.

Emitter:
- It is heavily doped
- Moderate in size
- It emits/injects charge carriers into base for conduction of current

Base:
- It is lightly doped
- Small/Thin in size
- It passes most of charge carrier to collector. It provides channel/path to charge carrier
between emitter & collector

Collector:
- It is moderately doped
- Large in size
- It collects charge carriers from base which has been emitted by emitter.

Transistor Construction:

(1) NPN Transistor:

When single p-type semiconductor layer is sandwiched between two n-type semiconductor
layers, an NPN transistor is formed.

Construction Symbol of NPN

Unbiased NPN transistor:

When no voltage is applied to a transistor, it is said to be an unbiased transistor. At the left

side n-region (emitter) and right side n-region (collector), free electrons are the majority
carriers and holes are the minority carriers whereas in p-region (base), holes are the
majority carriers and free electrons are the minority carriers.

The free electrons in the n regions will spread in all directions. Some of the free electrons
from the n region will diffuse across the junction and recombine with the holes in the p
region. The result is two depletion layers, as shown in Figure.
(2) PNP Transistor:

When single n-type semiconductor layer is sandwiched between two p-type semiconductor
layers, an PNP transistor is formed. Construction and symbol of PNP transistor is as shown
in figure.

Construction Symbol of PNP

Unbiased PNP transistor:

When no voltage is applied to a pnp transistor, it is said to be an unbiased pnp transistor. At
the left side p-region (emitter) and right side p-region (collector), holes are the majority
carriers and free electrons are the minority carriers whereas in n-region (base), free
electrons are the majority carriers and holes are the minority carriers.

Therefore, the holes at the left side p-region (emitter) and right side p-region (collector)
experience a repulsive force from each other. As a result, the holes at the left side and right
side p-regions (emitter and collector) will move into the n-region (base).

During this process, the holes meet the free electrons in the n-region (base) and recombines
with them. As a result, depletion region (positive and negative ions) is formed at the emitter to
base junction and base to collector junction.
 Operating region of Bipolar Junction Transistor (BJT)
A transistor has two junctions, emitter-base junction and a collection-base junction. There
are four possible ways of biasing these two junctions.

Emitter Base Junction Collector base Junction

Condition Operating Region
(E-B Junction) (C-B Junction)

1 FR Forward Biased Reverse Biased Active

2 FF Forward Biased Forward Biased Saturation

3 RR Reverse Biased Reverse Biased Cutoff

4 RF Reverse Biased Forward Biased Inverted(Not Used)

Various Voltages and Currents in Bipolar Junction Transistor (BJT)

In transistor notation used for various voltages and currents as well as direction of various
currents and polarity of voltages are as follows.
VCC Collector Battery Voltage IC Collector Current
VEE Emitter Battery Voltage IE Emitter Current
VBB Base Battery Voltage IB Base Current
VC Collector Terminal Voltage VBE Voltage across Emitter-Base Jn.
VE Emitter Terminal Voltage VCB Voltage across Collector-Base Jn.
VB Base Terminal Voltage VCE Voltage across Collector-Emitter Jn.

BJT in Active Region

The heavily doped emitter, emit or inject its free electrons into the base. The lightly doped
base passes emitter-injected electrons on to the collector. The collector is so named because
it collects or gathers most of the electrons from the base.
If VEE is greater than the emitter-base barrier potential then emitter electrons will enter the
base region, as shown in Figure. Theoretically, these free electrons can flow in either of two
directions. Either they can flow through base and towards positive terminal of battery V EE.
Otherwise, the free electrons can flow into the collector.

But as the base is lightly doped and very thin, free electrons entered into base gets very less
amount of time for recombination in the base region. For this reason almost all the emitter-
injected electrons pass through the base to the collector. Only a few free electrons will
recombine with holes in the lightly doped base and will flow through the base and toward
the positive side of the VEE supply.

Almost all the free electrons go into the collector, as shown in Figure. Once they are in the
collector, they feel the attraction of the VCC source voltage. Because of this, the free electrons
flow through the collector and through RC until they reach the positive terminal of the
collector supply voltage.

Thus VEE forward-biases the emitter diode, forcing the free electrons in emitter to enter the
base. The thin and lightly doped base gives almost all these electrons enough time to diffuse
into the collector. These electrons flow through the collector, through RC, and into the
positive terminal of the VCC voltage source. Even though CB junction is reverse biased
electron from emitter could able to reach to collector.

Emitter efficiency (emitter injection ratio):

It is defined as the ration of charge carriers injected by emitter into the base to total emitter
current. It is denoted by symbol 𝜸 (gamma).

𝑐ℎ𝑎𝑟𝑔𝑒 𝑐𝑎𝑟𝑟𝑖𝑒𝑟 𝑖𝑛𝑗𝑒𝑐𝑡𝑒𝑑 𝑏𝑦 𝑒𝑚𝑖𝑡𝑡𝑒𝑟 𝑎𝑡 𝐸𝐵 𝑗𝑢𝑛𝑐𝑡𝑖𝑜𝑛 𝐼𝑛𝐸 𝐼𝑛𝐸

γ= = =
𝑇𝑜𝑡𝑎𝑙 𝑒𝑚𝑖𝑡𝑡𝑒𝑟 𝑐𝑢𝑟𝑟𝑒𝑚𝑦 𝐼𝑛𝐸 + 𝐼𝑝𝐸 𝐼𝐸

For NPN transistor total emitter current is due to emitted electrons 𝐼𝑛𝐸 as well as due to
minority charge carrier hole 𝐼𝑝𝐸. Current due to minority charge carriers is very small. Typical
value of 𝜸 is 0.995
Base Transportation factor 𝜷 * :

It is defined as the ration of charge carriers reaching/arriving at collector to the number of

emitted charge carriers. It is denoted by symbol 𝜷 * or 𝜷 ‘ (Beta).

injected charge carriers reaching/arriving at collector 𝐼𝑛𝐶

𝜷∗ = =
charge carriers emitted by emitter 𝐼𝑛𝐸

For NPN transistor charge carriers (electrons) emitted by emitter is 𝐼𝑛𝐸 and charge carriers
(electrons) reaching at collector is 𝐼𝑛𝐶. Typical value of 𝜷 * is 0.995.

Large signal current gain 𝜷 * :

It is defined as the ration of collector current increment to total emitter current. It is

denoted by symbol 𝜷 * or 𝜷 ‘ (Alpha).

= collector currentincreament 𝐼𝐶 − 𝐼𝐶𝐵𝑂 𝐼𝑛𝐶

𝜶 = =
total emitter current 𝐼𝑛𝐸 + 𝐼𝑝𝐸 𝐼𝐸

For NPN transistor total emitter current is due to emitted electrons 𝐼𝑛𝐸 as well as due to
minority charge carrier hole 𝐼𝑝𝐸. Increment in collector current is 𝐼𝐶 − 𝐼𝐶𝐵𝑂 , where 𝐼𝐶𝐵𝑂 is
collector to base leakage current when emitter is open (due to minority charge carrier in
collector). Typical value of 𝜷 * is 0.9 to 0.995.

Different Current components in Transistor and their relationship:

There are three different currents in a transistor: emitter current IE, base current IB, and
collector current IC.

Direction of currents in PNP transistor Direction of currents in NPN transistor

Because the emitter is the source of the electrons, it has the largest current. Since most of the
emitter electrons flow to the collector, the collector current is almost as large as the emitter
current. The base current is very small by comparison, often less than 1 percent of the
collector current.
Relation of Currents:

As per Kirchhoff’s current law. It says that the sum of all currents into a point or junction
equals the sum of all currents out of the point or junction. When applied to a transistor,
Kirchhoff’s current law gives us this important relationship:

IE = IB + Ic

This says that the emitter current is the sum of the collector current and the base current.
Since the base current is so small, the collector current approximately equals the emitter
current.
IC ≈ IE

and the base current is much smaller than the collector current:

IB << IC

Current Gain in transistor and it’s relation:

Current Gain Alpha (αdc ) :

The current gain alpha dc (αdc) is defined as the ratio of dc collector current to dc emitter
current.
𝐼𝐶
𝛂dc =
𝐼𝐸
Since the collector current almost equals the emitter current, the dc alpha is slightly less than
1. For instance, in a low-power transistor, the dc alpha is typically greater than 0.99. Even in
a high-power transistor, the dc alpha is typically greater than 0.95.

Current Gain Beta (βdc ) :

The current gain Beta dc (βdc) is defined as the ratio of dc collector current to dc base current.
𝐼𝐶
𝛃dc =
𝐼𝐵

The dc beta is also known as the current gain because a small base current controls a much
larger collector current. The current gain is a major advantage of a transistor and has led to
all kinds of applications.
For low-power transistors (under 1 W), the current gain is typically 100 to 300. High- power
transistors (over 1 W) usually have current gains of 20 to 100.

Relation between current gain αdc and βdc

The emitter current equation is

IE = IB + Ic------------------------------------- (1)
Dividing equation (1) by IC
 𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶
𝐼𝐶 𝐼𝐶 𝐼𝐶

1 1
= + 1 ---- (2)
𝛂𝑑𝑐 𝛃𝑑𝑐

1 1 + 𝛃𝑑𝑐
=
𝛂𝑑𝑐 𝛃𝑑𝑐

---- (3)

Equation (3) indicates 𝛂𝑑𝑐 in terms of 𝛃𝑑𝑐

Rearranging equation (2) again

1 1
= − 1
𝛃𝑑𝑐 𝛂𝑑𝑐

---- (4)

Equation (4) indicates 𝛃 in terms of 𝛂𝑑𝑐

Types of Transistor Configurations

Transistor has three terminals namely emitter (E), base (B), and collector (C). But to connect
a transistor in the circuit, we need four terminals, two terminals for input and other two
terminals for output. If one of the three terminals is used as common to both input and output
then transistor can be considered as two port network.
 When a transistor is to be connected in a circuit, one terminal is used as the input terminal,
the other terminal is used as the output terminal and the third terminal is common to the
input and output. That means here input is applied between the input terminal and common
terminal, and the corresponding output is taken between the output terminal and common
terminal.

Depending upon the terminal which is used as a common terminal to the input and output
terminals, the transistor can be connected in the following three configurations. They are:

(i) Common base (CB) configuration

(ii) Common emitter (CE) configuration
(iii) Common collector (CC) configuration

In every configuration, the base-emitter junction is always forward biased and the collector-
base junction is always reverse biased to operate the transistor as a current amplifier.

Common base (CB) configuration

In common base configuration, emitter is the input terminal, collector is the output terminal,
and base is the common terminal. The base terminal is grounded in the common base
configuration. So the common base configuration is also known as grounded base
configuration.

Common emitter (CE) configuration

In common emitter configuration, base is the input terminal, collector is the output terminal,
and emitter is the common terminal. The emitter terminal is grounded in the common
emitter configuration. So the common emitter configuration is also known as grounded
emitter configuration.

Common collector (CC) configuration

In common collector configuration, base is the input terminal, emitter is the output terminal,
and collector is the common terminal. The collector terminal is grounded in the common
collector configuration. So the common collector configuration is also known as grounded
collector configuration

Common Base Configuration of Transistor (CB Configuration)

In common base configuration, emitter is the input terminal, collector is the output terminal,
and base is the common terminal between input and output.

As shown in figure EB junction is forward biased and CB junction is reverse biased. To

forward bias EB junction VEE battery is connected and to reverse bias CB junction VCC battery
is connected as shown in figure. Resistance RE and RC are current limiting resistors.
 Current Gain and different current components in CB configuration:

Current Gain αdc :

It is defined as the ration of output current IC to Input current IE. it is dented by αdc

𝐼𝐶 (𝑖𝑛𝑗) is injected charge carrier into the collector from emitter

𝐼𝐶𝐵𝑂 is reverse leakage current between collector to base when emitter is open.
Which is very small. If we neglect 𝐼𝐶𝐵𝑂 then 𝛂𝑑𝑐 is approximated to

𝐼𝐶
𝛂dc =
𝐼

Collector current IC :
𝐼𝐶 = 𝛂𝑑𝑐𝐼𝐸 + 𝐼𝐶𝐵𝑂
as 𝐼𝐶𝐵𝑂 is very small, If we neglect 𝐼𝐶𝐵𝑂 then collector current 𝐼𝐶 is approximated to

𝐼𝐶 ≌ 𝛂𝑑𝑐𝐼𝐸

Emitter current is sum of Base current 𝐼𝐵 and collector current 𝐼𝐶

𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵
Base current IB :
𝐼𝐵 = 𝐼𝐸 − 𝐼𝐶

Putting the value of 𝐼𝐶

𝐼𝐵 = 𝐼𝐸 − 𝛂𝑑𝑐𝐼𝐸 − 𝐼𝐶𝐵𝑂

𝐼𝐵 = 𝐼𝐸(1 − 𝛂𝑑𝑐 ) − 𝐼𝐶𝐵𝑂

𝐼𝐵 ≌ 𝐼𝐸(1 − 𝛂𝑑𝑐 )

Input Characteristic of CB configuration:

Input characteristic is the relation between transistors input current IE and input voltage VBE,
keeping the output voltage VCB constant.

Base width modulation/Early effect:

In CB configuration of transistor, if we increase VCB, then depletion layer at CB junction will

increase, which results in decrease in effective base width. Hence concentration gradient at
EB junction will increase, which allows more electrons from emitter to diffuse into the base.
So emitter current IB will increase. Thus when collector base voltage VCB is increases, emitter
current IE will also increases.

The change in effective base width due to change in VCB is called Base width modulation or Early
effect.
Output Characteristic of CB configuration:

Output characteristic is the relation between transistors output current IC and output
voltage VCB, keeping the input current IE constant.

If an excessive reverse-bias voltage is applied to the collector-base junction, the device

breakdown may occur.

As reverse bias voltage VCB is increases, collector-base depletion region also increases. If an
excessive reverse-bias voltage is applied then collector-base depletion region penetrating
into the base until it makes contact with emitter-base depletion region This condition is
known as punch through or reach through effect. A Very large currents can flow when it
occurs and possible destroying the device.

Transfer Characteristic of CB configuration

Transfer characteristic is the relation between transistors output current IC and input
current IE for constant VCB voltage. It is linear as shown in figure.
 Circuit diagram and output characteristic of CB configuration using PNP transistor:

Common Emitter Configuration of Transistor (CE Configuration)

In common emitter configuration, base is the input terminal, collector is the output terminal,
and emitter is the common terminal between input and output.

As shown in figure EB junction is forward biased and CB junction is reverse biased. To

forward bias EB junction VBB battery is connected and to reverse bias CB junction VCC battery
is connected as shown in figure. Resistance RB and RC are current limiting resistors.

Current Gain and different current components in CE configuration:

Current Gain 𝜷dc :

It is defined as the ration of output current IC to Input current IB. it is dented by 𝜷dc or 𝜷. It
is represented by equation
𝐼𝐶 (𝑖𝑛𝑗) 𝐼𝐶 − 𝐼𝐶𝐸𝑂
= - --- (1)
𝐼 𝐼

In equation (1)
𝐼𝐶 (𝑖𝑛𝑗) is injected charge carrier into the collector from emitter
𝐼𝐶𝐸𝑂 is reverse leakage current between collector to emitter when base is open. Which is
very small. If we neglect 𝐼𝐶𝐸𝑂 then β𝑑𝑐 is approximated to
 𝐼
---- (2)

Collector current IC :

From equation (1), collector current can be written as

𝐼𝐶 = β𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂 ---- (3)

as 𝐼𝐶𝐸𝑂 is very small, If we neglect 𝐼𝐶𝐸𝑂 then collector current 𝐼𝐶 is approximated to

𝐼𝐶 ≌ β𝑑𝑐𝐼𝐵
Emitter current IE :

Emitter current is sum of Base current 𝐼𝐵 and collector current 𝐼𝐶

𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵 ------------------ (4)

Putting the value of 𝐼𝐶 in equation (4) from equation (3)

𝐼𝐸 = β𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂 + 𝐼𝐵

𝐼𝐸 = 𝐼𝐵( 1 + β𝑑𝑐) + 𝐼𝐶𝐸𝑂

---- (5)

𝐼𝐸 ≌ 𝐼𝐵( 1 + β𝑑𝑐)
Base current IB :
Base current 𝐼𝐵 is
𝐼𝐵 = 𝐼𝐸 − 𝐼𝐶 ---------------------------- (6)

Input Characteristic of CE configuration:

Input characteristic is the relation between transistors input current IB and input voltage
VBE, keeping the output voltage VCE constant.
 Output Characteristic of CE configuration:

Output characteristic is the relation between transistors output current IC and output voltage
VCE, keeping the input current IB constant.

If an excessive reverse-bias voltage is applied to the collector-emitter junction, the device

breakdown may occur.

Transfer Characteristic of CE configuration

Transfer characteristic is the relation between transistors output current IC and input
current IB for constant VCB voltage. It is linear as shown in figure.

Common Collector Configuration of Transistor (CC Configuration)

In common collector configuration, base is the input terminal, emitter is the output terminal,
and collector is the common terminal between input and output.

As shown in figure EB junction is forward biased and CB junction is reverse biased. To

forward bias EB junction VBB battery is connected and to reverse bias CB junction VCC battery
is connected as shown in figure. Resistance RB and RE are current limiting resistors.
The above circuit can be redrawn as follow:

Current Gain and different current components in CE configuration:

Current Gain 𝛾dc :

It is defined as the ration of output current IE to Input current IB. it is dented by 𝛾dc or 𝛾. It
is represented by equation

γ = = - --- (1)
𝐼 𝐼

In equation (1)
𝐼𝐶 ≌ β𝑑𝑐𝐼𝐵

Hence,

- ---- (2)

Collector current IC :

As we know that collector current can be written as

𝐼𝐶 = α𝑑𝑐𝐼𝐸 + 𝐼𝐶𝐵𝑂
 or
𝐼𝐶 = β𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂 -------------------- (3)

as 𝐼𝐶𝐸𝑂 is very small, If we neglect 𝐼𝐶𝐸𝑂 then collector current 𝐼𝐶 is approximated to

𝐼𝐶 ≌ β𝑑𝑐𝐼𝐵

Emitter current IE :

Emitter current is sum of Base current 𝐼𝐵 and collector current 𝐼𝐶

𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵 ------------------ (4)

Putting the value of 𝐼𝐶 in equation (4) from equation (3)

𝐼𝐸 = β𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂 + 𝐼𝐵

𝐼𝐸 = 𝐼𝐵( 1 + β𝑑𝑐) + 𝐼𝐶𝐸𝑂

---- (5)

𝐼𝐸 ≌ 𝐼𝐵( 1 + β𝑑𝑐)
Base current IB :

Base current 𝐼𝐵 is
𝐼𝐵 = 𝐼𝐸 − 𝐼𝐶 ---------------------------- (6)

Input Characteristic of CC configuration:

Input characteristic is the relation between transistors input current IB and input voltage
VBC, keeping the output voltage VCE constant.

Output Characteristic of CC configuration:

Output characteristic is the relation between transistors output current IE and output
voltage VEC, keeping the input current IB constant.
 If an excessive reverse-bias voltage is applied to the collector-emitter junction, the device
breakdown may occur.

Transfer Characteristic of CC configuration

Transfer characteristic is the relation between transistors output current IE and input
current IB for constant VCE voltage. It is linear as shown in figure.

Relation between current gain α, β and 𝜷

The emitter current equation is

IE = IB + Ic------------------------------------- (1)
Dividing equation (1) by IC

𝐼𝐸 𝐼𝐵 𝐼𝐶
= +
𝐼𝐶 𝐼𝐶 𝐼𝐶

1 1
= + 1 ---- (2)
𝛼 𝛽

1 1+ β
=
α β
 β
α=
1+ β
---- (3)
Equation (3) indicates α in terms of β
Rearranging equation (2) again
1 1
= − 1
β α

α
β=
1− α ---- (4)

Equation (4) indicates β in terms of α

Also the emitter current equation is

IE = IB + Ic -------------------------------------(5)

Dividing equation (7) by IB

𝐼𝐸 𝐼𝐵 𝐼𝐶
= +
𝐼𝐵 𝐼𝐵 𝐼𝐵

𝜸 = 1+ β ---- (6)

Comparison between CB, CE and CC configuration of transistor

Sr.
No. Parameters CB CE CC
Common terminal between
1 Base Emitter Collector
input and output
2 Input current IE IB IB
3 Output current IC IC IE
𝐼𝐶 𝐼𝐶 𝐼𝐸
α𝑑𝑐 = β𝑑𝑐 = γ𝑑𝑐 =
4 Current Gain 𝐼𝐸 𝐼𝐵 𝐼𝐵

Low High High

5 Input voltage VEB VBE VCB

6 Output voltage VCB VCE VEC
7 Voltage gain Medium High Low
Very low Medium Very high
8 Input Impedance
(20 Ω) (1 KΩ) (1 MΩ)

Very high High Very low

9 Output impedance
(1 MΩ) (40 KΩ) (50 Ω)
10 Power gain Medium Very High Medium

11 Leakage current Low High High

In phase with Out of phase In phase with
12 Signal Phase
input with input input
Impedance
13 Application Preamplifier Audio Amplifier
matching
Why CE configuration is most preferred?

Out of three configuration of transistor, CE configuration is most popular and widely used
because of following reason
(i) It has high current and voltage gain.
(ii) Power gain is high.
(iii) Input and Output impedance are moderate/high. Hence many such stage
of CE configuration can be coupled/cascaded to gather without any
additional impedance matching circuit.

Examples

Example-1
For NPN transistor connected in CE configuration as shown in figure, calculate transistor
currents and 𝜶. Given data are 𝜷 = 100, ICO = 2 x 10-8 mA.

Base Current:
Apply KVL law at input loop.
𝑉𝐵𝐵 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸
Assuming 𝑉𝐵𝐸 = 0.7 V
5 = 𝐼𝐵 (200 𝑥 103) + 0.7

𝐼𝐵 = 𝟐𝟏. 𝟓 μA
--- (1)
Collector Current:
𝐼𝐶 = 𝛽𝐼𝐵 + 𝐼𝐶𝑂

Putting the value of IB from equation (1)

𝐼𝐶 = 100 𝑥 (21.5 𝑥 10−6) + 2 𝑥 10−8

𝐼𝐶 = 𝟐. 𝟏𝟓 𝒎A
---- (2)

Emitter Current:
𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶
Putting the value of IB and IC from equation (1) and (2)

𝐼𝐸 = (21.5 𝑥 10−6) + 2.15 𝑥 10−3

𝐼𝐸 = 𝟐. 𝟏𝟕 𝒎A
- --- (3)
Current Gain 𝜶:

𝐼𝐶 2.15 --- (4)

𝛼= = = 0.99
𝐼𝐸 2.17
Also

β 100
α= = = 0.99
1+ β 1 + 100

Example-2
For NPN transistor connected in CE configuration as shown in figure, calculate transistor
currents IB, IC, VCE, and PD if 𝜷 = 300.

Base Current:
Apply KVL law at input loop.

𝑉𝐵𝐵 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸
Assuming 𝑉𝐵𝐸 = 0.7 V
𝐼 = 𝑉𝐵𝐵 − 𝑉𝐵𝐸 = 10 − 0.7 = 9.3 𝑥 10−3
𝐵 𝑅𝐵 1 𝑥 106

𝐼𝐵 = 𝟗. 𝟑 μA
--- (1)
Collector Current:
𝐼𝐶 = 𝛽𝐼𝐵

Putting the value of IB from equation (1)

𝐼𝐶 = 300 𝑥 (9.3 𝑥 10−6)

𝐼𝐶 = 𝟐. 𝟕𝟗 𝒎A
 Collector to Emitter voltage 𝑉𝐶𝐸:

Apply KVL law at output loop.

𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐸
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶
Putting the value of IB and IC from equation (1) and (2)
𝑉𝐶𝐸 = 10 − 2.79 𝑥 10−3 x 2 x 103

𝑉𝐶𝐸 = 𝟒. 𝟒𝟐 𝒗𝒐𝒍𝒕 - ---- (3)

Power dissipation PD:

𝑃𝐷 = 𝑉𝐶𝐸 𝐼𝐶 = 4.42 𝑥 2.79 𝑥 10−3 = 𝟏𝟐. 𝟑 x 10−3

--- (4)

𝑃𝐷 = 𝟏𝟐. 𝟑 mW

Transistor Biasing & Thermal Stability

Transistor Biasing & Need of biasing

What is Biasing?

Use of DC potential (DC Battery/power supply) to establish the operating condition of

transistor is called biasing.

Transistor can be operated in either of three regions

Condition (E-B Junction) (C-B Junction) Operating Region Application

FR Forward Biased Reverse Biased Active Amplifier

FF Forward Biased Forward Biased Saturation Switch

RR Reverse Biased Reverse Biased Cutoff Switch

In order to operate in either of region, DC battery/power supply is required to be connected

with correct polarity.

Biasing in electronics means establishing predetermined voltages or currents at various

points of an electronic circuit for the purpose of establishing proper operating conditions in
electronic components.
 Need of Biasing :

To stabilize the operating point Q.

To set operating point Q, at center of DC load line.
To reduce the value of stability factor (S)
Stabilize the collector current against temperature variations.
To operate the transistor in active region as an amplifier OR To operate the
transistor as a switch

DC Load line and Operating point Q

The DC load line represents the desirable combinations of the collector current IC and the
collector-emitter voltage VCE. It is drawn when no signal is given to the input, and the
transistor biased with DC supply.
Consider the CE configuration of transistor as shown in figure.

For the given circuit, applying KVL low at output loop,

𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐸 ----------------------- (1)

𝑉𝐶𝐶 − 𝑉𝐶𝐸
𝐼𝐶 =
𝑅𝐶
Rearranging equation (1)

1 𝑉𝐶𝐶
𝐶𝐸 ---- (2)
𝐶 𝑅𝐶

Equation (2) is like the equation of straight line i.e. y = mx + C

The straight line represented by equation (2) is called DC Load Line.

In equation (2) when 𝑉𝐶𝐸 = 0,
𝑉𝐶𝐶
𝐼𝐶 =
𝑅𝐶

This is maximum possible current through transistor. Hence

𝑉𝐶𝐶
𝑅𝐶 ---- (3)
Equation (3) is maximum possible current through transistor. So it is called Saturation
point. Hence
𝑉𝐶𝐶
𝑅𝐶

Now, in equation (2) when 𝐼𝐶 = 0,

𝑉𝐶𝐸 = 𝑉𝐶𝐶

This is maximum possible voltage across transistor. Hence

𝑉𝐶𝐸(𝑚𝑎𝑥) = 𝑉𝐶𝐶 ---- (4)

Equation (4) is maximum possible voltage across transistor. So it is called cut-off point.
Hence
𝑉𝐶𝐸(𝑐𝑢𝑡−𝑜𝑓𝑓) = 𝑉𝐶𝐶

Line joining the Saturation and cut-off point is called DC Load Line. it is a straight line as
shown in figure. Any point/value corresponding to 𝐼𝐶 and 𝑉𝐶𝐸 will be on this DC Load Line

The DC Load Line is shown with output characteristic of transistor.

Q point (Quiescent point)

The Q point is also called operating point OR Bias point OR Quiescent point.

It the point on DC Load Line, which represents the DC current 𝐼𝐶𝑄 through transistor and
voltage 𝑉𝐶𝐸𝑄 across transistor in quiescent or steady state/DC condition.
 The co-ordinates of Q point are 𝐼𝐶𝑄 and 𝑉𝐶𝐸𝑄.

Q = (𝐼𝐶𝑄 , 𝑉𝐶𝐸𝑄)

The position of Q point on dc load line depends on application of transistor. Fwhen transistor
is used as an amplifier, operating point Q should set at the center of dc load line to avoid
distortion in output waveform.

Position of Q point on dc load line is determined base on it’s application,

Application Position of Q point

ON switch At cut-off point/Region

OFF switch At saturation point/Region

At center of dc load line/
Amplifier
In Active Region

Factors affecting the stability of Q point

Ideally Q point must be stable. It should not shift upward or downward on dc load line. But
practically, Q point is unstable and changes it’s position on dc load line. the factors affecting
the stability of Q point are

(iv) Change in temperature

(v) Change in value of βdc
(vi) Variation in transistor parameters from one device to another.

(1) Q point instability due to Temperature.

As temperature changes, current through transistor will also change. Due to change in
junction temperature of transistor it’s parameter like VBE , βdc and ICBO will change. Which
in turn results in change in operating point Q (𝐼𝐶𝑄 , 𝑉𝐶𝐸𝑄).

(2) Q point instability due to change in βdc

Collector current of transistor is related with βdc, as per equation 𝐼𝐶 = 𝛽𝐼𝐵. Hence is βdc
changes then collector current will also change. Which in turn results in change in
operating point Q (𝐼𝐶𝑄 , 𝑉𝐶𝐸𝑄).

(3) Q point instability due to variation in transistor parameter

Parameters like βdc of two transistor with same number, type and manufacturer are
slightly different in value. So when one transistor is replaced by another transistor, it’s
collector current will also change. Which in turn results in change in operating point Q
(𝐼𝐶𝑄 , 𝑉𝐶𝐸𝑄).
Stability factor:

Stability factor indicates the stability of Q point against the variation/change in transistor
parameters. Stability of Q point in transistor depends on following three parameters.

Reverse Leakage current ICO

Current gain βdc
Base to emitter voltage VBE

Stability factor S:

It is defined as the ratio of change in collector current due to change in reverse saturation
current/leakage current ICO, when βdc and VBE are constant.

∆ 𝐼𝐶
𝑺=
∆ 𝐼𝐶𝑂
For constant βdc and VBE

Stability factor S ’ :

It is defined as the ratio of change in collector current due to change in VBE, when βdc and ICO
are constant
∆ 𝐼𝐶
𝑺′ =
∆ 𝑉𝐵𝐸 For constant βdc and ICO

Stability factor S ‘’ :

It is defined as the ratio of change in collector current due to change in βdc, when VBE and ICO
are constant
∆ 𝐼𝐶
𝑺′′ =
∆ 𝛽𝑑𝑐 For constant VBE and ICO

Ideally the value of stability factor should be Zero. Practically it should be small as
possible.

Bias Stabilization Techniques/Biasing Circuits:

Bias stabilization is a process of stabilizing the Q point. Hence biasing circuit is required to
be designed to keep operating point stable on dc load line.

Requirement of biasing circuits

To establish the operating point Q at the middle of load line.

Stabilize collector current against variation in temperature.
To make operating point Q independent of transistor parameter.
Various biasing circuits
(i) Fixed Bias circuit.
(ii) Collector to Base Bias circuit.
(iii) Voltage Divider Bias circuit.

Fixed Bias Circuit (Single Base Resistor Bias/Base Bias):

The fixed-bias configuration is the simplest of transistor biasing arrangement. Fixed bias
circuit is as shown in figure

Steps to find Q point:

Input section:

DC equivalent circuit can be drawn as follow.

Let us consider only the input section of circuit

If we apply KVL law at input loop then,

𝑉𝐶𝐶 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 ----------------------- (1)

from equation (1), base current is given as

𝑉𝐶𝐶 − 𝑉𝐵𝐸
𝑅 --- (2)

Since 𝑉𝐵𝐸 is very small, it can be neglected compared to 𝑉𝐶𝐶 then equation (2) can be
approximated to
𝑉𝐶𝐶
𝐼𝐵 ≌
𝑅𝐵
Output section:

Let us consider only the output section of circuit

The collector current in terms of Base current is derived by equation

𝐼𝐶 = 𝛽𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂 --- (3)

If we apply KVL law at output loop then,

𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐸 ----------------------- (4)

from equation (4), collector to emitter voltage is given as

𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 --- (5)

Equation (3) and (5) are the equation of operating point Q

𝐼𝐶𝑄 = 𝛽𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂

𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶

Stabilization of Q point in Fixed bias circuit:

- The fixed bias circuit is simple and easy to design. But still it is seldom used because it
can not stabilize operating point Q.
- if temperature increases then leakage current 𝐼𝐶𝐸𝑂 will change, which will result in
change in 𝐼𝐶𝑄 corresponding to Q point.
- Also if transistor is replaced by another transistor then 𝛽𝑑𝑐 may change which results in
change in 𝐼𝐶𝑄 corresponding to Q point.

Collector to Base Bias Circuit:

In collector to base bias configuration, base resistor RB is connected to the collector

terminal instead of battery VCC. collector to base bias circuit is as shown in figure.

Steps to find Q point:

Input section:

Let us consider only the input loop/section of circuit

If we apply KVL law at input loop then,

𝑉𝐶𝐶 = (𝐼𝐶 + 𝐼𝐵 ) 𝑅𝐶 + 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 ----------------------- (1)

 𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + (𝑅𝐶 + 𝑅𝐵) 𝐼𝐵 + 𝑉𝐵𝐸

from equation (1), base current is given as

𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝑉𝐵𝐸
𝑅𝐶 + 𝑅𝐵 --- (2)

Since 𝑉𝐵𝐸 is very small, it can be neglected compared to 𝑉𝐶𝐶 then equation (2) can be
approximated to
𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶
𝐼𝐵 ≌
𝑅𝐶 + 𝑅𝐵
Output section:

Let us consider only the output section of circuit

The collector current in terms of Base current is derived by equation

𝐼𝐶 = 𝛽𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂 --- (3)

If we apply KVL law at output loop then,

𝑉𝐶𝐶 = (𝐼𝐶 + 𝐼𝐵 ) 𝑅𝐶 + 𝑉𝐶𝐸 ---------------------- (4)

from equation (4), collector to emitter voltage is given as

𝑉𝐶𝐸 = 𝑉𝐶𝐶 − (𝐼𝐶 + 𝐼𝐵 ) 𝑅𝐶 --- (5)

Also,
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐵 𝑅𝐶 ----------------------(6)

As Current 𝐼𝐵 ≪ 𝐼𝐶 , equation (6) can be approximated to

𝑉𝐶𝐸 ≌ 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 ---------------------- (7)

If we replace the value of equation (7) in equation (2) then Base current can be written as

𝑉𝐶𝐸 − 𝑉𝐵𝐸
𝑅𝐶 + 𝑅𝐵

Equation (3) and (5) are the equation of operating point Q

𝐼𝐶𝑄 = 𝛽𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂

𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − (𝐼𝐶 + 𝐼𝐵 ) 𝑅𝐶

Stabilization of Q point in collector to base bias circuit:

- if temperature increases then leakage current 𝐼𝐶𝐸𝑂 will increase, which will result in
increase in 𝐼𝐶𝑄. If collector current 𝐼𝐶 increases then 𝑉𝐶𝐸 will decrease (because 𝑉𝐶𝐸 ≌
𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶). When 𝑉𝐶𝐸 decreases, it also decreases base current 𝐼𝐵. Decrease in base
current forces collector current to decrease. Hence increase of collector current due to
temperature will be stabilize by decrease in base current.

- if transistor is replaced by another transistor then 𝛽𝑑𝑐 may change which results in change
in 𝐼𝐶𝑄 corresponding to Q point. If collector current 𝐼𝐶 increases then 𝑉𝐶𝐸 will decrease
(because 𝑉𝐶𝐸 ≌ 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶). When 𝑉𝐶𝐸 decreases, it also decreases base current 𝐼𝐵.
Decrease in base current forces collector current to decrease. Hence increase of collector
current due to change in 𝛽𝑑𝑐 will be stabilize by decrease in base current.

Limitation of collector to base bias circuit:

- Collector to base bias circuit is seldom used because base resistor provides negative
feedback, which reduces the gain of not only DC but also AC input signal.
 Emitter feedback Bias Circuit (Bias circuit with emitter resistor):

In emitter feedback bias three resistors RB, RC, and RE are connected as shown in figure.
Emitter resistor provides negative feedback. This circuit can able to stabilize operating point
Q..

Steps to find Q point:

Input section:
Let us consider only the input loop/section of circuit

If we apply KVL law at input loop then,

𝑉𝐶𝐶 = 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸----------------------- (1)

from equation (1), base current is given as

𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 − 𝑉𝐵𝐸
𝑅 --- (2)

Since 𝑉𝐵𝐸 is very small, it can be neglected compared to 𝑉𝐶𝐶 then equation (2) can be
approximated to
 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸
𝐼𝐵 ≌ 𝑅𝐵
Output section:

Let us consider only the output section of circuit

The collector current in terms of Base current is derived by equation

𝐼𝐶 = 𝛽𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂 --- (3)

If we apply KVL law at output loop then,

𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐸 + 𝐼𝐸 𝑅𝐸 --------------------- (4)

from equation (4), collector to emitter voltage is given as

𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 --- (5)

Equation (3) and (5) are the equation of operating point Q

𝐼𝐶𝑄 = 𝛽𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂

𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸

Stabilization of Q point in collector to base bias circuit:

- if temperature increases then leakage current 𝐼𝐶𝐸𝑂 will increase, which will result in
increase in 𝐼𝐶𝑄. If collector current 𝐼𝐶 increases then 𝐼𝐸 will increase. When 𝐼𝐸 increases,
it results in decreases in base current 𝐼𝐵. Decrease in base current forces collector current
to decrease. Hence increase of collector current due to temperature will be stabilize by
decrease in base current.
 - if transistor is replaced by another transistor then 𝛽𝑑𝑐 may change which results in change
in 𝐼𝐶𝑄 corresponding to Q point. If collector current 𝐼𝐶 increases then 𝐼𝐸 will increase.
When 𝐼𝐸 increases, it results in decreases in base current 𝐼𝐵. Decrease in base current
forces collector current to decrease. Hence increase of collector current due to change in
𝛽𝑑𝑐 will be stabilize by decrease in base current.

Limitation of collector to base bias circuit:

In emitter bias, emitter resistor provides negative feedback, which reduces the gain of not only
DC but also AC input signal but reduction in AC gain can be avoided by connecting one capacitor
in parallel with emitter resistor.

Voltage Divider Bias Circuit (Self Bias):

It is most widely used biasing circuit. It stabilize the operating point Q against change in
temperature as well as transistor current gain 𝛽𝑑𝑐. Voltage divider bias circuit is as shown in
figure. The base circuit contains a voltage divider (R1 and R2). Because of this, the circuit is called
voltage-divider bias.

Resistor R1 and R2 forms voltage divider network. To simplify the circuit, it can be
converted to Thevenin’s equivalent circuit.

Thevenin’s equivalent circuit can be derived by finding out Thevenin equivalent Resistor
RTH and Voltage VTH.
 Thevenin’s equivalent Resistor Thevenin’s equivalent Voltage

𝑅 +𝑅 𝑅 +𝑅

Now Thevenin’s equivalent circuit is

Steps to find Q point:

Input section:
Let us consider only the input loop/section of Thevenin;s equivalent circuit

If we apply KVL law at input loop then,

𝑉𝑇𝐻 = 𝐼𝐵 𝑅𝑇𝐻 + 𝑉𝐵𝐸+ 𝐼𝐸 𝑅𝐸---------------------- (1)

But, 𝐼𝐸 = (1 + 𝛽𝑑𝑐)𝐼𝐵
𝑉𝑇𝐻 = 𝐼𝐵 𝑅𝑇𝐻 + 𝑉𝐵𝐸 + (1 + 𝛽𝑑𝑐)𝐼𝐵 𝑅𝐸 -----------(2)

from equation (2), base current is given as

𝑉𝑇𝐻 − 𝑉𝐵𝐸
𝑅 + (1 + 𝛽 ) 𝑅 - --- (3)

Since 𝑉𝐵𝐸 is very small, it can be neglected compared to 𝑉𝑇𝐻. Also 𝛽𝑑𝑐 ≫ 1, then equation (3)
can be approximated to
 𝑉𝑇𝐻
𝐼𝐵 ≌
𝑅𝑇𝐻 + 𝛽𝑑𝑐 𝑅𝐸
Output section:
Let us consider only the output section of circuit

The collector current in terms of Base current is derived by equation

𝐼𝐶 = 𝛽𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂 --- (4)

If we apply KVL law at output loop then,

𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐸 + 𝐼𝐸 𝑅𝐸 ---------------------- (5)

from equation (5), collector to emitter voltage is given as

𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 --- (6)

Equation (4) and (6) are the equation of operating point Q

𝐼𝐶𝑄 = 𝛽𝑑𝑐𝐼𝐵 + 𝐼𝐶𝐸𝑂

𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸

Thermal Runaway.

Maximum power a transistor can dissipate without getting damaged depends on the
maximum temperature that a collector-base junction can withstand. Rise in temperature
across collector –base junction can due to cumulative internal heating process. The collector
current in transistor is If collector current increases, then power dissipation at collector-
base junction also increases. Increase in power dissipation results in increase in temperature
at C-B junction. As transistor has negative temperature co-efficient of resistance,
increase in temperature at C-B junction, decreases resistance. The reduced resistance will
increase the collector current. This becomes cumulative process which will finally results in
damage/burning-off to transistor due to excessive internal heating. This process is known as
Thermal Runaway.
 Example-3
What is the collector-emitter voltage for transistor shown in figure.

For voltage divider bias circuit , to find out 𝑉𝐶𝐵, we need to derive voltage 𝑉𝐶and 𝑉𝐸

For voltage divider .

2.2 𝐾𝛺 𝑥 𝑉𝐶𝐶
𝑉𝐵𝐵 =
2.2 𝐾𝛺 + 10 𝐾𝛺

2.2 𝑥 103 𝑥 10
𝑉𝐵𝐵 = = 1.8 𝑣𝑜𝑙𝑡
12.2 𝑥 103

Assuming 𝑉𝐵𝐸 = 0.7 V

𝑉𝐵𝐵 = 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸 = 𝑉𝐵𝐸 + 𝑉𝐸

𝑉𝐸 = 𝑉𝐵𝐵 − 𝑉𝐵𝐸

𝑉𝐸 = 1.8 − 0.7 = 1.1 volt

Emitter current is
𝑉𝐸 1.1
𝐼𝐸 = = = 1.1 𝑚𝐴
𝑅𝐸 1 𝑥 103

Collector Current is almost same as emitter current

Now collector voltage can be derived as
𝑉𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶

𝑉𝐶 = 10 − 1.1 𝑥 10−3 x 3.6 𝑥 103 = 10 – 3.96 = 6.04

Hence, 𝑉𝐶𝐸 = 𝑉𝐶 − 𝑉𝐸 = 6.04 − 1.1 = 𝟒. 𝟗𝟒 volt