Computer Architecture

and Organization
DS1CAO

Dr Abdallah Handoura
ahandoura@[Link]

Dr Abdallah Handoura 1

Chapter 1
Basic Concepts and Computer Evolution

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Computer Architecture
Computer Organization
• Attributes of a system • Instruction set, number of bits
visible to the programmer used to represent various data
• Have a direct impact on the types, I/O mechanisms,
logical execution of a techniques for addressing
program memory

Architectural
Computer
attributes
Architecture
include:

Organizational
Computer
attributes
Organization
include:

• Hardware details transparent • The operational units and

to the programmer, control their interconnections that
signals, interfaces between the realize the architectural
computer and peripherals, specifications
memory technology used
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IBM System 370 Architecture

•IBM System/370 architecture
• Was introduced in 1970
• Included a number of models
• Could upgrade to a more expensive, faster model
without having to abandon original software
• New models are introduced with improved technology,
but retain the same architecture so that the
customer’s software investment is protected
• Architecture has survived to this day as the
architecture of IBM’s mainframe product line

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Structure and Function

• Hierarchical system
• Set of interrelated
subsystems • Structure
• The way in which
• Hierarchical nature of components relate to each
complex systems is essential other
to both their design and their • Function
description
• The operation of individual
• Designer need only deal with components as part of the
a particular level of the structure
system at a time
• Concerned with structure
and function at each level

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Function
• There are four basic functions that a computer can
perform:
• Data processing
• Data may take a wide variety of forms and the range of processing
requirements is broad
• Data storage
• Short-term
• Long-term
• Data movement
• Input-output (I/O) - when data are received from or delivered to a device
(peripheral) that is directly connected to the computer
• Data communications – when data are moved over longer distances, to or
from a remote device
• Control
• A control unit manages the computer’s resources and orchestrates the
performance of its functional parts in response to instructions

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Structure COMPUTER

Main
I/O
memory

There are four main structural System

Bus
components of the computer:
CPU

 CPU – controls the CPU

operation of the computer
and performs its data Registers ALU
processing functions
Internal
 Main Memory – stores Bus

data Control
 I/O – moves data Unit

between the computer CONTROL

UNIT
and its external Sequencing
environment Logic

 System Interconnection Control Unit

Registers and

– some mechanism that Decoders

provides for Control

communication among Memory

CPU, main memory, and

I/O
Figure 1.1 A Top-Down View of a Computer
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CPU
Major structural
• Control Unit
components:
• Controls the operation of the CPU
and hence the computer

• Arithmetic and Logic Unit (ALU)

• Performs the computer’s data
processing function

• Registers
• Provide storage internal to the
CPU

• CPU Interconnection
• Some mechanism that provides
for communication among the
control unit, ALU, and registers

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 Multicore Computer MOTHERBOARD
Structure Main memory chips

Processor
I/O chips chip

• Central processing unit (CPU)

• Portion of the computer that fetches and executes instructions PROCESSOR CHIP
• Consists of an ALU, a control unit, and registers
• Referred to as a processor in a system with a single processing Core Core Core Core

unit
L3 cache L3 cache
• Core
• An individual processing unit on a processor chip Core Core Core Core
• May be equivalent in functionality
to a CPU on a single-CPU system
• Specialized processing units are also CORE
referred to as cores Instruction
Arithmetic
and logic Load/

• Processor
logic unit (ALU) store logic

L1 I-cache L1 data cache

• A physical piece of silicon containing
one or more cores L2 instruction L2 data
cache cache
• Is the computer component that
interprets and executes instructions
• Referred to as a multicore processor
• if it contains multiple cores Figure 1.2 Simplified View of Major Elements of a Multicore Computer

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Cache Memory
• Multiple layers of memory between the processor and main
memory
• Is smaller and faster than main memory
• Used to speed up memory access by placing in the cache data from
main memory that is likely to be used in the near future
• A greater performance improvement may be obtained by using
multiple levels of cache, with level 1 (L1) closest to the core and
additional levels (L2, L3, etc.) progressively farther from the core

Figure 1.3

zEnterprise EC12 Processor Unit

(PU)
Chip Diagram

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 Figure 1.4
Motherboard
with Two Intel
Quad-Core
Xeon
Processors

Figure 1.5

zEnterprise
Figure 1.3
EC12
Motherboard with Two Intel Quad-Core Xeon Processors Layout
Core

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Computer Generations
Approximate Typical Speed
Generation Dates Technology (operations per second)
1 1946–1957 Vacuum tube 40,000
2 1957–1964 Transistor 200,000
3 1965–1971 Small and medium scale 1,000,000
integration
4 1972–1977 Large scale integration 10,000,000
5 1978–1991 Very large scale integration 100,000,000
6 1991- Ultra large scale integration >1,000,000,000

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History of Computers
First Generation: Vacuum Tubes Central processing unit (CPU)

Arithmetic-logic unit (CA)

AC MQ

• Vacuum tubes were used for Input-

digital logic elements and Arithmetic-logic
circuits
output
equipment
memory (I, O)

• IAS computer
MBR

Instructions
• Fundamental design and data

approach was the stored

program concept M(0)
Instructions
and data
• Attributed to the mathematician M(1)
John von Neumann M(2)
M(3) PC IBR
M(4) AC: Accumulator register
• First publication of the idea was MQ: multiply-quotient register

in 1945 for the EDVAC MBR: memory buffer register

IBR: instruction buffer register
MAR IR PC: program counter
• Design began at the Princeton Main MAR: memory address register
IR: insruction register
Institute for Advanced Studies memory
(M)
Control
• Completed in 1952
Control
circuits
signals
M(4092)

• Prototype of all subsequent

M(4093)
M(4095)
Program control unit (CC)

general-purpose computers Addresses

Dr Abdallah Handoura Figure 1.6 IAS Structure 13

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0 1 39

sign bit (a) Number word

left instruction (20 bits) right instruction (20 bits)

0 8 20 28 39

opcode (8 bits) address (12 bits) opcode (8 bits) address (12 bits)

(b) Instruction word

Figure 1.7 IAS Memory Formats

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 Registers
Memory buffer register • Contains a word to be stored in memory or sent to the I/O unit
(MBR) • Or is used to receive a word from memory or from the I/O unit

Memory address register • Specifies the address in memory of the word to be written from
(MAR) or read into the MBR

Instruction register (IR) • Contains the 8-bit opcode instruction being executed

Instruction buffer • Employed to temporarily hold the right-hand instruction from a

register (IBR) word in memory

• Contains the address of the next instruction pair to be fetched

Program counter (PC) from memory

Accumulator (AC) and • Employed to temporarily hold operands and results of ALU
multiplier quotient (MQ) operations

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Symbolic
Instruction Type Opcode Representation Description
00001010 LOAD MQ Transfer contents of register MQ to the
accumulator AC
00001001 LOAD MQ,M(X) Transfer contents of memory location X to
MQ
00100001 STOR M(X) Transfer contents of accumulator to memory
Data transfer location X
00000001 LOAD M(X) Transfer M(X) to the accumulator
00000010 LOAD –M(X) Transfer –M(X) to the accumulator
00000011 LOAD |M(X)| Transfer absolute value of M(X) to the
accumulator
00000100 LOAD –|M(X)| Transfer –|M(X)| to the accumulator
Unconditional 00001101 JUMP M(X,0:19) Take next instruction from left half of M(X)
branch 00001110
00001111
JUMP M(X,20:39)
JUMP+ M(X,0:19)
Take next instruction from right half of M(X)
If number in the accumulator is nonnegative,
take next instruction from left half of M(X)
Table 1.1
0 JU If number in the
0 MP accumulator is nonnegative,
Conditional branch 0 + take next instruction from
1
0
0
M(X
,20:
39)
right half of M(X)
The IAS
Instruction Set
0
0
00000101 ADD M(X) Add M(X) to AC; put the result in AC
00000111 ADD |M(X)| Add |M(X)| to AC; put the result in AC
00000110 SUB M(X) Subtract M(X) from AC; put the result in AC
00001000 SUB |M(X)| Subtract |M(X)| from AC; put the remainder
in AC
00001011 MUL M(X) Multiply M(X) by MQ; put most significant
bits of result in AC, put least significant bits
Arithmetic
in MQ
00001100 DIV M(X) Divide AC by M(X); put the quotient in MQ
and the remainder in AC
00010100 LSH Multiply accumulator by 2; i.e., shift left one
bit position
00010101 RSH Divide accumulator by 2; i.e., shift right one
position
00010010 STOR M(X,8:19) Replace left address field at M(X) by 12
rightmost bits of AC
Address modify
00010011 STOR M(X,28:39) Replace right address field at M(X) by 12
rightmost bits of AC (Table can be found on page 17 in the textbook.)

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History of Computers
Second Generation: Transistors
• Smaller
IBM 7094 computer Peripheral devices
• Cheaper Mag tape
units
• Was invented at Bell Labs in 1947 CPU
Card
punch
Data
• It was not until the late 1950’s that fully channel Line
printer
transistorized computers were commercially available Card
reader

Second Generation Computers Multi-

Drum
Data
plexor channel
• Introduced: Disk

• More complex arithmetic and logic units and Data

Disk
channel
control units
• The use of high-level programming languages Hyper-
tapes
• Provision of system software which provided Memory Data Teleprocessing
the ability to: channel equipment

• Load programs
• Move data to peripherals
• Libraries perform common computations Figure 1.9 An IBM 7094 Configuration
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History of Computers
Third Generation: Integrated Circuits
• 1958 – the invention of the integrated circuit
• Discrete component
• Single, self-contained transistor
• Manufactured separately, packaged in their own containers, and
soldered or wired together onto masonite-like circuit boards
• Manufacturing process was expensive and cumbersome

• The two most important members of the third generation were the
IBM System/360 and the DEC PDP-8
Boolean Binary
Input logic Output Input storage Output
function cell

Read

Activate Write
signal

(a) Gate (b) Memory cell

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Figure 1.10 Fundamental Computer Elements

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 • A computer consists of gates,
Integrated memory cells, and
interconnections among these
Circuits elements
• The gates and memory cells are
constructed of simple digital
• Data storage – provided by electronic components
memory cells
• Data processing – provided by
gates • Exploits the fact that such
• Data movement – the paths components as transistors,
among components are used to resistors, and conductors can be
move data from memory to fabricated from a semiconductor
memory and from memory such as silicon
through gates to memory • Many transistors can be
• Control – the paths among produced at the same time on a
components can carry control single wafer of silicon
signals • Transistors can be connected
with a processor metallization to
form circuits

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Wafer

Chip

Gate

Packaged
chip

Figure 1.11 Relationship Among Wafer, Chip, and Gate

it
u
r g

d f
rc
o in

a w
te o

d
st rk

ci

lg a
ra n

te
u l
g t io
si o

m ’s
a tw

e
te n

ro r
in ve

p o
tr rs

o
In
Fi

100 bn
10 bn
1 bn
100 m
10 m
100,000
10.000
1,000
100
10
1
1947 50 55 60 65 70 75 80 85 90 95 2000 05 11

Figure 1.12 Growth in Transistor Count on Integrated Circuits

(DRAM memory)
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 Family Characteristics

Similar or Similar or
identical identical Increasing speed
instruction set operating system

Increasing
Increasing
number of I/O Increasing cost
memory size
ports

Console Main I/O I/O

CPU
controller memory module module

Omnibus

Figure 1.13 PDP-8 Bus Structure

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LSI
Large
Scale
Later Integration

Generations
VLSI
Very Large
Scale
Integration

ULSI
Ultra Large
Semiconductor Memory Scale
Microprocessors Integration

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 Semiconductor Memory
In 1970 Fairchild produced the first relatively capacious semiconductor memory

Chip was about the size of Could hold 256 bits of

Non-destructive Much faster than core
a single core memory

In 1974 the price per bit of semiconductor memory dropped below the price per bit of core
memory
There has been a continuing and rapid decline in memory
Developments in memory and processor technologies
cost accompanied by a corresponding increase in
changed the nature of computers in less than a decade
physical memory density

Since 1970 semiconductor memory has been through 13 generations

Each generation has provided four times the storage density of the previous generation, accompanied by declining cost
per bit and declining access time

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Microprocessors
• The density of elements on processor chips continued to rise
• More and more elements were placed on each chip so that fewer and
fewer chips were needed to construct a single computer processor
• 1971 Intel developed 4004
• First chip to contain all of the components of a CPU on a single chip
• Birth of microprocessor
• 1972 Intel developed 8008
• First 8-bit microprocessor
• 1974 Intel developed 8080
• First general purpose microprocessor
• Faster, has a richer instruction set, has a large addressing capability

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 Evolution of Intel Microprocessors

4004 8008 8080 8086 8088

Introduced 1971 1972 1974 1978 1979
5 MHz, 8 MHz, 10
Clock speeds 108 kHz 108 kHz 2 MHz 5 MHz, 8 MHz
MHz
Bus width 4 bits 8 bits 8 bits 16 bits 8 bits
Number of
2,300 3,500 6,000 29,000 29,000
transistors
Feature size
10 8 6 3 6
(µm)
Addressable 640 Bytes 16 KB 64 KB 1 MB 1 MB
memory

(a) 1970s Processors

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Evolution of Intel Microprocessors

80286 386TM DX 386TM SX 486TM DX
CPU
Introduced 1982 1985 1988 1989
Clock speeds 6 MHz - 12.5 16 MHz - 33 16 MHz - 33 25 MHz - 50
MHz MHz MHz MHz
Bus width 16 bits 32 bits 16 bits 32 bits
Number of transistors
134,000 275,000 275,000 1.2 million

Feature size (µm) 1.5 1 1 0.8 - 1

Addressable
16 MB 4 GB 16 MB 4 GB
memory
Virtual
1 GB 64 TB 64 TB 64 TB
memory
Cache — — — 8 kB

(b) 1980s Processors

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 Evolution of Intel Microprocessors

486TM SX Pentium Pentium Pro Pentium II

Introduced 1991 1993 1995 1997
Clock speeds 16 MHz - 33 60 MHz - 166 150 MHz - 200 200 MHz - 300
MHz MHz, MHz MHz
Bus width 32 bits 32 bits 64 bits 64 bits
Number of 1.185 million 3.1 million 5.5 million 7.5 million
transistors
Feature size (µm) 1 0.8 0.6 0.35
Addressable
4 GB 4 GB 64 GB 64 GB
memory
Virtual memory 64 TB 64 TB 64 TB 64 TB
512 kB L1 and 1
Cache 8 kB 8 kB 512 kB L2
MB L2

(c) 1990s Processors

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Evolution of Intel Microprocessors

Core 2 Duo Core i7 EE
Pentium III Pentium 4
4960X
Introduced 1999 2000 2006 2013
Clock speeds 450 - 660 MHz 1.3 - 1.8 GHz 1.06 - 1.2 GHz 4 GHz
Bus
wid 64 bits 64 bits 64 bits 64 bits
th
Number of 9.5 million 42 million 167 million 1.86 billion
transistors
Feature size (nm) 250 180 65 22
Addressable
64 GB 64 GB 64 GB 64 GB
memory
Virtual memory 64 TB 64 TB 64 TB 64 TB
Cache 512 kB L2 256 kB L2 2 MB L2 1.5 MB L2/15
MB L3
Number of cores 1 1 2 6

(d) Recent Processors

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 Core i7 Core i 9 Core i9 Core i9 Core Ulra 9
8700K 9900KS 12900K 14900K 285K

Introduced 2017 2019 2021 2023 2024

Clock Speed 4.7Ghz 5Ghz 5.2Ghz 6Ghz 5.7Ghz

Number of unknow 4.7 billion unknow unknow 17.8 billion

Transistor

Feature Size 14 14 10 10 3

Addressable 128GB 128GB 128GB 192GB 256GB

Memory

Number of Cores 6 8 16 24 24

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The Evolution of the Intel x86 Architecture

• Two processor families are the Intel x86 and the ARM
architectures
• Current x86 offerings represent the results of decades of design
effort on complex instruction set computers (CISCs)
• An alternative approach to processor design is the reduced
instruction set computer (RISC)
• ARM architecture is used in a wide variety of embedded systems
and is one of the most powerful and best-designed RISC-based
systems on the market

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Highlights of the Evolution of the Intel Product Line:

8080 8086 80286 80386 80486

• World’s first • A more powerful • Extension of the • Intel’s first 32-bit • Introduced the
general-purpose 16-bit machine 8086 enabling machine use of much
microprocessor • Has an addressing a 16- • First Intel more
• 8-bit machine, instruction MB memory processor to sophisticated
8-bit data path cache, or queue, instead of just 1MB support and powerful
to memory that prefetches a multitasking cache
• Was used in the few instructions technology and
first personal before they are sophisticated
computer (Altair) executed instruction
• The first pipelining
appearance of • Also offered a
the x86 built-in math
architecture coprocessor
• The 8088 was a
variant of this
processor and
used in IBM’s
first personal
computer
(securing the
success of Intel

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Highlights of the Evolution of the Intel Product Line:

Pentium
• Intel introduced the use of superscalar techniques, which allow multiple instructions to execute in parallel

Pentium Pro
• Continued the move into superscalar organization with aggressive use of register renaming, branch prediction, data
flow analysis, and speculative execution

Pentium II
• Incorporated Intel MMX technology, which is designed specifically to process video, audio, and graphics data
efficiently

Pentium III
•Incorporated additional floating-point instructions
•Streaming SIMD Extensions (SSE)

Pentium 4
• Includes additional floating-point and other enhancements for multimedia

Core
• First Intel x86 micro-core

Core 2
• Extends the Core architecture to 64 bits
• Core 2 Quad provides four cores on a single chip
• More recent Core offerings have up to 10 cores per chip
• An important addition to the architecture was the Advanced Vector Extensions instruction set
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Embedded Systems

• The use of electronics and software within a product

• Billions of computer systems are produced each year
that are embedded within larger devices
• Today many devices that use electric power have an
embedded computing system
• Often embedded systems are tightly coupled to their
environment
• This can give rise to real-time constraints imposed by the need
to interact with the environment
• Constraints such as required speeds of motion, required precision of
measurement, and required time durations, dictate the timing of
software operations
• If multiple activities must be managed simultaneously this
imposes more complex real-time constraints

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Custom
logic

Processor Memory

Human Diagnostic
interface port

A/D D/A
conversion Conversion

Actuators/
Sensors
indicators

Figure 1.14 Possible Organization of an Embedded System

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The Internet of Things (IoT)
• Term that refers to the expanding interconnection of smart devices,
ranging from appliances to tiny sensors
• Is primarily driven by deeply embedded devices
• Generations of deployment culminating in the IoT:
• Information technology (IT)
• PCs, servers, routers, firewalls, and so on, bought as IT devices by enterprise IT people and
primarily using wired connectivity
• Operational technology (OT)
• Machines/appliances with embedded IT built by non-IT companies, such as medical
machinery, SCADA, process control, and kiosks, bought as appliances by enterprise OT
people and primarily using wired connectivity
• Personal technology
• Smartphones, tablets, and eBook readers bought as IT devices by consumers exclusively
using wireless connectivity and often multiple forms of wireless connectivity
• Sensor/actuator technology
• Single-purpose devices bought by consumers, IT, and OT people exclusively using wireless
connectivity, generally of a single form, as part of larger systems

• It is the fourth generation that is usually thought of as the IoT and it is

marked by the use of billions of embedded devices

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Embedded Application Processors

Operating versus
Systems Dedicated Processors

• There are two general • Application processors

approaches to developing an • Defined by the processor’s
ability to execute complex
embedded operating system operating systems
(OS): • General-purpose in nature
• Take an existing OS and adapt • An example is the smartphone –
it for the embedded the embedded system is
designed to support numerous
application apps and perform a wide variety
• Design and implement an OS of functions
intended solely for embedded • Dedicated processor
use • Is dedicated to one or a small
number of specific tasks
required by the host device
• Because such an embedded
system is dedicated to a specific
task or tasks, the processor and
associated components can be
engineered to reduce size and
cost
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 Processor

Analog data A/D Temporary

RAM
acquisition converter data

Analog data D/A Program

ROM
transmission converter and data

Send/receive Serial I/O Permanent

EEPROM
data ports data

Peripheral Parallel I/O Timing

TIMER
interfaces ports System functions
bus

Figure 1.15 Typical Microcontroller Chip Elements

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Deeply Embedded Systems

• Subset of embedded systems

• Has a processor whose behavior is difficult to observe both by
the programmer and the user
• Uses a microcontroller rather than a microprocessor
• Is not programmable once the program logic for the device has
been burned into ROM
• Has no interaction with a user
• Dedicated, single-purpose devices that detect something in
the environment, perform a basic level of processing, and then
do something with the results
• Often have wireless capability and appear in networked
configurations, such as networks of sensors deployed over a
large area
• Typically have extreme resource constraints in terms of
memory, processor size, time, and power consumption

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 ARM Refers to a processor architecture that has evolved from RISC design
principles and is used in embedded systems

Family of RISC-based microprocessors and microcontrollers designed by

ARM Holdings, Cambridge, England

Chips are high-speed processors that are known for their small die size and
low power requirements

Probably the most widely used embedded processor architecture and

indeed the most widely used processor architecture of any kind in the world

Acorn RISC Machine/Advanced RISC Machine

ARM Products

Cortex-M
• Cortex-M0
Cortex-R • Cortex-M0+
• Cortex-M3
Cortex- • Cortex-M4
A/Cortex-A50

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Cloud Computing

• NIST defines cloud computing as:

“A model for enabling ubiquitous, convenient, on-
demand network access to a shared pool of configurable
computing resources that can be rapidly
provisioned and released with minimal
management effort or service provider interaction.”
• You get economies of scale, professional network
management, and professional security management
• The individual or company only needs to pay for the storage
capacity and services they need
• Cloud provider takes care of security

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Cloud Networking
• Refers to the networks and network management functionality that
must be in place to enable cloud computing
• One example is the provisioning of high-performance and/or high-
reliability networking between the provider and subscriber
• The collection of network capabilities required to access a cloud,
including making use of specialized services over the Internet, linking
enterprise data center to a cloud, and using firewalls and other
network security devices at critical points to enforce access security
policies

Cloud Storage
• Subset of cloud computing
• Consists of database storage and database applications hosted
remotely on cloud servers
• Enables small businesses and individual users to take advantage of
data storage that scales with their needs and to take advantage of a
variety of database applications without having to buy, maintain, and
manage the storage assets
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