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Overview of SIC and SIC/XE Architectures

The document outlines the Simplified Instructional Computer (SIC) and its extended version (SIC/XE), focusing on their architecture, instruction sets, and addressing modes. It details the memory structure, registers, data formats, and input/output mechanisms, highlighting the differences between SIC and SIC/XE. Additionally, it provides programming examples demonstrating data movement, arithmetic operations, and subroutine calls.

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ANJANA MS
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0% found this document useful (0 votes)
14 views37 pages

Overview of SIC and SIC/XE Architectures

The document outlines the Simplified Instructional Computer (SIC) and its extended version (SIC/XE), focusing on their architecture, instruction sets, and addressing modes. It details the memory structure, registers, data formats, and input/output mechanisms, highlighting the differences between SIC and SIC/XE. Additionally, it provides programming examples demonstrating data movement, arithmetic operations, and subroutine calls.

Uploaded by

ANJANA MS
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Simplified Instructional Computer

SIC and SIC/XE


• Why the simplified instructional computer
– To avoid various unique features and idiosyncrasies
of a particular machine
– To focus on central, fundamental, and commonly
encountered features and concepts
• Two versions
– Standard model (SIC) and an XE version (SIC/XE)
– Upward compatible
• Programs for SIC can run on SIC/XE
SIC Architecture
• Memory

A word (3 bytes, or 24 bits)


SIC Architecture
• Registers
– Five 24-bit registers

3-7: reserved for future use


SIC Architecture
Decimal Signed-mag Signed-1’s Signed-2’s
nitude complement complement

+7 0111 0111 0111


• Data formats +6 0110 0110 0110
– Characters: 8-bit +5 0101 0101 0101
ASCII codes +4 0100 0100 0100
+3 0011 0011 0011
– Integers: +2 0010 0010 0010
• 24-bit binary numbers +1 0001 0001 0001
• 2’s complement for +0 0000 0000 0000
negative values -0 1000 1111 X
-1 1001 1110 1111
– Floating-point
-2 1010 1101 1110
numbers: No -3 1011 1100 1101
-4 1100 1011 1100
-5 1101 1010 1011
-6 1110 1001 1010
-7 1111 1000 1001
-8 X X 1000
SIC Architecture
• Instruction formats

24 bits

Why?

To indicate indexed-addressing mode


SIC Architecture
• Addressing modes

( ): Contents of a register or a memory location


SIC Architecture
• Instruction set
– Load and store registers
• LDA, LDX, STA, STX
– Integer arithmetic operations (involve register A and a word in
memory, save result in A)
• ADD, SUB, MUL, DIV
– Comparison (involves register A and a word in memory, save
result in the condition code (CC) of SW)
• COMP
– Conditional jump instructions (according to CC)
• JLE, JEQ, JGT
– Subroutine linkage
• JSUB (jumps and places the return address in register L)
• RSUB (returns to the address in L)
SIC Architecture
• Input and output
– Each IO device is assigned a unique 8-bit code
– One byte at a time to or from the rightmost 8 bits of
register A
– Three instructions:
• Test device (TD):
– Test whether the device is ready to send/receive
– Test result is set in CC
• Read data (RD): read one byte from the device to register A
• Write data (WD): write one byte from register A to the device
SIC/XE Architecture
• Memory: from 32768 to 1 mega

A word (3 bytes, or 24 bits)


SIC/XE Architecture
• Registers: 4 additional registers
SIC/XE Architecture
• Data formats
– Characters: 8-bit ASCII codes
– Integers:
• 24-bit binary numbers
• 2’s complement for negative values
– Floating-point numbers (48 bits)
• sign bit s
• fraction f: a value between 0 and 1
• exponent e: unsigned binary number between 0 and 2047
• value:

High-order bit must be 1 when normalized


SIC/XE Architecture
• Instruction formats

No
memory
reference

Relative
0
addressing
for target address calculation

Extended
1
address field
SIC/XE Architecture
• Addressing modes:
– two new relative addressing
for format 3

– direct addressing for formats


3 and 4 if b=p=0
– Indexed addressing can be
combined if x=1:
• the term (x) should be added
SIC/XE Architecture
• Bits x,b,p,e: how to calculate the target address
– relative, direct, and indexed addressing modes
• Bits i and n: how to use the target address (TA)
– i=1, n=0: immediate addressing
• TA is used as the operand value, no memory reference
– i=0, n=1: indirect addressing
• The word at the TA is fetched
• Value in this word is taken as the address of the operand value
– i=0, n=0 (in SIC), or
– i=1, n=1 (in SIC/XE): simple addressing
• TA is taken as the address of the operand value
• Exception: indexing cannot be used with immediate or
indirect addressing modes.
SIC/XE Architecture
• For upward compatibility
– 8-bit binary codes for all SIC instructions end in 00
– If n=i=0, bits b,p,e are considered as part of the 15-bit address
field
c: constant between 0 and 4095
m: memory address or constant
larger than 4095

4: Format 4

A: Relative addressing

D: Direct addressing

S:Compatible with SIC


SIC/XE Architecture
• Examples of addressing mode for LDA
SIC/XE Architecture
• Instruction set
– Load and store registers
• LDA, LDX, STA, STX, LDB, STB, …
– Integer arithmetic operations
• ADD, SUB, MUL, DIV, ADDF, SUBF, MULF, DIVF, ADDR, SUBR,
MULR, DIVR
– Comparison COMP
– Conditional jump instructions (according to CC)
• JLE, JEQ, JGT
– Subroutine linkage
• JSUB
• RSUB
– Register move
• RMO
– Supervisor call (for generating an interrupt)
• SVC
SIC/XE Architecture
• Input and output
– IO device
• Three instructions:
– Test device (TD)
– Read data (RD)
– Write data (WD)
– IO channels
• Perform IO while CPU is executing other instructions
• Three instructions:
– SIO: start the operation of IO channel
– TIO: test the operation of IO channel
– HIO: halt the operation of IO channel
I/O Mechanisms
• Polling I/O
• Interrupt-Driven I/O
• DMA (Direct Memory Access) I/O
SIC/XE Instruction Set

X: only for XE

C: set CC

F: floating-point

P: privileged
for interrupt
Set Storage Key for memory protection
Assembler Directives
Basic assembler directives (pseudo instructions):
START :
Specify name and starting address for the program
END :
Indicate the end of the source program, and (optionally) the first
executable instruction in the program.
BYTE :
Generate character or hexadecimal constant, occupying as many
bytes as needed to represent the constant.
WORD :
Generate one-word integer constant
RESB :
Reserve the indicated number of bytes for a data area
RESW :
Reserve the indicated number of words for a data area
SIC Programming Examples
(1) Data Movement
SIC

Assembler directives
for defining storage

Address labels

SIC/XE

Immediate addressing
makes program faster
due to fewer memory
reference
SIC Programming Examples
(2) Arithmetic

SIC

BETA 🡨 (ALPHA + INCR - 1)


DELTA 🡨 (GAMMA + INCR - 1)
SIC Programming Examples
(2) Arithmetic

SIC/XE

BETA 🡨 (ALPHA + INCR - 1)


DELTA 🡨 (GAMMA + INCR - 1)
SIC Programming Examples
(3) Looping and Indexing: part I

SIC

Copy one 11-byte string to another


SIC Programming Examples
(3) Looping and Indexing: part I

SIC/XE

Copy one 11-byte string to another


SIC Programming Examples
(4) Looping and Indexing: part II

SIC

GAMMA [ ] 🡨 ALPHA [ ] + BETA [ ]


SIC Programming Examples
(4) Looping and Indexing: part II

SIC/XE

GAMMA [ ] 🡨 ALPHA [ ] + BETA [ ]


SIC Programming Examples
(5) Input and Output

Read one byte from device F1

Write one byte to device 05


SIC Programming Examples
(6) Subroutine Call
SIC

Read 100 bytes from device F1


SIC Programming Examples
(6) Subroutine Call
SIC/XE

Read 100 bytes from device F1

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