ELE 501 - Lecture 1
IC Amplifier Building Blocks
Textbook: Chapter 7 (Sections 7.1-7.3)
© D. Tannir – Fall 2025 ELE 501 - Lecture 1 1
Integrated Circuit Design Constraints
• Key Design Goal: Reduce cost, size, power diss.
– Small chip area
– Small number of pins (terminals).
• Key Design Constraints and Limitations:
– Large size capacitors are difficult (no coupling and bypass capacitors)
– Large size resistors are difficult (no bias resistors).
– Component variability issues
– n-channel devices offer better performance than p-channel devices.
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Integrated Circuit Design Characteristics
Solutions:
• Circuit topologies that use transistors only (minimize the use
of passives).
• Circuit topologies that rely on the performance of n-channel
devices rather than p-channel devices.
• Circuit topologies that rely on component matching and
parameter ratios rather than absolute values.
• The use of feedback for stable reliable designs.
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Transistors (Review)
• Transistors are the fundamental element in integrated
circuits
• The current-voltage relationship Current at the
output terminal is a function of the voltages/currents at
the two other input terminals.
• Modeled using dependent sources
• Metal-Oxide Semiconductor Field Effect Transistors
(MOSFETs) are 4 terminal semiconductor devices
– The most dominant electronic device
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MOS Transistors (Review)
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MOS Transistors (Review)
iG = 0
NMOS iD
iG = 0
PMOS iD
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Summary: NMOS Transistors
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Summary: PMOS Transistors
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Small-Signal Models (Review)
T-Model
Model
W W 2I D
g m k nVOV nCox VOV 2 nCox I D
L L VOV
| VA | 1
rO ro is typically 10k-1000k
ID I D
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Basic Amplifier Configurations
• 3 basic types
• Biasing not shown
• ‘Common’ grounded
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Characterizing Amplifier Performance
Rin
• Input Resistance vi vsig
vi Rin Rsig
Rin
ii
• Output Resistance vx
Ro (Zero input)
ix
• Open-Circuit Voltage Gain
v
Avo o
vi RL
• Amplifier Voltage Gain
vo RL
Av Avo
vi RL Ro
• Overall Voltage Gain
vo Rin
Gv Av
vsig Rin Rsig
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DC Biasing (Review)
Biasing the MOSFET at a point Q located on the segment AB of the VTC to operate as
an amplifier
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Biasing Methods (Review)
• Biasing with a fixed Gate voltage
1 source with Coupling Capacitors 2 sources
DC Open-Circuit
AC Short Circuit
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Integrated Circuits Considerations
• Classical circuits use resistors for biasing and
decoupling and bypass capacitors.
• These passive elements consume a lot of area
on an IC, and there could be a lot of variations
in their values.
• Biasing using current sources (current mirrors).
• Differential amps + Level shifting
More transistors, but IC transistors are
cheap
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IC Amplifiers
• Fundamental building blocks for analog IC’s:
– Amplifiers
– Current Sources (for biasing)
• Assumption:
– All MOSFET amplifiers are biased to operate in
saturation mode (active mode for BJTs)
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Common Source with R Load
Typical CS amplifier The input resistance is infinite
Rin
For the output resistance, set vi = 0
Ro RD || ro
For the voltage gain
vo g m v gs RD ||r o
Since vgs = vi
Avo g m RD || ro
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IC Amplifiers
Need to minimize the use of passive elements
(resistors/capacitors)
• Use current mirrors for biasing
• Use active loads
• Use direct coupling (no coupling capacitors).
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The Basic Gain Cell
• The Basic Gain cell in an IC amplifier is a common source (or common
emitter) transistor loaded with a constant current source.
• Constant current sources replace RD and RC.
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The Basic Gain Cell
• Advantages:
– No passive elements
– Load resistance becomes very high (ideally infinite) much higher
gain is possible than a finite RD or RC
• These transistors are said to be current-source loaded, or active
loaded transistors.
• Biasing is set by the value of the current source such that ID = I
• Disadvantage These circuits can be unstable because nothing
determines vD and/or vG
– Solution: These are part of larger circuits where feedback will be used
for stability.
– For now, we will assume they are biased such that they are in saturation
(active region for BJT)
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Common Source IC Amplifier
Ideal DC current source
Open circuit in small signal
Open Circuit Voltage Gain
vo
Avo g m ro
vi
Small Signal Model Input Resistance:
Ri
Output Resistance:
Ro ro
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Intrinsic Gain
• The open circuit gain |Avo| = gmro is the maximum available
voltage gain in the common source configuration.
• It is referred to as the intrinsic gain of the MOSFET.
Intrinsic Ao g m ro
Gain:
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Equivalent Circuit of CS Amp
Avo g m ro
Ri
Ro ro
Equivalent circuit of a voltage amplifier
vi Ro vo
Ri A v Equivalent circuit of op-amp?
vo i
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Gain With Load
What happens when a load is connected?
A load can be modeled by a load Resistance RL connected to the
output (Drain)
What is the Amplifier voltage gain
IBIAS with load (Av)
vo
Av ?
vo vi
vI Q
RL
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Gain With Load
RL
Av g m RL || ro
vo
vi
vi ro vo
Avo g m ro
Ri
Ri A v RL
vo i
Ro ro
The gain will decrease from the
g m RL || ro
RL
Av Avo
RL Ro maximum possible (intrinsic gain)
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CS Biasing With Current Mirror
What is the effect of a current source implemented using transistors
on the gain?
VDD Ideal
Q3 Q2
vO
Q1
IREF vI
• Current mirror circuit can be modeled using common source transistors
• The output resistance of Q2 becomes the load resistance of Q1
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CS Biased with Current Mirror
ro2 becomes the load resistance for Q1
g m ro 2 || ro1
ro 2
Av Avo
ro 2 Ro
VA2
ro 2
I
The finite output resistance reduces the
voltage
If ro2 = ro1 then the gain is reduced by half!
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Common Source - Exercise
Consider the following circuit:
Given: VDD 3V I REF 100μA
For all Transistors:
k n nCox 200 μA V 2 L 0.4μm
W 4μm
k p p Cox 65 μA V 2
VAn 20V
Vtn Vtp 0.6V VAp 10V
Determine the voltage gain vo/vi
g m1 ro1 || ro 2 42V / V
vo
Av
vi
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Region of Linear Operation
VDD VDD • For the amplifier to operate correctly, both Q1
and Q2 must be in saturation.
• There is a limit to the max and min values of
Q3 Q2 vO to ensure operation in saturation
vO
• Min value is such that Q1 stays in saturation
vDS 1 vOV 1
IREF Q1 ID1
vO vOV 1
vI • Max value is such that Q2 stays in saturation
vSD 2 vOV 2
vO VDD vOV 2
What are the limits for the output
voltage vO in the previous example?
2.45V and 0.32V
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Increasing the Gain
• To increase the gain of the basic gain cell:
– Increase the output resistance
– Maintain the same current (no loss)
• We require a current buffer
– Passes the current
– Raises the output resistance
• This is the dual of a voltage buffer
– Passes the voltage
– Lowers the output resistance
– Implemented using Common Drain
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Increasing the Gain
• This can be accomplished by adding a
Common-Gate transistor
– Unity current gain
– Low input resistance
– High output resistance
• This process is known as cascoding
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