2.
Instruction Set and Programming of 8085
➢ Instruction Cycle:
It's the sequence of steps the CPU performs to execute each machine-level
instruction. This cycle repeats continuously while a program runs, until a halt
condition is met.
➢ Machine Cycle:
The machine cycle is the sequence of basic operations performed by a
computer's central processing unit (CPU) to execute a single instruction.
➢ T-state:
A T-state is one clock cycle of a microprocessor. It represents the smallest unit
of time in which a microprocessor can perform part of an operation.
➢ Stack:
A stack is a linear data structure that stores items in a Last In, First Out (LIFO)
manner. This means the last item added to the stack is the first one to be
removed.
Key Characteristics
• Push: Adds an item to the top of the stack.
• Pop: Removes the item from the top of the stack.
• Top: Refers to the most recently added item.
• LIFO Order: Last item in is the first item out.
➢ Subroutine:
A subroutine is a small, reusable block of code designed to perform a specific
task. It can be called from different parts of a program whenever that task is
needed.
➢ Branching Control Group Instructions:
1. Unconditional Call – Call:
An unconditional call is an instruction that always transfers control
from the main program to a subroutine, regardless of any condition.
After the subroutine finishes, control returns to the main program using
the RET instruction.
Working Mechanism:
• The address of the next instruction (after CALL) is pushed onto
the stack.
• Control jumps to the subroutine at the specified address.
• When RET is executed, the CPU pops the return address from
the stack and resumes execution.
2. Conditional Call Instructions:
A conditional call is an instruction that transfers control to a subroutine
only if a specific condition is true. If the condition is false, the program
continues with the next instruction.
Working Mechanism:
• The CPU checks a flag (like Zero, Carry, Sign, Parity).
• If the condition based on that flag is met, it calls the subroutine.
• Otherwise, it skips the call and continues execution.
3. Unconditional Return-RET:
The RET instruction is used to return control from a subroutine back to
the main program. It is unconditional, meaning it always returns
regardless of any conditions or flags.
Working Mechanism:
• When a subroutine is called using CALL, the address of the
next instruction is pushed onto the stack.
• The RET instruction pops that address from the stack and
jumps back to it, resuming execution in the main program.
4. Conditional Return Instruction:
A conditional return is an instruction that returns control from a
subroutine to the main program only if a specific condition is true. If
the condition is false, the return does not occur and the subroutine
continues executing.
Working Mechanism:
• The CPU checks a flag (Zero, Carry, Sign, Parity).
• If the condition is met, the return address is popped from the
stack, and control goes back to the main program.
• If not, the next instruction in the subroutine is executed.
5. Restart Instructions- RST:
The Restart (RST) instruction is a single-byte call instruction used to
transfer control to a fixed memory location. It’s like a shortcut for
calling frequently used subroutines.
Working Mechanism:
• The 8085 microprocessor has 8 RST instructions: RST 0 to
RST 7.
• Each RST instruction jumps to a predefined memory
address.
➢ Machine Control Group of Instructions:
A. Stack Operation Instructions
1. PUSH- PUSH Register pair on stack
The PUSH instruction is used to store the contents of a register
pair onto the stack. It saves data temporarily so it can be
retrieved later using the POP instruction.
Working Mechanism:
1. The Stack Pointer (SP) is decremented by 1.
2. The high-order byte of the register pair is stored at the
new SP location.
3. SP is decremented again.
4. The low-order byte is stored at the new SP location.
2. POP- POP off stack to register pair
The instruction POP in assembly language is used to remove
(or "pop") the top value from the stack and load it into a
register pair.
Working Mechanism:
1. Copy byte at address SP → lower register.
2. Increment SP by 1.
3. Copy byte at new SP → higher register.
4. Increment SP by 1 again (total +2).
3. XTHL-Exchange H and L with top of stack
Exchange the contents of the HL register pair with the top two
bytes of the stack (pointed to by the Stack Pointer SP).
Working Mechanism:
1. Swaps:
L ↔ Memory[SP]
H ↔ Memory[SP + 1]
2. SP remains unchanged.
3. No flags are affected.
4. SPHL- Copy H and L register to SP
Copies the contents of the HL register pair into the Stack
Pointer (SP).
Working Mechanism:
1. The 16-bit value in HL is transferred to SP.
2. No flags are affected.
3. Useful for setting the stack pointer dynamically
during program execution.
B. Interrupt Control Operations
1. SIM- Set Interrupt Mask
Used to configure interrupt masks, serial output, and reset
interrupt flip-flops.
2. RIM- Read Interrupt Mask
Reads the status of interrupt masks, pending interrupts, and
serial input data.
3. EI- Enable Interrupt Instruction
Allows the microprocessor to respond to hardware interrupts.
➢ General Machine Control Operation:
1. PCHL- Load program counter with HL register pair contents.
Transfers control to the memory address stored in the HL register pair by
loading it into the Program Counter (PC).
2. NOP- No Operation.
No operation is performed only instruction is fetched and decoded.
3. HLT- Halt and Enter Wait State
Stops the execution of the program and puts the microprocessor into a halt
state.