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Design of 8x3 Encoder & 2x4 Decoder

The document outlines the design and implementation of an 8x3 encoder and a 2x4 decoder using logic gates. It includes a list of required components, theoretical explanations of encoders and decoders, truth tables for both devices, and a procedure for circuit construction and verification. The aim is to understand the functionality of encoding and decoding processes in digital circuits.

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jayanthisree
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24 views4 pages

Design of 8x3 Encoder & 2x4 Decoder

The document outlines the design and implementation of an 8x3 encoder and a 2x4 decoder using logic gates. It includes a list of required components, theoretical explanations of encoders and decoders, truth tables for both devices, and a procedure for circuit construction and verification. The aim is to understand the functionality of encoding and decoding processes in digital circuits.

Uploaded by

jayanthisree
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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Ex.

No: 3 DESIGN AND IMPLEMENTATION OF ENCODER AND


DECODER
Date:
AIM:
To design and implement 8x3 encoder and 2x4 decoder using logic gates

APPARATUS REQUIRED:
[Link]. COMPONENT SPECIFICATION QTY.
1. 3 I/P AND GATE IC 7411 2
2. OR GATE IC 7432 3
3. NOT GATE IC 7404 1
2. IC TRAINER KIT - 1
3. PATCH CORDS - 30

THEORY:
ENCODER:
An encoder has 2n input lines and n output lines. In encoder the output lines generate
the binary code corresponding to the input value. Octal to binary encoder has eight inputs,
one for each octal digit and three outputs that generate the corresponding binary code. In
encoder, it is assumed that only one input has a value of one at any given time otherwise the
circuit is meaningless. It has a state that when D0 = 1, the outputs are zero.
DECODER:
A decoder is a digital circuit that performs inverse operation of an encoder. A decoder
is a multiple input multiple output logic circuit, which converts coded input into coded output
where input and output codes are different. The input code generally has fewer bits than the
output code. Each input code word produces a different output code word i.e there is one to
one mapping expressed in the truth table. In the block diagram of the decoder circuit the
encoded information is present as n input producing 2 n possible outputs. 2n output values are
from 0 throughout 2n-1.
TRUTH TABLE OF ENCODER:
INPUT OUTPUT
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 A B C
1 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
0 0 0 1 0 0 0 0 0 1 1
0 0 0 0 1 0 0 0 1 0 0
0 0 0 0 0 1 0 0 1 0 1
0 0 0 0 0 0 1 0 1 1 0
0 0 0 0 0 0 0 1 1 1 1

LOGIC DIAGRAM:
TRUTH TABLE FOR 2x4 DECODER WITH ENABLE:
INPUT OUTPUT
Enable A B Y0 Y1 Y2 Y3
0 X X 0 0 0 0
1 0 0 1 0 0 0
1 0 1 0 1 0 0
1 1 0 0 0 1 0
1 1 1 0 0 0 1

LOGIC DIAGRAM:

PIN DIAGRAM:
AND Gate (74LS08)

OR Gate (74LS32):

NOT Gate (74LS04)

PROCEDURE:
1. Make the circuit connections as shown in the logic diagram.
2. Apply the binary input signals for the Decoder and Encoder circuits.
3. Verify the outputs with their respective truth tables.

INFERENCE:

RESULT:

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