EDISON ROBERTO C.

DA SILVA,
EUZELI CIPRIANO DOS SANTOS, JR.,
AND CURSINO BRANDÃO JACOBINA

Nonsinusoidal Carrier-Based PWM

and Space Vector Modulation Techniques

I
n power electronics, pulsewidth modulation (PWM) has been the subject of intensive
research and is widely employed to control the output voltage of static power converters.
A large variety of feed-forward and feedback control schemes has been described in the liter-
ature [1]–[3], but the most widely used methods of PWM are the sinusoidal PWM (SPWM) and
the space vector PWM (SVPWM).
In SPWM, introduced by Schönung in 1964 [4] to produce the output voltage waveform, a
sinusoidal control signal (modulating control signals) is compared with a triangular signal (car-
rier signal). An SVPWM uses complex voltage vector for control. Although one of the first suggestion
for employing the complex voltage vector in PWM control was made by Jardan et al. [5], the SVPWM
technique was first published by Busse and Holtz [6] followed by Pfaff et al. [7] in the same year.
Prof. Joachim Holtz has had a lifelong contribution and achievement in PWM [8]–[22]. He was one
of the pioneers not only of SVPWM technique but also of the three-level inverter topology [23]. Most
of his papers on the topic use SVPWM, but he has not neglected other possibilities, including new

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Date of publication: 17 June 2011

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 obtained with the third harmonic
In power electronics, PWM has been the subject injection PWM (THIPWM) is some-
what flattened on the top and has
of intensive research and is widely employed to been discussed in detail in [29]. Zero-
sequence component with maximum
control the output voltage of static power amplitudes of 1/6 [29] and other peak
converters. values for the sinusoidal modulating
signal have been investigated. It was
concluded that the amplitude of 1/4
approaches for solving specific prob- and a three-level neutral-point- reduces the harmonic distortion in
lems such as low-frequency operation clamped (NPC) inverter. the inverter output voltage [30]. Fig-
in high-power applications [18]–[22]. ure 1(b) and (c) (top) compares the
On the other hand, modification of the CPWM Concept Evolution THIPWM (1/4) with the SPWM. Note
modulating signal introduced many In the SPWM technique [Figure 1(b)], that, for a high mf in SPWM, the
improvements to SPWM technique, the amplitude modulation index ma is three-pole voltage pulses, va0, vb0,
resulting in nonsinusoidal carrier- defined as the relation between the and vc0, inside a switching interval Ts
based PWM (CPWM) techniques [24], peak amplitude of modulating con- are almost centered [25]. These high
[26]–[36]. Also, the superior perform- trol signals and the amplitude of the switching frequencies can be avoided
ance characteristics of SVPWM led to carrier signal. An important feature is with the use of regular-sampled PWM
the investigation of new solutions, that the amplitude of the fundamen- (RSPWM), which was first introduced
resulting in modified SVPWM meth- tal frequency component of the pole by Bowes [55].
ods [37]–[42]. voltage, Va0 in Figure 1(a), is linear On the other hand, as concluded
This article is a tribute to Prof. with the variation of ma. This occurs by Depenbrock [26], the use of dis-
Holtz. His efforts have been appreci- when the modulation ratio mf between continuous zero-sequence compo-
ated by exhibiting the continuous the switching frequency of the car- nents not only makes this increase
efforts of researchers trying to repro- rier signal and the fundamental fre- of 15.5% possible but also reduces
duce with other approaches the char- quency of the control signal is high the number of times the switches
acteristics of the powerful concept enough, e.g., 21. are turned on and off by clamping
he pioneered, the SVPWM. For that, A value ma > 1 causes overmodu- each pole voltage at 60°. It should be
the article recalls the evolution of lation, i.e., a reduction in the number noted that an alternative approach
the parallel advances of CPWM and of pulses in the pole voltage va01 for modifying the carrier has been
SVPWM, discusses their relationship waveform and a consequent loss of investigated [28], [35], but this re-
already established in [43]–[54], its linearity. After Buja and Indri [25], sults in complex implementation [36]
and shows another possible rela- it was gradually recognized that the so that the modified modulating refer-
tion, allowing to develop an alter- addition of an adequate third har- ence approach has been preferred.
native algebraic PWM modulator monic zero-sequence components to The use of an injected zero-sequence
with the same SVPWM characteris- each of the pole voltage reference signal for a three-phase inverter [25],
tic. In addition, it extends the alge- waveform makes it possible to increase [29] initiated the research on nonsi-
braic algorithm to the control of the fundamental of the output voltages nusoidal CPWM [26], [31]–[38].
both two-level Z-source inverter by 15.5%. The new modulating wave This concept can be expressed in

νT νa∗ νb∗ νc∗ νT νa∗ ∗

νa0 νh

+
E /2
– a
+
E 0 b n
–
c
+
E /2
–

∗
νT νa∗ νa0 νh
(a) (b) (c)

FIGURE 1 – (a) Three-phase inverter, (b) SPWM—principle and pole voltages, and (c) THIPWM (1/4), top: zero-voltage signal vh (middle)

and flat-modulating signal generated, va0 ; symmetric modulation (equivalent to SVPWM), bottom: zero-voltage signal vh (middle, l ¼ 0:5)

and modulating signal generated, va0 .

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terms of the sinusoidal reference relations, different modulators, with period of the three-phase referen-
and the zero-sequence signal vh, i.e., easier implementation than that of ces into six intervals. In the switch-
SVPWM, have been developed. This is ing interval inside of Sector I
vj  ¼ vj  þ vh (j ¼ a, b, c): (1) the case of hybrid PWM (HPWM) [49], shown in Figure 3(b), v a and v c
digital scalar PWM (DSPWM) [50], have the maximum and minimum
An important feature is that the [51], [53], and generalized PWM values, respectively, while v b has
injected zero-sequence signal vh will algorithm [52]. Among them, the an intermediate value. Because v a ,
not increase the low-frequency har- DSPWM has a simple software algo- v b , and v c change for each sector,
monic distortion for vab. From (1), rithm to generate the SVPWM and is working with the maximum v M ,
the SPWM corresponds to vh ¼ 0. based on the concept of imposing medium v mid , and minimum v m vol-
After studying the mean inverter an average voltage corresponding tages (which can be defined by
pole voltages obtained by SVPWM, to each reference phase during the comparing the values of the three
van der Broeck et al. [38] concluded sampling interval [53]. The idea is reference signals) simplifies the
that an SVPWM could be obtained similar to that in [45]. algorithm.
by substitution of the sinusoidal The intersection of reference vol-
reference signal in a normal three- Understanding the tages vM, vm, and vmid with the trian-
phase modulator by the nonsinu- Relationships Among gle defines 1) the pulsewidths for
soidal modulating curve shown in SVPWM, HPWM, and DSPWM each of the phase voltages, s1 , s2 ,
Figure 1(c), bottom. This means To understand the correlations among and s3 , 2) the distances between the
that an SVPWM can be obtained by SVPWM, HPWM, and DSPWM, some switching instants for phases a, b,
the adequate choice of vh in (1). van points have to be considered. There and c (the delay of the first switch-
der Broeck also realized that other are eight possible switch combinations ing procedure t01, the distances of
curves could be synthesized as for a three-phase inverter (inverter the switching instants, t1 and t2, and
reference curves, some of them switch states) Si , (i ¼ 0, 1, . . . 7), the remaining time of the sampling
already mentioned in the literature. which is shown in Figure 2. Six of period t02), and 3) the time intervals
With the conception of modified them, S1, S2,. . . S6, apply voltages at tp1, tp2, and tp3 (switching delays)
SVPWM techniques [37], [39], [40], the output (active switch states or before each leg changes in a given
many researchers investigated the active vectors), while S0 and S7 corre- switching interval. Note that inter-
relationship between these techni- spond to the short-circuiting of the vals t1 and t2 correspond to the time
ques and vh, i.e., between SVPWM bottom and top switches (zero switch intervals calculated in SVPWM dur-
and nonsinusoidal CPWM techni- states or zero vectors), respectively. ing which switch states S0, S1, S2,
ques [43]–[45], [47], [54] or other Now, consider sectors I–VI in Fig- and S7 are on and define the line
techniques [48]. Based on these ure 3(a). They divide the fundamental voltage.

+ Va + Va + Va + Va
E Vb E Vb E Vb E Vb
– – – –
Vc Vc Vc Vc

(a) (b) (c) (d)

+ Va + Va + Va + Va
E Vb E Vb E Vb E Vb
– – – –
Vc Vc Vc Vc

(e) (f) (g) (h)

FIGURE 2 – Eight possible phase leg switch combinations for a voltage source inverter (VSI) (a) S1, (b) S2, (c), S3, (d) S4, (e) S5, (f) S6, (g) S0,
and (h) S7.

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 Note from Figure 3(b) that addition or subtraction of vh to the interval, i.e., t01 ¼ t02 . The corre-
reference voltages only influences the sponding zero-sequence compo-
tz ¼ t01 þ t02 ¼ Ts  (t1 þ t2 ): (2) pole voltages [47], [49], [51]. This nent is equal to the average
influence can be measured by the voltage value at the switching
In (2), tz ¼ t01 þ t02 constitutes the distribution ratio [43] (also named as interval, i.e., vh ¼ (vM  þ vm  )=2
total freewheeling interval. Note, in the apportioning factor [48]), [32], [43], [49], [51], which has
case of the figure, that t01 and t02 are already been seen in Figure 1(c),
equally distributed at the beginning t02 bottom. In reality, l ¼ 0:5 is the
l¼ , (3)
and end of the switching interval. In t01 þ t02 best choice [43] among the other
reality, these zero-interval constituents continuous possibilities 05l51,
can assume different values, provided which indicates the distribution of which have been investigated
that the condition in (2) is respected. the freewheeling switch states inside in [31].
the switching interval. 2) With l ¼ 0, one of the pole vol-
The Concept of Distribution Values 0l1 define a particular tages is connected to the negative
Ratio and Its Use distribution of freewheeling switch dc-bus clamping the pole voltage
When a zero-sequence component vh states and is really the ultimate basis during 120° while the other two
is added to each sinusoidal refer- for the definition of phase-modulat- phases modulate. In this case,
ence, new references v0M , v0M , and v0i ing signals. t02 ¼ 0 and t01 ¼ tz, meaning that
are generated, according to (1). Note 1) The use of l ¼ 0:5 results in the only the freewheeling switch state
that t1 and t2 remain unchanged, while conventional SVPWM in which tz S0 is employed, together with S1
0
t01 increases to t01 and t02 decreases to is equally distributed at the begin- and S2 shown in Figure 2. The cor-
0
t02 . It can be concluded that the ning and end of the switching responding modified modulating
signal is obtained by subtracting
vm from E=2. It is illustrated in
Figure 4(a) and was first pro-
V VI I II III IV V posed in [40].
3) With l ¼ 1, one of the pole vol-
νa∗ νb∗ νc∗ tages is connected to the posi-
tive dc-bus clamping the pole
voltage during 120° while the
other two phases modulate. In
(a)
this case, t01 ¼ 0 and t02 ¼ tz ,
νT p1 p1′
meaning that only the freewheel-
νa∗
τh ing switch state S7 is employed,
p2 p2′
together with S1 and S2. The
p3 p3′ νh zero-sequence component is ob-
νb∗ tained from vh ¼ ðE=2 þ vm Þ,
νc∗ as shown in Figure 4(b), and
was introduced in [39].
4) There are four possibilities for
tp1
τ1′ changing l from l ¼ 0 to l ¼ 1
tp1′ τ1 and back, each change lasting
for 60°. They are shown in Figure
tp2 4(c)–(f) and are referred as
τ2′ discontinuous PWM 1 (DPWM1)-
tp2′ τ2 DPWM4. Consider DPWM1 in
Figure 4(c), in which the change
tp3 of l coincides with the middle of
τ3′
the sector. In DPWM2, a phase
tp3′ τ3 shift of 30° phase difference exists
t01 t02 in relation to DPWM1 (the change
t1 t2
occurs at the beginning of the
t01′ Ts t02′
sector), as shown in Figure 4(d).
(b) So it is for DPWM3 in relation to
DPWM2 and for DPWM4 in rela-
FIGURE 3 – Two-level CPWM and zoom of one switching interval inside of Sector I, tion to DPWM3. This makes the
including intervals for different modulation approaches. changes in DPWM3 and DPWM4

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 νa∗ ∗
νa0 νh νa∗ ∗
νa0 νh νa∗ ∗
νa0 νh

μ μ μ
1 1 1
0 0 0
(a) (b) (c)
νa∗ ∗
νa0 νh νa∗ ∗
νa0 νh νa∗ ∗
νa0 νh

30° μ 60° μ 90° μ

1 1 1
0 0 0
(d) (e) (f)

FIGURE 4 – Modified modulating signals (a)–(f) and their relation with l. (a) l ¼ 0, (b) l ¼ 1, (c) DPWM1, (d) DPWM2, (e) DPWM3, and (f) DPWM4.

complementary to those in DPWM1 The performance of the seven pos- reference with the triangular wave-
and DPWM2, respectively, as sibilities depends on ma. In terms of form. For digital implementation,
shown in Figure 4(c)–(f). Some harmonic distortion factor (HDF) the there are three possibilities of calcu-
of these cases have been inves- SVPWM method ðl ¼ 0:5Þ is superior lation of pulsewidths after the addi-
tigated in [41]. to all the discussed methods in the tion of the zero-sequence signal vh.
Although there is a large number low-modulation index range. How- These are obtained from Figure 3 by
of possible modified reference sig- ever, in the high-modulation index using the triangle equivalence.
nals, the seven (including the case of range, a transition to one of the DPWM 1) First Possibility: Calculation of
l ¼ 1) depicted earlier are the most methods should be realized [49], [56], duration of the modified phase
employed. The characteristics of all [57]. The DPWM selection can be pulses, i.e., s01 , s02 , and s03 , from
these cases have been investigated in based on the switching loss character-
[49], [52], [56], and [57]. istics, which depend on the load phase   
vj þ vh 1
A general relation that allows for angle. Inside the variation of this angle s0i ¼ þ Ts
E 2
building the zero-sequence compo- in the 30° and þ30° range, DPWM1
3 (i ¼ 1, 2, 3; j ¼ a, b, c; i ¼ j),
nent, vh, as a function of l, vM, and vm presents the smallest losses. Besides 0

inside each sector is given by [49], [51] these angle limits, 30° or þ30°, t01 ¼ Ts  sM ,
DPWM2 or DPWM3 present the small- t02 ¼ s0m : (5)
 
E est losses, respectively, for any modu-
vh ¼  (1  2l) þ lvM þ (1  l)vm :
2 lation index greater than 0.3 [49]. The comparison of s0i allows
(4) Besides the linear modulation range, determination of s0M , s0m , and s0mid .
the voltage gain characteristic favors This method corresponds to the
An Algebraic Algorithm DPWM1 [14], [49]. DSPWM strategy with direct
Figure 5 gives the block diagram of the In analog implementation, the measurement of the average val-
hybrid modulator for generating pulses are determined by the compar- ues of the three modified refer-
the different zero-sequence signal. The ison of the modified modulating ence phase voltages at a given
generation of PWM must be accom-
plished in two steps: 1) the choice of
νa∗ νb∗ νc∗
the zero-sequence component and 2)
the determination of pulsewidths.
The choice of the zero-component
sequence has been well discussed in Determination of
[42], [56], and [57]. The modulation νM and νm
index, for a given dc-link voltage E, is νa∗ νb∗ νc∗
νa∗′
the ratio of the fundamental voltage of μ νh
νb∗′ Calculation
the modulated switching sequence, Choice of μ νh = –{(1 – 2μ) E + μν
νM + (1 – μ)ν
νm} ∑ of Gating
2
V1m, to the fundamental component νc∗′ Pulses
magnitude of the six-step mode volt-
age, 2E=p [1], i.e., ma ¼ pV1m =2E. FIGURE 5 – Block diagram for the HPWM.

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 switching interval [45], [53]. where pi 0 ¼ E2  (vj þ vh ). vi ¼ 0. Equations (2) and (5) are valid
Note that (4) can also be written The signal’s width to com- when zero-sequence signals are added
as a function of sM , sm , and smid . mand the inverter switches (s01 , to the reference voltages. In this case,
2) Second Possibility: Calculation of s02 , and s03 are given by each pulsewidth needs to be recalcu-
the switching distances between lated to insert the shoot-through zero
the phase pulses, i.e., duration s01 ¼ Ts  tpi
0
, (i ¼ 1, 2, 3): (10) vector time (s0) equally distributed
of line voltage pulses t1 and t2 among the legs, i.e., s0/3 for each leg.
[43], [49], from The steps for implementation of the To guarantee that this method gen-
approach after calculating p1, p2, and erates the same active states as the
Ts  p3 are converter, as in Figure 7(b), the inter-
t1 ¼ (v  vmid ), n Step 1—define pm, pmid, and pM vals of time sa1 , sa2 , sb1 , sb2 , sc1 , and sc2
E M
Ts from (7). need to be compensated as follows:
t2 ¼ (vmid  vm ), (6)
E n Step 2—determine vh by using (8).
s0
n Step 3—calculate the distorted s0ai ¼ sai þ ,
3
and t01 þt02 ¼ Ts ðt1 þt2 Þ as in (2). control signals by vx 0ref ¼
s0bi ¼ sbi ,
Values of t1 and t2 are propor- vx ref þ vh :
s0
tional to the three reference line n Step 4—determine the modified s0ci ¼ sci  : (11)
3
voltages (the same as in SVPWM) delay times tp1 0 , tp2 0 , and tp3 0 from
at a given switching interval. The (9). where i ¼ 1, 2, referring to the top
use of vh as a function of l, and n Step 5—calculate the pulsewidths and bottom switches.
calculation of t1, t2 (related to the for the inverter switches (s01 , s02 , For generalization purpose, this
differences between the maximum and s03 ) from (9). can be written as
and the middle values and between n Step 6—determine pole voltages
s0
the middle and minimum values for (va0, vb0, and vc0) by s0M ¼ sM þ ,
3
reference voltages va  , vb  , and If (t5tpj 0 )or(t52si 0 ), vj 0 ¼ E=2.
s0mid ¼ smid ,
vc  , respectively), characterizes If ðtpj 0 5t52si 0 Þ; vj 0 ¼ þ E=2. s0
the HPWM technique. Each inter- Any of the three possibilities can s0m ¼ sm  : (12)
3
val corresponds to the interval be directly applied to the three-phase
time in which each of the inverter VSI, including transients, and can The algorithm for generation of the
switching states employed are also be adapted for other converters. modified pulses is the same except
on, at a given switching interval. that the calculation of the pulse-
3) Third Possibility: Calculation of Application of the widths is done by using (11) or (12)
the time intervals before each Algorithm to the Z Inverter for a given s0 . Figure 6(c) shows the
leg changes inside the switching The Z-source inverter [58] provides simulated results obtained with the
interval (switching delays), tp1, the unique feature of buck and boost proposed algorithm for the modulat-
tp2, and tp3, using the distances operation capability with the same ing signal, zero-sequence compo-
circuit, which is not found in neither nent, capacitor voltage, and input
E voltage–source nor current–source voltage, vi, of the Z-source inverter
p1 ¼ pm ¼  vM ,
2 converters. Such a converter employs for l ¼ 0:5. Other parameters used
E an impedance circuit to connect the were the switching frequency 10 kHz,
p2 ¼ pmid ¼  vmid ,
2 converter to the primary energy C1 ¼ C2 ¼ 1 mF, L1 ¼ L2 ¼ 160 lF,
E
p3 ¼ pM ¼  vm (7) source, as observed in Figure 6(a). A E ¼ 100 V, s0 ¼ 10 ls, and modulation
2
virtual ‘‘0’’ defines the pole voltages index ¼ 0.9. Boost characteristic is
that can be used to determine va0, vb0, and vc0. Figure 6(b) shows the clear.
both the sector of operation and generation of the pole voltages by
vh, given by the comparison of the triangle with the Application of the Algorithm
sinusoidal waveforms for the Z-source to the NPC Multilevel Inverter
vh ¼ lpmin  (1  l)(E  pmax ): (8) inverter. As described in [59], the Multilevel inverters have emerged as a
shoot-through configuration is evenly solution for working with higher voltage
The final pulsewidths are given by distributed among the three-phase levels. They have been considered for
legs, while the line voltage pulses and, an increasing number of applications
0
pi Ts consequently, the active configuration because of not only their high-power
tpj0 ¼ , operating inside of the switching inter- capability but also lower output har-
E
(i ¼ 1, 2, 3; j ¼ a, b, c; i ¼ j), val remain unchanged as seen in Fig- monics and lower commutation losses.
0 ure 6(b) (t1 and t2 remain the same). Only the three-level NPC inverter
t01 ¼ tp1 ,
0
During the shoot-through, the pole [60], shown in Figure 7(a), will be
t02 ¼ Ts  tp3 , (9) voltages are equal to zero, since considered here. Its light adaptation

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 νa∗ ′ νb∗ ′ νc∗ ′ νa∗ νb∗ νc∗ νt
L1

νh
C1 C2 a
+
b n νh
E
–
c
νh
τo τo τo τo
L2 3T 6T 6T 3T

(a) τa1

τa2

τb1

τb2

τc1

τc2

toi′ t1 t2 tof′
(c)
toi t1 t2 tof
(b)

FIGURE 6 – (a) Z-source inverter, (b) modified reference voltages generated for Z-source inverter with vh given in (4), and (c) experimental results
for DPWM1: capacitor and inverter input voltage (top), pole voltage (middle), and nonsinusoidal modulating signal (bottom) ðfs ¼ 10 kHzÞ.

allows for applying the algorithm pro- 3) To extend the result to any s Figure 7(c) presents the experi-
posed in the control of the multilevel number of levels (N2), Step 2 mental results for the clamped pole
NPC inverter [61]. changes to voltage for the converter. Although
1) Values of the levels N2 are   not addressed in this article, special
given by E attention should be paid to the neu-
vh ¼ lpmin  (1  l)  pmax :
N 1 tral point balance [22], [64]. Also, it is
 
1 (k  1) (15) desired to operate medium-voltage
Eixo(k) ¼  E,
2 (N  1) drives at switching frequencies
(k ¼ 1, 2, . . . ,N) (13) 4) The equation for Step 4 becomes below 1 kHz to minimize the switch-
ing losses. However, using SVPWM
pi
and are shown for N ¼ 3 in tpi ¼
Ts (i ¼ 1, 2, 3): (16) and other techniques at low switch-
E
Figure 4. N1 ing frequency cause high harmonic
2) Step 1 is generalized as distortion of the machine currents.
5) The determination of the pole One good solution to reduce the
If (Axis(k)4vj ref 4Axis(k þ 1)), then voltages (va0, vb0, and vc0) for switching frequency without sacrific-
(k = 1, 2, . . . , (N-1) is now ing harmonic content is using
pi ¼ Axis(k)  vj ref ,
synchronous optimal modulation
( j ¼ a, b, c; i ¼ 1, 2, 3; i ¼ j): (14)
If(t5tpi 0 ) or (t52ti 0 ), [19]–[21], [65].
vj 0 ¼ value of axis(k þ 1):
Figure 7(b) shows the defini- Conclusions
If(tpi 0 5t52ti 0 ),
tion of pi for a three-level NPC This article reviews the nonsinusoi-
inverter. vj 0 ¼ value of axis(k): dal CPWM and SVPWM techniques

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 +E/2
p1
+
E/2
E /2
–
νa νb νc
+ a
E 0 b n 0
– c p2
+
E /2
E/2
– p3
–E/2
(a) (b) (c)

FIGURE 7 – (a) Three-level NPC inverter, (b) definition of p1, p2, and p3 in the case of three-level inverter, and (c) pole voltage (experimen-
tal) for DPWM1 (pf = 0.9, fs ¼ 4 : 43 kHz; 50 V=div).

and deals with the three possibilities was a visiting professor at the Uni- Rev., vol. 51, no. 8/9, Aug./Sept. 1964,
pp. 555–577.
of calculation of pulsewidths after versity of Siegen, Germany. Since [5] K. R. Jardan, S. B. Dewan, and G. Slemon,
the addition of a zero-sequence sig- March 2009, he has been with the ‘‘General analysis of three-phase inver-
ters,’’ IEEE Trans. Ind. Applicat, vol. 5,
nal. A general algorithm is proposed Federal University of Campina Grande, no. 6, pp. 672–679, 1969.
and adapted for dealing with the con- where he is currently a professor of [6] A. Busse and J. Holtz, ‘‘Multiloop control
of a unity power factor fast-switching AC
trol of the three-level NPC inverter electrical engineering. His research to DC converter,’’ in Conf. Rec. IEEE Power
and also the Z-source converter. interests include power electronics, Electronics Specialists Conf. (PESC’82),
1982, pp. 171–179.
Experimental results corroborate the electrical drives, and PWM strategies. [7] G. Pfaff, A. Weschta, and A. Wick, ‘‘Design
proposed technique. He is a Member of the IEEE. and experimental results of a brushless
AC servo drive,’’ Conf. Rec. IEEE/IAS Annu.
Cursino Brandão Jacobina Meeting, 1982, pp. 692–697.
received his B.S. degree in electrical [8] J. Holtz, S. Stadtfeld, and H.-P. Wurm, ‘‘A
novel PWM technique minimizing the peak
Biographies engineering from the University of inverter current at steady-state and
Edison Roberto C. da Silva re- Paraiba, Campina Grande, Brazil, in transient operation,’’ Elektr. Bahnen,
vol. 81, no. 3, pp. 55–61, Mar. 1983.
ceived his B.S.E.E. degree from the 1978 and his Diplome d’Etudes Ap- [9] J. Holtz and S. Stadtfeld, ‘‘A predictive
Polytechnic School of Pernambuco, profondies and Ph.D. degrees from controller for the stator current vector of
ac machines fed from a switched voltage
Recife, Brazil, his M.S.E.E. degree the Institut National Polytechnique source,’’ in Proc. Int. Power Electronics
from the University of Rio de Janeiro, de Toulouse, France, in 1980 and Conf. (IPEC’83), 1983, pp. 1685–1675.
[10] J. Holtz and S. Stadtfeld, ‘‘A PWM inverter
Brazil, and his Dr. Eng. degree from 1983, respectively. From 1978 to drive system with on-line optimized pulse
the University Paul Sabatier, Tou- March 2002, he was with the Electri- patterns,’’ in Proc. EPE European Conf.
Power Electronics and Applications, 1985,
louse, France, in 1965, 1968, and 1972, cal Engineering Department, Univer- pp. 3.21–3.25.
respectively. From 1967 to 2002, he sity of Paraı́ba. Since April 2002, he [11] J. Holtz, P. Lammert, and W. Lotzkat, ‘‘High-
speed drive system with ultrasonic MOSFET
was with the University of Paraı́ba, has been with the Electrical Engi- PWM inverter and single-chip microproces-
and since 2002, he has been a profes- neering Department, University of sor control,’’ IEEE Trans. Ind. Applicat.,
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director of the Research Laboratory is now a professor of electrical engi- chronous pulsewidth modulation for high
performance ac machine drives operating
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Drives with the University of Campina include electrical drives, power elec- Ind. Applicat., vol. 27, pp. 574–581, May/
June 1991.
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research projects on power convert- ing PWM strategies. He is a Senior switching frequency high-power inverter
drive based on field-oriented pulsewidth
ers, fault diagnosis, and PWM strat- Member of the IEEE. modulation,’’ in Proc. EPE European Conf.
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pp. 4.67–4.77.
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UNED/CZ, Cajazeiras, Brazil. From control in conjunction with reversible tracking approach—A new method for
December 2010 to March 2011, he variable speed a.c. drives,’’ Brown Boweri minimum distortion PWM in dynamic

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Kakinada.
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