Advances in Microchip Technology Since
2000: Study Notes
I. Transistor Architecture and Density (Moore's Law
Continuation)
The period since 2000 has been characterized by dramatic innovations required to keep
transistor scaling viable, primarily shifting structures from two dimensions (2D) to three
dimensions (3D) to combat leakage current and power loss.
A. High-K/Metal Gate (HKMG) Technology (c. 2007)
•Problem: As the silicon dioxide gate material thinned below 1.2 nm, excessive
leakage current and power consumption occurred (the "power wall").
•Solution: Intel introduced HKMG (High-K Dielectric/Metal Gate). High-K materials
(like Hafnium Oxide) replaced silicon dioxide, allowing the gate to be thicker
(reducing leakage) while maintaining the required electrical properties for
performance.
B. Fin Field-Effect Transistors (FinFET) (c. 2011)
•Shift to 3D: FinFETs replaced traditional planar (2D) transistors at the 22 nm node.
•Structure: The gate wraps around three sides of the channel (the "fin"), providing
significantly improved control over the current flow.
•Impact: Dramatically reduced leakage current, enabling lower operating voltages
and far greater energy efficiency, essential for mobile computing. FinFET
technology remains the foundation for chips down to the 5 nm node.
II. Scaling and Lithography Breakthroughs
The precision required for modern chipmaking demanded radical advancements in how
circuits are printed onto silicon wafers.
A. Extreme Ultraviolet (EUV) Lithography
•Challenge: Traditional Deep Ultraviolet (DUV) lithography struggled to define
feature sizes below 14 nm due to the wavelength of light used.
•Solution: EUV (wavelength of 13.5 nm) became viable after decades of research
(mass production starting around 2019/2020).
•Impact: EUV is necessary for manufacturing the most advanced nodes (7 nm, 5
nm, and 3 nm), enabling denser chips with single-exposure patterning.
B. Interconnect Improvements
•Copper Interconnects: Adopted in the late 1990s, copper replaced aluminum for
interconnects to reduce resistance and increase signal speed.
•Low-K Dielectrics: New insulating materials (low-K dielectrics) were introduced
between copper lines to reduce parasitic capacitance, improving efficiency and
speed.
III. Specialization and Heterogeneous Computing
The post-2000 era shifted away from relying solely on clock speed increases (the "Ghz
race") toward parallel processing and specialization.
A. Multi-Core Processors
•Architecture: The transition to multiple CPU cores (dual-core, quad-core, etc.)
became standard in the mid-2000s, distributing workloads across many units rather
than speeding up a single thread. This was crucial for managing heat (the power
wall).
B. Graphics Processing Units (GPUs)
•Evolution: Originally optimized for rendering graphics, GPUs evolved into massive
parallel processors.
•Impact: GPUs are now central to Artificial Intelligence (AI) and Machine Learning
(ML) workloads (e.g., neural network training) due to their ability to handle
thousands of simultaneous calculations.
C. System-on-a-Chip (SoC)
•Integration: SoCs integrate all necessary components (CPU, GPU, memory
controller, wireless modules, DSPs) onto a single die.
•Application: SoCs are the foundation of modern mobile devices, prioritizing power
efficiency, size, and integration (e.g., Apple Silicon M-series, Qualcomm
Snapdragon).
IV. Memory and Storage Innovations
A. 3D NAND Flash Memory
•Advancement: To increase storage density without infinite planar scaling,
manufacturers began stacking NAND memory cells vertically (3D NAND).
•Benefit: This drastically increased the density and capacity of solid-state drives
(SSDs), leading to their widespread adoption over hard disk drives (HDDs).
B. High Bandwidth Memory (HBM)
•Technology: HBM uses vertical stacking of memory dies close to the processor (a
3D integration technique) to provide exceptionally high memory bandwidth.
•Application: Primarily used in demanding computing environments like high-
performance computing (HPC) and AI accelerators.