MICROPROCESSOR THEORY & APPLICATIONS

DETAILED NOTES — UNIT 1 (8085) & UNIT 3 (x86-64)

UNIT 1: INTRODUCTION TO 8085 MICROPROCESSOR

Microprocessor vs Microcomputer vs Assembly Language - Detailed

Microprocessor: A microprocessor is an integrated circuit (IC) that implements the functions of a CPU — fetch,
decode, execute — but typically requires external support chips for memory and I/O. Common tasks: arithmetic
and logical operations, control sequencing, branching, and interfacing with external devices. Microcomputer:
While a microprocessor is just the CPU IC, a microcomputer is a whole system including the CPU, memory
(RAM/ROM), input/output devices and support chips. Example: an 8085-based board with ROM (monitor), RAM
(program/data), keyboard, display, and peripheral interfaces (8255). Assembly Language: Assembly language
provides mnemonic opcodes (e.g., MOV, ADD, JMP) that map to machine instructions. Assemblers translate
these
mnemonics into binary opcodes and offer directives (.data, .text), labels, and macros. Programming in assembly
gives direct hardware control (registers, flags, I/O ports) and is used for firmware, bootloaders, and
performance-critical routines.

8085 Microprocessor Architecture - In-depth

Functional Units: 1. ALU & Accumulator (A): ALU performs arithmetic/logic; accumulator is the primary
operand/result register. 2. Registers: B,C,D,E,H,L (8-bit each) used for general purposes; pairs BC, DE, HL
used for 16-bit operations and memory addressing (HL often used as a pointer). 3. Program Counter (PC): 16-bit
pointer to next instruction; automatically increments after fetch unless modified by jump/call. 4. Stack
Pointer (SP): Points to top of stack; grows downward; PUSH decreases SP then stores value; POP reads then
increases SP. 5. Instruction Register & Decoder: Opcode fetched from memory held here while
decoding/execution
takes place. 6. Timing & Control Unit: Generates T-states and control signals like RD, WR, IO/M, S0/S1. 7.
Address/Data Bus & ALE: AD0–AD7 multiplexed for lower address and data; ALE (Address Latch Enable) used to
demultiplex the address into external latch so low-order address bits are available throughout the cycle.
Flags (detailed): - Sign (S): Reflects MSB of result (indicates negative in two's complement). - Zero (Z): 1
if result == 0. - Aux Carry (AC): Carry out from bit 3 to bit 4 (used for decimal adjustments). - Parity (P):
1 if number of 1-bits in result is even. - Carry (CY): Carry out of MSB for arithmetic ops (important for
multi-byte arithmetic). Timing Overview: - Opcode fetch machine cycle: AD0-AD7 hold low-address (T1, ALE=1),
address lines stable; subsequent T-states perform memory read to fetch opcode, often finishing by T4. - Memory
read/write cycles include placing 16-bit address on bus, activating RD/WR during T3/T4 to read/write data.
Understanding these cycles is important for interfacing external memory and peripherals and for timing-
critical hardware interactions.

8085 Based Microcomputer - Components & Interfacing (Detailed)

System Components: - ROM: Often contains monitor program/bootloader; may contain assembler macros for
convenience during development. - RAM: For runtime stack, variables, and dynamic data. - I/O Ports & Devices:
Keyboards, displays, ADC/DAC, sensors. Popular Support ICs & Roles: - 8255 PPI: Programmable Peripheral
Interface for parallel I/O ports (Port A, B, C). Mode register configures ports as input/output or bit-
set/reset. - 8253/8254 Timer: Programmable interval timer/counter for delays, event counting, waveform
generation. - 8259 PIC: Programmable Interrupt Controller to prioritize and vector multiple interrupt sources.
- 8251 USART: Serial communication interface for UART-like serial data transfer. Interfacing Tips: -
Multiplexed buses require latches and buffers: AD0-AD7 must be latched during T1 by ALE; external transceivers
(e.g., 74LS373) are used to separate address and data. - Pull-up/pull-down resistors, bus transceivers, and
proper decoupling capacitors for stable operation. - Address decoding logic (using simple gates or PALs)
needed to generate chip-select signals for ROM/RAM/peripherals.
8085 Instruction Set - Expanded Overview & Examples

Detailed categories and examples with effects: 1. Data Transfer: - MOV dst, src : Copy contents. (MOV A, B) -
MVI reg, data8 : Load immediate 8-bit into reg. (MVI A, 0x3A) - LXI rp, data16 : Load immediate 16-bit into
register pair. (LXI H, 3000H) - LDA addr / STA addr : Load/store accumulator direct to memory address. Note:
Data transfer usually does not alter flags (except for special instructions). 2. Arithmetic: - ADD r / ADI
data : Add register or immediate to accumulator; affects CY, Z, S, P, AC flags. - ADC r : Add register plus
carry (for multi-byte addition). - DAD rp : Add 16-bit register pair to HL; result stored in HL; affects CY
(16-bit carry). - INR/DCR : Increment/Decrement register; do not affect CY but update other flags. 3. Logical
& Rotate: - ANA/ORA/XRA : Bitwise logical operations on accumulator, flags updated accordingly (CY cleared for
ANA/ORA/XRA). - RLC/RRC/RAL/RAR : Rotate accumulator through carry or internally (useful for bit
manipulations). - CMP : Compare A with reg (A - reg) sets flags but does not store result. 4. Branching &
Subroutines: - Unconditional: JMP addr, PCHL (PC <- HL) - Conditional: JZ/JNZ, JC/JNC, JP/JM etc. - CALL addr
: Push PC onto stack and jump; RET pops return address. - RST n : Restart instruction — predefined vector
calls (useful for interrupts and quick subroutines). Example (multi-byte addition) and detailed walkthrough
included as exercises in the PDF.

8085 Addressing Modes - Detailed Examples & Use-cases

Immediate Addressing: - Used to initialize registers or constants quickly. Example: MVI A, 0xFF Register
Addressing: - Fastest mode; used in arithmetic and data movement. Example: MOV A, B Direct Addressing: -
Useful for fixed data locations and memory-mapped I/O. Example: STA 4050H Register Indirect: - HL pair points
to memory location; effective for traversing arrays/buffers. Example: MOV A, M ; where HL -> memory address
Implicit: - Instructions that operate on accumulator or affect control without specifying operands explicitly,
e.g., CMA, CMC, HLT. Exercises show how to convert high-level constructs (loops, arrays) into these addressing
modes for efficient code.

Sample 8085 Programs - More Examples & Explanations

Program A: Add two 16-bit numbers stored at 4000H (low) and 4002H (high) ; (A straightforward multi-byte add
using HL and DAD) LXI H, 4000H ; HL -> first number (low byte at 4000, high byte at 4001) MOV A, M ;
A = low byte of first number INX H MOV B, M ; B = high byte of first number (store temporarily in B)
LXI H, 4002H ; HL -> second number MOV C, M ; C = low byte second number INX H MOV D, M ; D =
high byte second number MOV A, C ADD B ; add low bytes (A = low2 + low1) MOV C, A ; store
low-sum temporarily in C ; handle carry into high bytes MOV A, D ADC B ; add high bytes with carry
(ADC uses CY) STA 4004H ; store result low (example simplified) ; full algorithm in exercises with
correct order and storage Program B: Block transfer (memory to memory) ; A sample using MOV M, R and
register
pointers HL and DE to copy block ; Detailed version included in PDF with loop and counter usage. Practice
exercises with step-by-step trace of registers and flags are included.

8085 Block Diagram (visual)

UNIT 3: x86 ARCHITECTURE AND PROGRAMMING (x86-64)

Overview of x86 Microprocessor Family - Expanded

Evolution & Key Features: - 8086 introduced segmented memory and 16-bit registers; program compatibility
started here. - 80286 added protected mode which allowed advanced OS features and memory protection. -
80386
moved to 32-bit architecture, enabling flat memory addressing and modern OS designs. - Pentium and successors
improved instruction-level parallelism (pipelining), superscalar execution, and introduced SIMD extensions
(MMX, SSE, AVX). - x86-64 extended the architecture to 64-bit addressing, more registers (R8-R15), and richer
calling conventions for 64-bit OSs. Understanding this history helps when reading legacy code or interfacing
with legacy software. Compatibility: - x86-64 is backward compatible with 32-bit code (compatibility mode)
and provides a long mode for 64-bit programs.

Internal Architecture of x86-64 - Expanded Details

Registers & Data Widths: - Registers are 64-bit; operations can use 8/16/32/64-bit slices (AL, AX, EAX, RAX).
- RFLAGS contains many condition and control flags used for branching and status checks. - Control registers
and Model Specific Registers (MSRs) used for system-level configuration (CR0, CR3, etc.). Calling
Conventions: - System V AMD64 (Linux, macOS): first six integer args in RDI, RSI, RDX, RCX, R8, R9; stack
used
for others; return in RAX. - Microsoft x64: RCX, RDX, R8, R9 for first four args; caller reserves shadow space
on stack; return in RAX. - Respect callee-saved vs caller-saved registers when writing assembly functions to
interoperate with C or external libraries. Privilege & Protection: - x86 supports privilege rings (Ring 0
kernel, Ring 3 user), segmentation and paging; modern OSes primarily rely on paging for memory protection and
virtual memory. Example: How function call uses stack: - Caller pushes or places arguments in registers,
issues CALL which pushes RIP (return address) to stack and jumps to function; callee may push RBP and set
RBP=RSP to create stack frame.

Addressing Modes in x86-64 - With Practical Coding Notes

Key notes for assembly programming: - Use RIP-relative addressing for position-independent code (shared
libraries). - When accessing structure fields or array elements, compute address as base + index*scale +
displacement. - Align stack to 16 bytes before calling functions that use SSE instructions or C-compiled code;
failing to align may cause crashes with some library calls. - Examples in exercises demonstrate computing
offsets and using LEA for pointer arithmetic without memory access overhead.

x86-64 Instruction Set & Practical Examples

- LEA (Load Effective Address) is extremely useful to calculate addresses and offsets without memory access:
lea rax, [rbx + rcx*4 + 8] - IMUL vs MUL: IMUL has signed variants and can produce immediate forms; MUL/IDIV
have implicit operand usage (rax/rdx pair). - Division: idiv divides combined RDX:RAX by operand; manage
sign/extension appropriately (cqo sign-extends RAX into RDX before idiv). - Conditional moves (cmovcc) help
avoid branching penalties in modern CPUs. - Use 'rep' prefix for block moves and string ops when copying large
memory regions; modern compilers produce optimized vectorized code instead.

Assembler Directives, Procedures & Macros - Examples & Tips

NASM/GAS/MASM differences in directives: - NASM: section .data / .text, global _start, extern printf - GAS
(AT&T;): uses .section, and different operand order (source, destination) depending on syntax - MASM: uses
.data, .code and PROC/ENDP for procedures Function prologue/epilogue templates and stack management
examples
included. Macro examples shown for common patterns like error checks or repeated syscall wrappers.

Sample x86-64 Programs - Annotated & Explained

Example: Add two integers (caller and callee example) ; Caller (in C) would follow System V; assembly callee
expects args in RDI and RSI global add_numbers add_numbers: push rbp mov rbp, rsp mov eax, edi
; eax = first arg add eax, esi ; add second arg pop rbp ret Step-by-step explanation: - Caller
puts args into RDI and RSI before call. - CALL saves return address to stack and jumps to add_numbers. -
add_numbers saves old frame pointer and sets up a new frame, computes sum, restores frame and returns with
result in EAX. System call example for Linux (annotated) also included in the PDF to show OS interaction.

Optimization & Best Practices - Practical Guidance

- Prefer register usage over memory for frequently used variables. - Minimize memory writes in tight loops;
use registers for accumulators and counters. - Keep stack aligned; use 'lea' for address arithmetic instead of
sequence of adds when appropriate. - Understand the ABI of target platform to avoid corrupting registers used
by caller/callee. - Use profiling tools (perf, VTune) before making assembly-level optimizations; compilers
often produce excellent code with SIMD/vectorization.

Addressing Modes - Visual Summary

x86-64 Registers Diagram (visual)

 Quick Revision Tables & Flags

Processor Key Flags Description

8085 S,Z,AC,P,CY Sign, Zero, Aux-Carry, Parity, Carry
x86-64 CF,PF,AF,ZF,SF,OF Carry, Parity, Aux Carry, Zero, Sign, Overflow

Further Exercises (Self-practice)

1. Write an 8085 program to add two 16-bit numbers stored at memory locations 4000H and 4002H, store the
16-bit result at 4004H.
2. Write an 8085 program to reverse a block of N bytes in memory (in-place).
3. Write a NASM x86-64 program that implements an integer factorial function using recursion, with C-compatible
calling convention.
4. Disassemble a simple compiled C function (use objdump -d) and map assembly to C source to understand
calling sequence and register usage.

References
R. Gaonkar – Microprocessor Architecture, Programming and Applications (8085).
Douglas V. Hall – Microprocessors and Interfacing: Programming and Hardware.
Intel and AMD manuals (for x86-64 reference and calling conventions).