RCC INSTITUTE OF INFORMATION TECHNOLOGY

CANAL SOUTH ROAD, BELIAGHATA, KOLKATA – 700015

QUESTION BANK
COMPUTER ORGANIZATION

CO No. Question Marks Difficulty

level
CO1 1. Write the Boolean expression for the Borrow output of a Full Subtractor. 2 [M]

2. How many selection lines are required for a 16-to-1 Multiplexer? 2 [E]

3. What are Generate (G) and Propagate (P) terms in a Carry Look-Ahead Adder? 2 [H]

6. State one disadvantage of Ripple Carry Adder. 2 [M]

5. What do you mean by combinational circuits? Select the combinational circuit(s) 2 [M]
among the following: Decoder, Counter, Multiplexer, Flip-flop, Subtractor.

6. How many Half Adders are required to implement a Full Adder? 2 [E]

7. What are the differences between Decoder and De-multiplexers? 3 [E]

8. Derive the Boolean expressions for Sum and Carry of a Full Adder. 3 [M]

9. Explain briefly the working of a Decoder with one real-life application. 3 [H]

10. Draw the logic diagram of a Half Adder and write its truth table. 3 [E]

11. Design and explain a Full Subtractor using two Half Subtractors and an OR gate. 4 [M]

12. Explain the working of a Priority Encoder with a suitable example. 4 [M]

13. With proper circuital explanation, describe how 4:1 multiplexer works. 4 [E]

14. Explain the operation of 1:4 Demultiplexer with a neat diagram. 4 [E]

15. Draw and explain the working principle of a 4-bit carry look ahead adder circuit. 5 [H]

16. Differentiate between Ripple Carry Adder and Carry Look Ahead Adder in terms of 5 [M]
delay. Support your answer with a neat diagram.

17. Design a 3:8 Decoder using 2:4 decoders. Show the block diagram and truth table. 5 [M]

18. Design a 4-to-1 Multiplexer using logic gates. Show how it can be used to implement 5 [H]
the function F(A,B)=A B′ + A′ B

Total Marks 60

CO Question Marks Difficulty

No. level*
 RCC INSTITUTE OF INFORMATION TECHNOLOGY
CANAL SOUTH ROAD, BELIAGHATA, KOLKATA – 700015
QUESTION BANK
COMPUTER ORGANIZATION

CO2 1. Which computer generation first used Integrated Circuits (ICs)? 2 [E]

2. What does RTL describe? 2 [H]

3. What is the function of the Instruction Register (IR)? 2 [E]

4. What is the difference between memory-reference instructions and I/O instructions? 2 [M]

5. Name the three types of Shift microoperations. 2 [M]

6. Define Instruction Cycle in brief. 2 [E]

7. Differentiate between single-bus organization and multiple-bus organization. 3 [E]

8. Explain the memory operation in each case: R1M[AR], M[AR]R2, R3M[R3]. 3 [M]

9. Consider a 32-bit machine where an instruction (SUB R4, R5) is stored at memory 3 [H]
location 300C (in hexadecimal). What will be the value of MAR, MDR, IR, and PC during
the execution of the instruction? Assume each instruction is 32 bits wide.

10. Draw and explain the block diagram of an Arithmetic Logic Shift Unit (ALSU). 3 [E]

11. Consider a 32-bit machine where an instruction SUB R3, VAR (R3 = R3 – Mem[VAR]) 4 [H]
is stored at memory location 2000 (in hexadecimal). The variable VAR is located at memory
address 3004 (hex), and contains the value 0050 (hex). The initial value of register R3 is
00A0 (hex). How many memory accesses are required to execute this instruction (assuming
instructions are stored in memory), and what will be the content of the Program Counter
(PC) after the instruction is fetched? Each instruction is 32 bits wide.

12. Write short notes on Arithmetic microoperations and Logic microoperations with 4 [E]
examples.

13. Discuss the working of a Control Unit for generating control signals. 4 [M]

14. Explain the role of interrupts in input-output operations. 4 [M]

15. Consider the instruction ADD R1, LOCA. Assume that the instruction is stored in 5 [H]
memory location 1000, the initial value of R1 is 50, LOCA is 5000 and data stored in it is
75. What will be the values stored in MAR, MDR, PC, IR, LOCA and R1 after execution?
How many memory operations are required to execute it?

16. With neat diagrams, explain Register Transfer and Bus Organization in a digital 5 [M]
computer.

17. Trace the evolution of computers from the First Generation to the Fifth Generation 5 [E]
highlighting key technologies used.

18. Draw and explain the flowchart for initial configuration of instruction cycle to show how 5 [H]
the control determines the instruction type after decoding.
Total Marks 60
 RCC INSTITUTE OF INFORMATION TECHNOLOGY
CANAL SOUTH ROAD, BELIAGHATA, KOLKATA – 700015
QUESTION BANK
COMPUTER ORGANIZATION

CO No. Question Marks Difficulty

level*
CO3
1. Write one difference between Assembly Language and Machine Language. 2 [M]

2. What is the role of an Assembler? 2 [E]

3. What is the purpose of a Stack Pointer register in CPU organization? 2 [M]

4. List two common addressing modes used in CPU instruction formats. 2 [M]

5. What does RISC stand for, and how does it differ from CISC in terms of instruction 2 [M]
set size?

6. Define Program Control instruction with an example. 2 [M]

7. Write short notes on Input-Output Programming in Assembly Language. 3 [E]

8. Explain briefly the role of general-purpose registers in CPU design. 3 [M]

9. Draw the block diagram of a stack organization in CPU and explain briefly. 3 [H]

10. State three key differences between RISC and CISC architectures. 3 [E]

11. Explain with example how an arithmetic operation is programmed in Assembly 4 [M]
Language.

12. Discuss the organization of Control Memory in a microprogrammed control unit. 4 [H]

13. Explain the concept of Instruction Formats with suitable examples. 4 [M]

14. Describe the different types of Addressing Modes used in CPU instructions. 4 [M]

15. Explain the working of an Assembler with the steps involved in converting 5 [M]
Assembly Language to Machine Code.

16. With neat diagrams, explain the design of a Microprogrammed Control Unit and 5 [H]
the role of Control Memory.

17. Discuss in detail the General Register Organization in a CPU with block diagram 5 [E]
and functions.

18. Compare RISC and CISC architectures in terms of design philosophy, performance, 5 [H]
and applications.
Total Marks 60
 RCC INSTITUTE OF INFORMATION TECHNOLOGY
CANAL SOUTH ROAD, BELIAGHATA, KOLKATA – 700015
QUESTION BANK
COMPUTER ORGANIZATION

CO No. Question Marks Difficulty

level*
CO4 1. What is the basic principle of Booth’s Multiplication Algorithm? 2 [M]

2. What is meant by floating-point normalization? 2 [H]

3. Write the IEEE 754 single precision floating-point format fields. 2 [E]

4. State one difference between fixed-point and floating-point arithmetic. 2 [M]

5. State one difference between fixed-point and floating-point arithmetic. 2 [H]

6. Write the formula for 2’s complement subtraction. 2 [E]

7. Explain briefly how subtraction is performed using 2’s complement method. 3 [E]

8. Write the steps of the Restoring Division Algorithm. 3 [M]

9. What is the need for normalization in floating-point numbers? Give an example. 3 [M]

10. Convert the decimal number 478.687 into BCD code and explain. 3 [E]

11. Explain Booth’s Multiplication Algorithm with a suitable example. 4 [H]

12. Discuss the advantages and disadvantages of floating-point arithmetic. 4 [M]

13. Show how the decimal numbers 8.25 + 3.75 are added using floating-point 4 [E]
representation.

14. Write short notes on Decimal Arithmetic Operations with one example. 4 [H]

15. Explain in detail the Binary Addition and Subtraction operations with suitable 5 [M]
examples.

16. Describe step by step the Non-Restoring Division Algorithm with an example. 5 [H]

17. With a neat block diagram, explain the working of a Decimal Arithmetic Unit. 5 [M]

18. Discuss the Floating-Point Arithmetic Operations (Addition, Subtraction, 5 [E]

Multiplication, Division) with examples.
Total Marks 60
 RCC INSTITUTE OF INFORMATION TECHNOLOGY
CANAL SOUTH ROAD, BELIAGHATA, KOLKATA – 700015
QUESTION BANK
COMPUTER ORGANIZATION

CO No. Question Marks Difficulty

level*
1. Define an I/O interface in computer organization. 2 [M]

2. What is meant by asynchronous data transfer? 2 [H]

3. Name the three modes of data transfer. 2 [E]

4. State one difference between interrupt-driven I/O and programmed I/O. 2 [M]

5. What is the role of associative memory (CAM)? 2 [H]

6. Define memory hierarchy in computer systems. 2 [E]

7. Explain briefly how DMA transfer works. 3 [M]

8. Differentiate between main memory and auxiliary memory. 3 [E]

9. State the advantages of using cache memory in a computer system. 3 [E]

10. Explain the concept of priority interrupt with an example. 3 [M]

11. Draw and explain the block diagram of a typical I/O interface unit. 4 [H]

12. Write short notes on the modes of data transfer: programmed I/O, interrupt-driven 4 [M]
I/O, and DMA.

13. Explain the working principle of associative memory with an example. 4 [E]

14. Discuss the need for virtual memory and how it is implemented. 4 [H]

15. Describe in detail the mechanism of asynchronous data transfer with a timing 5 [H]
diagram.

16. Explain the DMA controller in detail with block diagram and working. 5 [M]

17. Discuss the concept of memory hierarchy with suitable diagram and examples. 5 [M]

18. With neat diagrams, explain the organization and functions of cache memory. 5 [H]

Total Marks 60
 RCC INSTITUTE OF INFORMATION TECHNOLOGY
CANAL SOUTH ROAD, BELIAGHATA, KOLKATA – 700015
QUESTION BANK
COMPUTER ORGANIZATION

CO No. Question Marks Difficulty

level*
CO6 1. What is meant by parallel processing? 2 [E]

2. State one difference between instruction pipeline and arithmetic pipeline. 2 [M]

3. What is a pipeline hazard? 2 [M]

4. Give one advantage of RISC pipeline. 2 [M]

5. Define vector processing in one line. 2 [E]

6. What is an array processor? 2 [E]

7. Write short notes on the arithmetic pipeline with an example. 3 [E]

8. State three differences between RISC pipeline and CISC pipeline. 3 [M]

9. Explain the term vector instruction with one example. 3 [M]

10. Mention the different types of pipeline hazards. 3 [E]

11. Explain the working of an instruction pipeline with a neat diagram. 4 [H]

12. Write short notes on parallel processing and its importance. 4 [E]

13. Discuss the organization of an array processor with its functions. 4 [M]

14. Explain the concept of vector processing with an example. 4 [M]

15. Explain in detail the concept of pipelining, its stages, and applications with a neat 5 [H]
diagram.

16. Compare Instruction Pipeline, Arithmetic Pipeline, and RISC Pipeline with suitable 5 [M]
examples.

17. Describe the vector processing system architecture and its applications. 5 [M]

18. With neat diagrams, explain the organization and working of an array processor. 5 [M]

Total Marks 60