Fall Semester 2025-2026
Analog IC Design
Lab Report
Assessment 1: Exp. No. 5+ Exp. No. 6
Course Code: MAVLD504
Slot: L11+L12
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Submitted by: SIVANANDHAM K
Reg. No: 25MVD0145
Submitted to: Dr. Abdul Majeed K K
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Exp.5
Date:14/08/2025
Design and implementation of current mirror
AIM:
1) Implementation of single ended current mirror which have a current
of 100uA using gm over id method.
2) Implementation of single ended current mirror which have a current
of 500uA using gm over id method.
3) Implementation of cascode current mirror which have a constant
current of 100uA using gm over id method.
4) Implementation of cascode current mirror which have a current of
500uA using gm over id method.
Tools:
Cadence Virtuoso (for schematic, simulation, and layout)
UMC 180 nm PDK
Schematic Diagram:
Procedure:
1) In current mirror we have to find the width of the transistor so that it
has to generate the current as like as the reference current
2) For finding the width the best method is gm over id method. In this
first we have to find the gm by using the given current and overdrive
voltage.
3) Next we have to plot the gmoverid vs id/w and find the id/w for the
calculated gm/id. Then divide the Id with id/w to find the width.
4) For getting the same output current as reference current we have
size the both transistor with same width.
5) If we want the output the current as double of the reference current
we need to double the width of the output side transistor.
6) This is the procedure to design the current mirror.
Design and Analysis:
Output Graph:
A)gm/id vs id/w
B) Single ended current graph ( 100 uA)
C) Single ended current graph (500 uA)
D) Cascode current graph ( 100 uA)
E) Cascode current graph (500 uA)
Calculation:
Result and inference:
Exp.6
Date:28/08/2025
CASCODE AMPLIFIER WITH
ACTIVE LOAD
Aim:
To design a common source amplifier with active that consumes a power
of 1.06 mW , gain of 4 and unit gain frequency of 100MHz. it have load
capacitance of 5pF. Assume overdrive voltage of 200 mv.
Procedure:
1) Here we are using the gm over id method. First find the vth and by using
this vth and find the Vgs.
2) By using the vgs find the gm/id.
3) Plot the gm/id vs id/w and find the width of the pmos.
4) Next find the the gm for the nmos and we known the id so plot the
gm/id vs vgs , here we get the vgs value.
5) Plot the gm/id vs id/w and find the width of the nmos.
6) Next make the schematic and analyse the transient and ac.
Schematic Diagram:
Design and analysis:
Output Graph:
1)PMOS VTH plot
2)gm/id vs vgs(for PMOS )
3)gm/id vs id/w for PMOS
NMOS
4) gm/id vs vgs
5)gm/id vs id/w
6)Transient
7) AC analysis
Calculation:
Result and inference: