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General introduction
Introduction to the concept of bus ...
2
THE MAIN BUSES OF A COMPUTER
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The processor bus
The memory bus
.......3
The address bus and the control bus
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The data bus
THE FIRST ENTRY-EXIT BUSES :…………………………………………………………………………...4
The ISA bus (Industry Standard Architecture) ………………………………………………………………….………4
The MCA bus (Micro Channel Architecture) ... …………………………………………………………………….………5
The EISA bus (Extended Industry Standard Architecture) ...
…….5
LOCAL BUSES The E/S buses presented so far have ONE common point .........................…...6
LOCAL BUSES ……………………………………………………………………………………………………………..……
6
The local bus VESA (VESA local bus or VLB)
…………………………………………………………………………....6
The PCI (Peripheral Component Interconnect) bus ………………………………………………………………....8
The AGP bus (Accelerated Graphics Port) ...
9
Main characteristics of the AGP bus
………………..10
SUMMARY
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THE ANNEX BUSES
....11
Note: ........................................................................................................................

....11
The USB (Universal Serial Bus) ...
The IEEE 1394 bus (Firewire) …………………………………………………………………………………………………13
History…………………………………………………………………………………………………………………………...14
First generation..............................................................14
Minis and micros
Second generation
Third generation
Fourth generation
Examples of internal information buses...................................................18
Parallel
In series

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Examples of external information buses19

Parallel………………………………………………………………………………………………………………………….…19
In series
Examples of internal / external information buses..................................................20
External links……………………………………………………………………………………………………………….…
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See also…………………………………………………………………………………………………………….…
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The
references

General introduction
There is no more notable work of electronics and computer engineers than the
development of various buses. Thanks to the development of this type of architecture, we
Today we can have in our hands, mobile phones and computers.
with very large memory capacities and at the same time easy to execute with
almost instantaneous functions. A mobile device, on its printed circuit boards, displays
truly extraordinary bus designs, transforming them into real tools
we cannot miss today.
In this article, we will explain what buses are in computing and we
we will also detail the different classes that exist for each of them and their
different functions. We will also talk about the evolution of these buses and how it reflects
in their different generations.

Introduction to the notion of bus:

In computer science, a bus refers to a set of physical connections (cables, tracks)
printed circuits, etc.) that can be shared by several hardware elements
in order to communicate.

Buses aim to reduce the number of 'lanes' needed for communication.

different components, by sharing communications over a single data path.
This is the reason why the metaphor of 'data highway' is sometimes used.
The computer bus is the system by which the different components of a computer
transfer bring the data they share with each other.
This is achieved through a printed circuit on different boards and made up of cables or
tracks, of resistances (which are responsible for the introduction of electrical resistance on

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some parts of the circuit) and capacitors (responsible for functioning as

energy storage they need. these circuits).
There are two types of data transfer in computer architecture. The first is
the transfer series that can transport a little at a time. The other type of transfer is the call
parallel that can extend up to 8 bits at a time.
The canals are currently used to transport several boats at the same time.
most used being the series type. We will develop this topic further in the
last part of this article.
Thanks to the existence of these computer buses, we can communicate the
microprocessor with memory; as well as input ports, such as the keyboard, the mouse and
the microphone; and the output ports such as the monitor, the printer, or the speakers
with the different parts of the operating system.
The data bus is the system through which the different components of a computer
transfer and attach the data they share with each other.

THE MAIN BUSES OF A COMPUTER:

The bus constitutes the communication channel between the central processor, the
additional chips associated with it (usually grouped under the name
chipset) and the external cache memory. The role of this bus is to transfer signals from and
towards the processor at maximum speed, that is why it is much faster than
the other buses of the system.

The memory bus ensures the transfer of data between the processor and memory.
main (RAM). The transfer rate of information that passes through the memory bus is
well below that of the information conveyed by the processor bus, which requires the
setting up a memory controller tasked with verifying the interface between the processor bus
the fastest and the slowest RAM. Note that the interface of the main memory bus is
always identical to that of the bus processor: thus, on a system equipped with a processor
64 bits (Pentium type), the memory bus is also 64 bits; this number designates the size
of a memory block. If you are using a 64-bit Pentium processor, each memory block
Added to the RAM during any operation must necessarily be 64 bits. Hence some
constraints when installing RAM modules in your computer in
function of their characteristics: SIMM 32 bits, DIMM 64 bits, etc.).
The address bus and the control bus are in fact subsets of the buses.
processor and bus memory. The latter are constructed from different specialized lines,
some of them are responsible for conveying addresses, others for data or
commands; the address lines constitute the address bus, the command lines
determines the command bus (the processor bus of a Pentium is for example formed
32 address lines, 64 data lines, and a few control lines:

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The address bus indicates the memory address or the address of another bus used during a
data transfer within the computer. The width of the address bus conditions
also the maximum amount of RAM that the processor can address (an address bus
a width of 16 bits thus allows the processor to address 2^16 = 65536 addresses in
memory).
The command bus carries all the signals used to synchronize the different
activities that take place in the functional units of the computer: clock signals,
read/write signals, interrupt signals, etc.
The data bus (or input/output bus) ensures the transmission of data to be processed.
among the different elements of the computer; in this regard, it is just like the address buses
and commands a subset of the processor and memory buses (remember the 64
data lines of the Pentium processor bus). The I/O bus allows not only
components on the motherboard to communicate data with each other, but
also to add additional devices using extension cards; to this
In effect, the I/O bus is characterized by a number of connectors (or slots).
The extension of a computer's capacity through the addition of peripherals is crucial.
because basic systems are unable to meet all user expectations:
essential components can then be attached to the I/O bus connectors.
such as graphics cards, sound cards, network interface cards or adapters
SCSI.

Location of the VLB bus in a computer system

THE FIRST INOUT BUSES:

The bus is a fundamental element of a computer's architecture. If you own a
configuration equipped with an ultra-fast processor and very high-performance peripherals but
from a slow-turning bus system, your components will not be able to give their best
their performances. This explains that since the first PC, many I/O buses have seen the

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day successively, with a simple reason: the growing need for performance always
most important computers, related to the emergence of faster processors, software
more demanding and growing multimedia needs.

The ISA bus (Industry Standard Architecture):

It is the original 8-bit bus that equipped the first IBM PC in 1981; it was then
extended to 16 bits for the IBM PC/AT of 1984. The very first version of the ISA bus
operated at 4.77 MHz, but the extension to 16 bits was followed by a rise in the
operating frequency of the ISA bus at 6 then 8 MHz. Subsequently, the industry in its
The ensemble chose a standard speed of 8.33 MHz for all versions of the ISA bus (8 and
16 bits).
The ISA bus has long been the foundation of the personal microcomputer and
corresponds to the first architecture used in the vast majority of PC systems
until the end of the 1990s, when the ISA bus was gradually replaced in
standard by the PCI bus. In 1993, Intel and Microsoft undertook to modify the
ISA bus specifications to lead to the new ISA Plug & Play standard: with this
version, the operating system is able to automatically configure the
newly connected devices without the user having to manually adjust them
settings using jumpers or switches on the device
concerned.
It may seem strange that such an old system has been used for more than 20 years.
but this can be explained by factors of reliability, availability, and bus compatibility
ISA. While it is undeniable that it is slow (8 MB/s max.), the ISA bus is still faster than good.
name of modern peripherals such as sound cards or modems; on the other hand, it
today completely obsolete when it comes to connecting devices to
high-speed such as 2D/3D graphic adapters or hard drives.

16-bit ISA bus extension connector

The MCA bus (Micro Channel Architecture):

The advent of 32-bit processors (with Intel's 386 in 1985) rendered the ISA bus unfit.
to manage the power of this new generation of chips: when a 386DX was capable
to transfer 32 bits of data simultaneously, the ISA bus considerably slowed down the
operations because limited to 16 bits.

That's why in 1987, IBM tried to impose a new standard: the MCA bus, superior.
All points on the ISA bus. The MCA bus is a 32-bit bus, operating at 10 MHz, which offers
great ease of configuring connected devices, without jumpers or micro-

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switches. Even better, it also supports bus mastering, meaning the acquisition of
bus control by any device connected to it for transferring
information to another component, without requiring the intervention of the central processor,
which relieves him of so much work and allows him the leisure to take care of other things.
As a counterpoint, the MCA bus is perfectly incompatible with the ISA standard.
that the numerous expansion cards designed for the ISA bus do not work on the
MCA systems. Finally, IBM required royalties from users of the new
model, which led to the rejection of the MCA bus by the entire industry and the
Development of the concurrent EISA bus.
The EISA bus (Extended Industry Standard Architecture):
It appeared in September 1988 as a response to the introduction of the MCA bus by IBM.
the way he planned to use it.
At the origin of the EISA bus, there are nine competing manufacturers of IBM: AST Research,
Compaq, Epson, Hewlett-Packard, NEC, Olivet, Tandy, WYSE and Zenith Data System. The bus
EISA is a 32-bit bus like IBM's MCA, evolving at 8.33 MHz and compatible with
the ISA standard: it adds 90 new connections to a classic ISA connector without
these conditions, the ISA cards can still be used.
with EISA extension connectors. This new format also uses a system
software similar to that of the MCA bus to automate the configuration of the cards
of extension without resorting to jockeys or switches. New development, the bus
EISA integrates for the first time the possibility of sharing an IRQ by several
devices.

LOCAL BUSES The input/output buses presented so far have a common point:
They are relatively slow. This restricted speed is a legacy of the early PCs in
which bus processor and I/O bus shared the same clock frequency of 8 MHz.
The first problems actually appeared in the early 1990s with the
success of graphical interfaces such as Windows: these require processing
of such a large number of video data that the I/O bus has become the bottleneck
the most important of information systems
What is the point of having a processor running at 66 MHz if the transfer rate of...
data on the I/O bus cannot exceed 8 MHz? The solution to this dilemma has been found in
moving some bus extension connectors to a place where they could
benefit from the high speed of the processor bus, somewhat like cache memory
external. This architecture is called a local bus.

LOCAL BUSES:
The I/O buses presented so far have a common point:
They are relatively slow. This restricted speed is an inheritance from the early PCs.
which processor buses and I/O buses shared the same clock frequency of 8 MHz.

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The first problems actually appeared in the early 1990s with the
success of graphical interfaces such as Windows: these require processing
of such a large amount of video data that the I/O bus has become the bottleneck
the most important of information systems
- What is the point of having a microprocessor clocked at 66MHz if the transfer rate...
data on the I/O bus cannot exceed 8 MHz?
The solution to this dilemma was found by moving some extension connectors from the
I/O bus to a location where they could benefit from the high speed of the processor bus,
a little like external cache memory. This architecture is named
local bus

The local VESA bus (VESA local bus or VLB):

To improve the video performance of computer systems, the VESA local bus has been
developed in August 1992 by the VESA (Video Electronics Standards Association) committee, a
non-profit association created by NEC. The basic idea of the VL-Bus was to
directly connect the processor pins in vogue at the time (the Intel 486) and
insert into an extension connector support; the result consists of an architecture
cheap, with no additional chipset or control chip required.

Location of the VLB bus in a computer system

The VESA bus is a 32-bit bus that can theoretically operate at a maximum frequency of
66 MHz. In reality, the electrical characteristics of its connector limit the frequency.
execution at 40 or 50 MHz and, in practice, it turned out that the use of a VL-Bus at a
speeds above 33 MHz are likely to cause numerous problems. By
consequently, 33 MHz has become the maximum acceptable speed for this bus. Furthermore, the
the structure of the VL-Bustel as it was originally designed makes it inseparable from the bus
486 processor. Although the VL-Bus can be adapted to other processors (y

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including the 386 or the Pentium, compatibility remains difficult to achieve and it is linked
with a 486 that the VL-Bus offers the best performance.
Physically, the VESA bus is an extension of the slots used for the base system.
the computer: on a configuration based on the ISA bus, for example, the VL-Bus is found
in the form of an extension of the existing 16-bit ISA connectors.

VLB bus extension connector

The PCI (Peripheral Component Interconnect) bus:

It was developed by Intel and some other leaders in the computer industry.
beginning of the year 1992. In reality, the PCI bus is not a true local bus: it occupies a
intermediate level situated between the fundamental local buses (processor bus and bus
memory) and the standard I/O bus; the PCI bus adds a sort of new layer.
to the classic configuration of the system, as indicated in the following diagram:

Conceptual diagram of the PCI bus

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The width of the PCI bus is fixed at 32 bits and its operating frequency at 33 MHz.
even if the designation for a 64-bit PCI bus at 66 MHz already exists (these new
Specifications will certainly be introduced by default when justified by the cost of
modifications of the PCI bus to increase its bandwidth). Compared to the VESA bus, the
The PCI bus has the following characteristic:
Like the VL-Bus, the PCI bus supports bus mastering. Furthermore, while the
The frequency of the VL-Bus is intrinsically linked to that of the processor, and that of the PCI bus is...
independent.
*When the VL-Bus is active, it supplants the other local buses and forces the processor to
stop its activities; this is not the case for the PCI bus which operates in parallel with the bus
processor: when the processor sends data to a device,
these are stored in the PCI bus controller's buffer memory; the processor
can then be dedicated to other activities while the controller takes care of routing
the information on the concerned device. Conversely, the devices can
continue to transmit data via the PCI bus even when the processor is active.
One of the major characteristics of the PCI bus is that it constitutes the model of the
Intel Plug & Play (PnP) specifications: this means that expansion cards in the format
PCI do not have riders or switches and they are automatic.
configured via software. Since 1995, most PC systems include a PnP BIOS
which automatically ensures the configuration of devices compliant with this standard.

The PCI bus can operate with a voltage of 3.3V in laptops

(against 5V for the VESA bus), which greatly favors energy savings
in this type of computer.
Note that unlike all the bus formats described so far, the PCI bus is not a
interface exclusively reserved for PCs: it is also found as a standard in some
Macintosh models (iMac, G3, G4, etc.). The PCI expansion connectors are easily
recognizable by their reduced size and their standardized white color:

PCI bus extension connector

The AGP (Accelerated Graphics Port) bus:

Similarly, the ISA bus ultimately proved to be unsuitable for handling large data flows.
related to the implementation of graphical interfaces, the PCI bus has reached its limits today
since the emergence of a domain of particularly resource-hungry applications

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system: 3D. The AGP was therefore developed and introduced by Intel starting in 1997 in the
but to address the deficiencies of the PCI bus regarding video.
This leads to the following first observation: the AGP is not a 'bus' in the true sense of the term.
term, since a bus must be able to support multiple I/O peripherals, which
this is not the case for the AGP which only supports one; in reality, it is a 'port', that is to say
to say an independent and direct connection between the processor, the RAM, and the card
graph of the computer system.

Conceptual diagram of the AGP bus

Main characteristics of the AGP bus:

The AGP concept is based on the 64-bit PCI specifications: it has a width of 32
bits work at a maximum frequency of 66 MHz, which gives it a bandwidth
theoretical bandwidth double that of the PCI bus at 264 MB/s. Furthermore, AGP has a
mode '2X' which allows it to double this bandwidth again to reach 528 MB/s
(1056 Mo/s with AGP 4X) - Explanation: at each cycle, the clock signal of
synchronization transit from value 0 (absence of signal) to value 1 (presence of
signal), which corresponds to the leading edge of the signal, before returning from value 1 to the
value 0, which corresponds to the falling edge of the signal. While the PCI bus is not capable
to convey information only during the rising phase of the synchronization signal,
The AGP can do it on both fronts.
The PCI bus shares its bandwidth of 132 MB/s with the connected peripherals.
attached, which slows down data exchanges when a graphics adapter
is currently dominating the majority of the bus resources. The arrival of the AGP allows for a
part of the video subsystem to have a dedicated, high-performance circuit, and on the other hand
offloads the PCI bus from the intense traffic related to display.

The AGP also has the ability to directly access the central memory of the system.
(without intervention from the processor, this is therefore a DMA - Direct Memory Access)
to store a surplus of data when the graphics card memory is
saturated. Even better, the AGP benefits from DIME (Direct Memory Execution) technology,
which allows performing texture calculations directly in main memory before
to load them into the video memory of the card. However, note that the DIME solution
is not faster than the execution of operations in the video memory of the adapter
Graph: first of all because the special bus that connects the video memory to the processor
The graphics on the map are much faster than the AGP; then because the central RAM of
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The computer is generally 4 to 6 times slower than video memory, which slows it down accordingly.
transformations of textures that are performed. The DIME technology is therefore primarily
interesting for configurations with a graphics card that has little
video memory.
The AGP works in bus mastering mode, and another interesting feature is that it can
transmit several requests in succession using the pipelining technique. While the
PCI protocol requires that each request be followed by an acknowledgment of receipt for
to be able to send the following request, the AGP is not obliged to wait for a response from the
processor to send multiple requests simultaneously.
To complete this non-exhaustive list of the capabilities of the AGP, it should be noted that it
incorporates the SBS technology (Side Band Signal Ling, or Side Signaling Band), which
refers to the use of a set of dedicated circuits that add to the AGP: in addition to the 32 bits
In the bus, an additional 8-bit sideband allows the AGP card to send
new requests receiving the data emitted by the motherboard following the requests
previously issued. The SBS also carries a synchronization reference that makes
match the operating modes (1X, 2X, 4X, etc.) of the AGP with those of the card
graphic.

AGP bus extension connector

SUMMARY:

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THE ADDITIONAL BUSES:

The PC Card bus (formerly PCMCIA): this interface was designed in 1989 by a consortium of more
of 300 computer manufacturers: the Personal Computer Memory Card International
Association (PCMCIA), in order to equip portable computers with the same capabilities
of extension than office machines. The PCMCIA has undertaken to standardize the cards
of portable machines extension in credit card format, with the dimensions
following: 54 x 85 mm for a 68-pin connector; three standard thicknesses have
also adopted, corresponding to as many types of cards:

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Note:
There is a type IV card with a thickness of 15.5 mm, but it is not recognized by the
PCMCIA consortium.
Several modifications of the PC Card standard emerged between 1990 and 1994, which is
stayed during this period a relatively slow 16-bit interface, at the bandwidth
limited bandwidth (2 MB/s), unable to support bus mastering and the 26 lines of
address bus allowed to manage only 64 MB of RAM at most; the main
The advantage of the PC Card bus is primarily the small size of the connectors and cards.
of extension as well as the ability to hot plug and unplug devices.
In 1995, a new version of the PC Card standard was introduced, under the name Card
Bus: this is a 32-bit interface that is much more efficient, operating at 33 MHz.
The supporting bus made me assert that the voltage has been reduced to 3.3V (instead of 5V).

The USB (Universal Serial Bus):

The USB specification was published in 1996 by a consortium including Compaq, Digital,
IBM, Intel, Microsoft, NEC, and Noether Telecom. The USB bus is essentially a
interface theoretically allowing to connect up to 127 devices to the computer
in series, with a transfer rate of 12 Mbps (about 1.5 MB/s). Among the
Advantages of USB include the automatic identification of devices by the system.
possibility to plug and unplug them hot, without having to cut the power of
the computer previously. The serial connection of peripherals also allows
to save connection ports, which is not the case with serial interfaces and
conventional parallels that require each peripheral to be associated with a
individualized connector.
With a bandwidth of 12 Mbits/s shared among the connected devices, only
components that do not require high data transfer rates are currently affected
via USB: keyboards, mice, printers, digital cameras, game controllers, etc.
A USB 2.0 version, however, was released in 2001, which allows for multiplication of
USB performance by 40, ensuring compatibility with the USB 1.1 standard
current.
Since 1996, all computers have been standardly equipped with USB ports, and this standard is
supported since the OSR 2.1 version of Windows 95.

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Male USB connector

The IEEE 1394 bus (Firewire):

The IEEE 1394 interface was developed by Apple in 1995 in collaboration with
the American organization IEEE (Institute of Electrical & Electronics Engineers Inc.). The other name
under which this bus is known - Firewire - is the registered trade name by Apple
for
The IEEE 1394 (Sony has also registered the name '[Link]' for this same bus). The IEEE 1394
designates a high-speed digital bus standard (up to 400 Mbits/s), allowing to
connect up to 63 devices in a daisy chain to the computer. Like the USB to which it
resembles a lot, IEEE 1394 supports Plug & Play and Hot-Plug (plugging in
hot from the devices). Its significant bandwidth is especially
the IEEE 1394 to devices that generate significant data transfers with
the computer, particularly the multimedia components: cameras and digital scopes,
audio syntheses, high-speed disc players, scanners and imaging printers
professional, etc.
Furthermore, it is largely conceivable to replace all serial interfaces (RS-
232), parallel (Centro nix) and SCSI through a unified standard of type IEEE 1394.

Connectors IEEE 1394 6-pin set 4-pins

History

First generation

The first computer buses were bundles of cables that connected the
memory and the peripherals of the computer. Anecdotally referred to as the

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digital trunk
omnibus. Almost always, there was a bus for memory and one or more buses
separated for the peripherals. These were accessible by instructions
separate, with completely different schedules and protocols.

One of the first complications was the use of interrupts. The early
computer programs were performing I/O while waiting in a loop for the
The device should be ready. It was a waste of time for the programs that had
other tasks to accomplish. Furthermore, if the program attempted to perform these others
tasks, the verification of the program can take too much time, resulting in a
data loss. The engineers have therefore ensured that the devices
interrupt the CPU. Interrupts had to be prioritized, as the processor
can only execute code for one device at a time, and some
Some devices are more urgent than others.

High-end systems introduced the idea of channel controllers, which were

essentially small computers dedicated to managing input and output
of a given bus. IBM introduced them on the IBM 709 in 1958, and they became a
common characteristic of their platforms. Other high suppliers of
performance such as Control Data Corporation have implemented designs
similar. In general, channel controllers would do their best to execute
all internal bus operations, by moving the data when the
processor was known to be busy elsewhere if possible, and only using
interruptions when necessary. This considerably reduced the workload.
of the processor and improved the overall performance of the system.

To ensure modularity, memory and I/O buses can be combined into one.
unified system bus. In [7]this case, a single mechanical and electrical system can be
used to connect together several of the system's components, or in
in some cases, all.

Later, computer programs began to share memory.

shared among several processors. Access to this memory bus was also to be
prioritized. The simple way to prioritize interruptions or access to the bus was to
use a daisy chain connection. In this case, the signals will circulate
naturally through the bus in a physical or logical order, thus eliminating the
need for complex planning.

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Unique bus system

Minis and micros

Digital Equipment Corporation (DEC) has further reduced the cost of mini-computers
mass-produced and mapped the devices in the memory bus, so that the
input and output devices seemed to be memory locations.
This was implemented in the PDP-11 Unibus around 1969. [8]

The first microcomputer bus systems were essentially a background.

of a passive basket connected directly or via buffer amplifiers to the pins
the processor. Memory and other peripherals would be added to the bus in
using the same address and the same data pins as the processor itself
even used, connected in parallel. Communication was controlled by the CPU, which
read and wrote the device data as if it were blocks of
memory, using the same instructions, all timed by a clock
central controlling the CPU speed. However, the peripherals have interrupted the
CPU by signaling on separate CPU pins.

For example, a disk drive controller would signal to the CPU that new
the data was ready to be read, how much the CPU would move the data in
reading "the memory location" that corresponded to the disk drive. Almost all
the first microcomputers were built this way, starting with
the S-100 bus of the Alaire 8800 computer system.

In some cases, particularly in the IBM PC, although a physical architecture

similar could be used, the access instructions for the devices (inandout)
and to the memory (moveand others) have not been standardized at all and generate
always distinct CPU signals, which could be used to implement a
separate E / S bus.

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These simple bus systems had a serious drawback when they were
used for general-purpose computers. All the bus equipment had to communicate.
at the same speed, as it shared a single clock.

The increase in processor speed becomes more difficult, as the speed of all
the devices must also increase. When it is not practical or
It is economic to have all the peripherals as fast as the CPU, the CPU must either
entered a state of waiting, either working temporarily at a clock frequency
slower, to communicate with the other peripherals of the computer.

Although acceptable in embedded systems, this problem has not been tolerated.
for a long time in versatile and user-expandable computers.

Such bus systems are also difficult to configure when they are
built from standard commercial equipment.

As a general rule, each added expansion card requires many jumpers.

in order to define memory addresses, I/O addresses, interrupt priorities and
the interrupt numbers.

Second generation

Second-generation bus systems like NuBus have solved some of

these problems. They generally separated the computer into two "worlds", the
processor and memory on one side, and various peripherals on the other.
A bus controller agreed that the data from the CPU side could be moved.
towards the side of the devices, thus shifting the load of the protocol to
communication from the CPU itself. This has allowed the CPU and memory
to evolve separately from the device bus, or simply the 'bus'. The
devices on the bus can communicate without processor intervention. This has
led to much better performance "in the real world," but also
I demanded that the maps be much more complex. These buses also often
resolve speed issues by being "larger" in terms of path size
data, passing from 8-bit parallel bus in the first generation to 16 or 32 bits
in the second, as well as by adding software configuration. (now
standardized in Plug-n-play) to replace or substitute the jumpers.

However, these new systems shared a quality with their cousins.

previous, in that everyone on the bus had to speak at the same speed.
Now that the processor was isolated and could increase speed, the
processors and memory have continued to increase in speed much more
quickly than the buses they were talking about. The result was that the speeds of
buses were now much slower than what a modern system had
need, and the machines were deprived of data. A particularly example

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the current of this problem is that video cards quickly surpass even the
the latest bus systems like PCI, and computers began to
include AGP just to drive the video card. In 2004, AGP was again outdated
by high-end video cards and other peripherals and was replaced by the
new PCI Express bus.

More and more external devices have also started to use their own
bus systems. When disk drives were first introduced
Sometimes, they were added to the machine with a card connected to the bus, which
explain why computers have so many slots on the bus. But in
The 1980s and 1990s saw the introduction of new systems such as SCSI and IDE.
to meet this need, leaving most of the locations of the systems
modern lives. Today, there are probably about five different buses in the
typical machine, supporting various devices.

Third generation

Third generation buses have been appearing on the market since 2001.
environment, notably Hyper Transport and Infini Band. They also tend to be
very flexible in terms of physical connections, allowing them to be used in
the time as internal buses and to connect different machines to each other. This
can lead to complex issues when you try to respond to
different requests, a large part of the work on these systems concerns the
software design, as opposed to the hardware itself. In general, these buses of
third generation tend to resemble more a network than to the
original concept of a bus, with a higher protocol overhead than
first systems, while allowing multiple devices to use
the bus at the same time.

Buses such as Wishbone have been developed by the material movement

open source in order to further remove legal constraints and
computer design patent.

Fourth generation

The Compute Express Link (CXL) is an open interconnection standard for the
high speed CPU-to-device and central unit to memory, intended to accelerate the
next generation of high-performance data centers.

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Examples of internal computer buses

Parallel

ASUS Media Bus owner, used on certain ASUS Socket 7 motherboards

Computer Automated Measurement and Control (CAMAC) for systems
of instrumentation
Extended ISA or EISA
Industry Standard Architecture or ISA
Low pin count or LPC
MBus
MicroChannel or MCA
Multibus for industrial systems
NuBus or IEEE 1196
Local bus OPTi used on the first Intel 80486 motherboards.
Conventional PCI
Parallel ATA (also known as Advanced Technology Attachment, ATA,
PATA, IDE, EIDE, ATAPI, etc.), hard disk drive, optical disc drive,
bus of tape drive peripheral connection
Bus S-100 or IEEE 696, used in the Altair and similar microcomputers
SBus or IEEE 1496
Bus SS-50
Runway bus, a CPU-exclusive bus at the front developed by Hewlett-Packard
for use by its PA-RISC microprocessor family
GSC / HSC, a proprietary peripheral bus developed by Hewlett-Packard
to be used by its PA-RISC microprocessor family
Precision Bus, a proprietary bus developed by Hewlett-Packard for a
use by his family of HP3000 computers
STEbus
Bus STD (for STD-80 [8 bits] and STD32 [16/32 bits]), FAQ
Unibus, a proprietary bus developed by Digital Equipment Corporation
for their PDP-11 and the first VAX computers.
Q-Bus, a proprietary bus developed by Digital Equipment Corporation for
their PDPs and later the VAX computers.
Local bus VESA or VLB bus or VL
VMEbus, the VERSAmodule Eurocard bus
PC / 104
PC / 104-Plus
PCI-104
PCI / 104-Express
PCI / 104
Zorro II and Zorro III, used in Amiga computer systems

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In series

1 thread
HyperTransport
I²C
PCI Express or PCIe
Serial ATA (SATA), hard disk drive, SSD drive, disc drive
optical, device connection bus for tape drive
Bus SPI (Serial Peripheral Interface)
UNI / O
SMBus

Examples of external computer buses

Parallel

High-Performance Parallel Interface HIPPI

IEEE-488 (also known as GPIB, general-purpose interface bus, and HPIB, bus
Hewlett-Packard instrumentation
PC card, formerly known as PCMCIA, widely used in
laptops and other portable devices, but fades with
the introduction of USB and integrated network and modem connections

In series

Camera link
Bus CAN ("Controller Area Network")
eSATA
Express Card
Field bus
Interface IEEE 1394 (FireWire)
RS-232
RS-485
Thunderclap
USB

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Examples of internal/external computer buses

Future bus
Infini Band
External PCI Express cabling
Quick Ring
Evolutive Consistent Interface (ECI)
Small Computer System Interface (SCSI), device connection bus
for hard disk drive and tape drive
Serial Attached SCSI (SAS) and other serial SCSI buses
Thunderclap
Yap bus, a proprietary bus developed for the Pixar Image Computer

External links

Computer equipment bus in Curlie

Bus wiring and locations of computer equipment with brief descriptions
descriptions

See also

Electronic portal
Address decoder
Bus conflict
Bus error
Mastery of the bus
Communication endpoint
Control bus
Crossbar switch
Memory address
Memory bus (data bus)
Frontal bus (FSB)
External Bus Interface (EBI)
Harvard architecture
Master / slave (technology)
Network on chip
List of device bandwidths
List of network buses
Software bus

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References

1. What every engineer must know about

data communications. CRC Press. p. 27. ISBN 9780824775667. Archived from
the original on 01/17/2018. The internal computer bus is a diagram of
parallel transmission; in the computer ...
2. Hollingdale, Stuart H. (19/09/1958). "Session 14. Treatment of
data. Applications of computers. Atlas - Application of Computers,
University of Nottingham, September 15-19, 1958 (conference document).
Archived from the original on 2020-05-25. Retrieved on 25/05/2020.
3. "Definition of bus from the PC Magazine encyclopedia". [Link]. 2014-
05-29. Archived from the original on 2015-02-07. Retrieved 21/06/2014.
4. ^ Avionic Systems Normalization Committee, Standards Guide
digital interface for military avionic applications,
ASSC / 110/6/2, number 2, September 2003
5. by Don Lancaster. 'Typewriter Cookbook TV'.
(Typewriter TV). Section 'Bus Organization'. p. 82.
6. See the first Australian computer CSIRAC
7. The essentials of organization and
The computer architecture (2nd ed.). Jones and Bartlett Learning. pp. 33, 179–181.
ISBN 978-0-7637-3769-6. Archived from the original on 01/17/2018.
8. ^C. Gordon Bell; R. Cady; H. McFarland; B. Delagi; J. O'Laughlin; R.
Noonan; W. Wulf (1970). A new architecture for mini-computers -
The DEC PDP-11 (PDF). Joint Spring Computer Conference. 657–
675. Archived (PDF) of the original on 27/11/2011.
9. 28. The
"A Megahertz Bus". The advanced user guide of the BBC microcomputer.
Cambridge, United Kingdom: Cambridge Microcomputer Centre. 442–443.
ISBN 0-946827-00-1. Archived from the original (zipped PDF) on 2006-01-14. Retrieved
March 28, 2008
10. ABOUT CXL. Compute Express Link. Retrieved on 09/08/2019.
11. Odds & Ends: Opti Local Bus, Aria sound cards. 07/21/2015. Retrieved
February 19, 2021.

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