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Understanding Computer Registers and RTL

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8 views9 pages

Understanding Computer Registers and RTL

Copyright
© All Rights Reserved
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COMPUTER ORGANISTAION AND

ARCHITECTURE
What is Register in Digital Electronics ?
A register is a tiny, fast storage memory within the central
processing unit (CPU) or the arithmetic logic unit (ALU) of a
computer. It plays a vital role in holding the data required by the
CPU for immediate processing and is made up of flip-flops. It
usually holds a limited amount of data ranging from 8 to 64 bits,
depending on the processor architecture.
Types of Registers:
Accumulator Register - It acts as a central point for arithmetic
and logical operations within the CPU. It fetches data from
memory and stores intermediate results during calculations.
Arithmetic operations such as addition, subtraction,
multiplication, and division often take place in the accumulator.
The final result may be stored in the accumulator or transferred to
other registers or memory locations.
Program Counter (PC) Register - It is a special register that
keeps track of the memory address of the next instruction to be
fetched and executed. As the CPU executes each instruction in
sequence the program counter is updated to indicate the next
instruction's address in memory. This process continues until the
program's execution is complete.
General-Purpose Registers – These registers are versatile
because they can hold data and memory addresses. They are
used for various calculations and data manipulation tasks during
program execution. General-purpose registers are essential for
performing arithmetic and logical operations on data stored in the
CPU.
Instruction Register (IR) - It holds the currently fetched
instruction from memory. It allows the CPU to decode and execute
the instruction based on its opcode and operands.
Memory Address Register (MAR) -It stores the memory
address of data or instructions to be accessed or written in
memory. It plays a crucial role in memory operations by indicating
the location of the data or instruction the CPU needs to access.
Shift Register:-
Flip flops can be used to store a single bit of binary data (1 or 0).
However, in order to store multiple bits of data, we need multiple
flip-flops. N flip flops are to be connected in order to store n bits of
data. It is a group of flip-flops connected in series used to store
multiple bits of data. The information stored within these registers
can be transferred with the help of shift registers. Shift Register is
a group of flip flops used to store multiple bits of data. The bits
stored in such registers can be made to move within the registers
and in/out of the registers by applying clock pulses. An n-bit shift
register can be formed by connecting n flip-flops where each flip-
flop stores a single bit of data. The registers which will shift the
bits to the left are called “Shift left registers”. The registers which
will shift the bits to the right are called “Shift right registers”.
Types of Shift Registers:-
Serial-In Serial-Out Shift Register (SISO): The shift register,
which allows serial input (one bit after the other through a single
data line) and produces a serial output is known as a Serial-In
Serial-Out shift register. Since there is only one output, the data
leaves the shift register one bit at a time in a serial pattern, thus
the name Serial-In Serial-Out Shift Register. The logic circuit given
below shows a serial-in serial-out shift register. The circuit
consists of four D flip-flops which are connected in a serial
manner. All these flip-flops are synchronous with each other since
the same clock signal is applied to each flip-flop.
Serial-In Parallel-Out Shift Register (SIPO): The shift
register, which allows serial input (one bit after the other through
a single data line) and produces a parallel output is known as the
Serial-In Parallel-Out shift register. The logic circuit given below
shows a serial-in-parallel-out shift register. The circuit consists of
four D flip-flops which are connected. The clear (CLR) signal is
connected in addition to the clock signal to all 4 flip flops in order
to RESET them. The output of the first flip-flop is connected to the
input of the next flip flop and so on. All these flip-flops are

synchronous with each other since the same clock signal is


applied to each flip-flop.
Parallel-In Serial-Out Shift Register (PISO) : The shift
register, which allows parallel input (data is given separately to
each flip flop and in a simultaneous manner) and produces a
serial output is known as a Parallel-In Serial-Out shift register. The
logic circuit given below shows a parallel-in-serial-out shift
register. The circuit consists of four D flip-flops which are
connected. The clock input is directly connected to all the flip-
flops but the input data is connected individually to each flip-flop
through a multiplexer at the input of every flip-flop. The output of
the previous flip-flop and parallel data input are connected to the
input of the MUX and the output of MUX is connected to the next
flip-flop. All these flip-flops are synchronous with each other since
the same clock signal is applied to each flip-flop.

Parallel-In Parallel-Out Shift Register (PIPO) : The shift


register, which allows parallel input (data is given separately to
each flip flop and in a simultaneous manner) and also produces a
parallel output is known as Parallel-In parallel-Out shift register.
The logic circuit given below shows a parallel-in-parallel-out shift
register. The circuit consists of four D flip-flops which are
connected. The clear (CLR) signal and clock signals are connected
to all 4 flip-flops. In this type of register, there are no
interconnections between the individual flip-flops since no serial
shifting of the data is required. Data is given as input separately
for each flip flop and in the same way, output is also collected
individually from each flip flop.

What is Register Transfer Language?


It is a low-level language that is used to describe the functioning
of a digital circuit and, more specifically, the transfer of
information between registers. It provides how data moves from
one register to the other and how data is processed within the
digital system. In symbolic notation, it is used to describe the
micro-operations transfer among registers. It is a kind of
intermediate representation (IR) that is very close to assembly
language, such as that which is used in a compiler.
Replacement Operator:-
In the statement, R2 <- R1, <- acts as a replacement operator.
This statement defines the transfer of content of register R1 into
register R2.
There are various methods of RTL
1. General way of representing a register is by the name of the
register enclosed in a rectangular box as shown in (a).
2. Register is numbered in a
sequence of 0 to (n-1) as
shown in (b).
3. The numbering of bits in a
register can be marked on
the top of the box as shown
in (c).
4. A 16-bit register PC is
divided into 2 parts- Bits (0 to 7) are assigned with lower
byte of 16-bit address and bits (8 to 15) are assigned with
higher bytes of 16-bit address as shown in (d).
Advantages of Register Transfer Language (RTL)
 Enables efficient hardware design.
 This makes it possible to simulate some activities and
perhaps detect some errors at an early date.
 Implements conceptual description up to the gate-level
hardware.
 It helps to reuse the design components.
 It gives a clear guide on how to do timing analysis on a given
design.
Disadvantages of Register Transfer Language (RTL)
 Although the performance is high, this type can be quite
challenging to debug.
 These may lead to inefficient large constructions if not well
optimized for beneficial use.
 The reasoning behind it is rather hardware-oriented and may
cause problems that are hard to comprehend without
knowledge of message flow.
 Synthesis results appear to depend on the capabilities of
specific tools.
 Compared to high-level descriptions, the amount of
abstraction retrieved by this system is very low.
Micro-Operation:-
Micro-operations (also known as micro-ops) are the functional, or
atomic, operations of a processor. These are low-level instructions
used in some designs to implement complex machine
instructions. They generally perform operations on data stored in
one or more registers. They transfer data between registers or
between external buses of the CPU, and also perform arithmetic
and logical operations on registers. In executing a program, the
operation of a computer consists of a sequence of instruction
cycles, with one machine instruction per cycle.
 Each instruction cycle is made up of a number of smaller
units – Fetch, Indirect, Execute and Interrupt cycles.
 Each of these cycles involves a series of steps, each of which
involves the processor registers. These steps are referred to
as micro-operations.
 Micro-operations are small tasks performed inside the CPU.
These tasks use data stored in the CPU’s registers to do basic
operations like math or logic tasks. They also help move data
between registers or between memory and registers.

Question based on instruction formats:-

Q. Consider a processor with 64 registers and an instruction set of


size twelve. Each instruction has five distinct fields, namely,
opcode, two source register identifiers, one destination register
identifier, and a twelve-bit immediate value. Each instruction
must be stored in memory in a byte-aligned fashion. If a program
has 100 instructions, the amount of memory (in bytes) consumed
by the program text is ____________.
Options: (A) 100, (B) 200, (C) 400, (D) 500

1. Find bits for Instruction set size = 12 ⇒ number of


Step Explanation

opcode instructions = 12, so we need ceil(log₂(12)) bits


for opcode. ⌈log₂12⌉ = 4 bits (because 2⁴=16 ≥
Step Explanation

64 registers ⇒ need log₂(64) = 6 bits to identify


12).
2. Register
identifier bits any register.
3. Number of There are two source registers + one destination
registers in register = 3 registers. So register identifier fields
the instruction total = 3 × 6 = 18 bits.
4. Immediate
Given as 12 bits.
field
5. Total bits 4 (opcode) + 18 (register IDs) + 12 (immediate)
per instruction = 34 bits.
Byte alignment means instructions must start on
6. Byte- an integral number of bytes; minimal storage for

bytes. 34 bits / 8 = 4.25 bytes ⇒ must be stored


aligned one 34-bit instruction is rounded up to whole
storage
in 5 bytes per instruction.
7. Total for
100 100 × 5 bytes = 500 bytes.
instructions

Q. A processor with 16 general purpose registers uses a 32-bit


instruction format. The instruction format consists of an opcode
field, an addressing‐mode field, two register operand fields, and a
16-bit scalar field. If 8 addressing modes are to be supported, the
maximum number of unique opcodes possible for every
addressing mode is __________.

Explanati
Step
on

Instruction size = 32 bits.

Number of registers = 16 ⇒ register fields need


log₂(16) = 4 bits each. Since there are two register
operand fields, those take 2 × 4 = 8 bits.
Explanati
Step
on

modes ⇒ needs log₂(8) = 3 bits.


Addressing-mode field must distinguish among 8

Scalar field is given as 16 bits.

So bits used by: addressing-mode (3) + 2 × register


fields (8) + scalar (16) = 3 + 8 + 16 = 27 bits.

Remaining bits for opcode = 32 − 27 = 5 bits.

Therefore maximum number of unique opcodes = 2⁵ =


32.
Q. A processor has 64 general-purpose registers and 50 distinct
instruction types. An instruction is encoded in 32 bits. What is the
maximum number of bits that can be used to store the immediate
operand for the given instruction?
Explanati
Step
on

Register count = 64 ⇒ register operand fields need


log₂(64) = 6 bits each. Two register operands ⇒ 2 × 6
= 12 bits.

Number of distinct instructions = 50 ⇒ we need


opcode bits = ⌈log₂(50)⌉ = 6 bits (since 2⁵=32 <50,
2⁶=64 ≥50).
Let the immediate operand bits be I (unknown). So
total bits used = opcode (6) + 12 (for the two register
fields) + I = 32.

So I = 32 − 6 − 12 = 14 bits.
So maximum size of immediate field is 14 bits.

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