Trainee Handout Centre for Electronics Test Engineering, Kolkata

1 Bit Logic Instructions

1.1 Overview of Bit Logic Instructions

Description
Bit logic instructions work with two digits, 1 and 0. These two digits form the base
of a number system called the binary system. The two digits 1 and 0 are called
binary digits or bits. In the world of contacts and coils, a 1 indicates activated or
energized, and a 0 indicates not activated or not energized.
The bit logic instructions interpret signal states of 1 and 0 and combine them
according to Boolean logic. These combinations produce a result of 1 or 0 that is
called the “result of logic operation” (RLO).
The logic operations that are triggered by the bit logic instructions perform a variety
of functions.
There are bit logic instructions to perform the following functions:
---| |--- Normally Open Contact (Address)
---| / |--- Normally Closed Contact (Address)
---(SAVE) Save RLO into BR Memory
XOR Bit Exclusive OR
---( ) Output Coil
---( # )--- Midline Output
---|NOT|--- Invert Power Flow

The following instructions react to an RLO of 1:

---( S ) Set Coil
---( R ) Reset Coil
SR Set-Reset Flip Flop
RS Reset-Set Flip Flop

Other instructions react to a positive or negative edge transition to perform the

following functions:
---(N)--- Negative RLO Edge Detection
---(P)--- Positive RLO Edge Detection
NEG Address Negative Edge Detection
POS Address Positive Edge Detection
Immediate Read
Immediate Write

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1.2 ---| |--- Normally Open Contact (Address)

Symbol
<address>
---| |---

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D, T, C Checked bit

Description
---| |--- (Normally Open Contact) is closed when the bit value stored at the specified
<address> is equal to "1". When the contact is closed, ladder rail power flows
across the contact and the result of logic operation (RLO) = "1".
Otherwise, if the signal state at the specified <address> is "0", the contact is open.
When the contact is open, power does not flow across the contact and the result of
logic operation (RLO) = "0".
When used in series, ---| |--- is linked to the RLO bit by AND logic. When used in
parallel, it is linked to the RLO by OR logic.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - X X X 1

Example

I 0.0 I 0.1

I 0.2

Power flows if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1
Or the signal state is "1" at input I0.2

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1.3 ---| / |--- Normally Closed Contact (Address)

Symbol
<address>
---| / |---

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D, T, C Checked bit

Description
---| / |--- (Normally Closed Contact) is closed when the bit value stored at the
specified <address> is equal to "0". When the contact is closed, ladder rail power
flows across the contact and the result of logic operation (RLO) = "1".
Otherwise, if the signal state at the specified <address> is "1", the contact is
opened. When the contact is opened, power does not flow across the contact and
the result of logic operation (RLO) = "0".
When used in series, ---| / |--- is linked to the RLO bit by AND logic. When used in
parallel, it is linked to the RLO by OR logic.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - X X X 1

Example

I 0.0 I 0.1

I 0.2

Power flows if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1
Or the signal state is "1" at input I0.2

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1.4 XOR Bit Exclusive OR

For the XOR function, a network of normally open and normally closed contacts
must be created as shown below.

Symbols

<address1> <address2>

<address1> <address2>

Parameter Data Type Memory Area Description

<address1> BOOL I, Q, M, L, D, T, C Scanned bit
<address2 BOOL I, Q, M, L, D, T, C Scanned bit

Description
XOR (Bit Exclusive OR) creates an RLO of "1" if the signal state of the two
specified bits is different.

Example

I 0.0 I 0.1 Q 4.0

I 0.0 I 0.1

The output Q4.0 is "1" if (I0.0 = "0" AND I0.1 = "1") OR (I0.0 = "1" AND I0.1 = "0").

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1.5 --|NOT|-- Invert Power Flow

Symbol
---|NOT|---

Description
---|NOT|--- (Invert Power Flow) negates the RLO bit.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - - 1 X -

Example

I 0.0 Q 4.0
NOT
I 0.1 I 0.2

The signal state of output Q4.0 is "0" if one of the following conditions exists:
The signal state is "1" at input I0.0
Or the signal state is "1" at inputs I0.1 and I0.2.

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1.6 ---( ) Output Coil

Symbol
<address>
---( )

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Assigned bit

Description
---( ) (Output Coil) works like a coil in a relay logic diagram. If there is power flow to
the coil (RLO = 1), the bit at location <address> is set to "1". If there is no power flow
to the coil (RLO = 0), the bit at location <address> is set to "0". An output coil can
only be placed at the right end of a ladder rung. Multiple output elements (max.
16) are possible (see example). A negated output can be created by using the ---
|NOT|--- (invert power flow) element.

MCR (Master Control Relay) dependency

MCR dependency is activated only if an output coil is placed inside an active MCR
zone. Within an activated MCR zone, if the MCR is on and there is power flow to an
output coil; the addressed bit is set to the current status of power flow. If the MCR is
off, a logic "0" is written to the specified address regardless of power flow status.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 X - 0

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Example

I 0.0 I 0.1 Q 4.0

I 0.2 I 0.3 Q 4.1

The signal state of output Q4.0 is "1" if one of the following conditions exists:
The signal state is "1" at inputs I0.0 AND I0.1
OR the signal state is "0" at input I0.2.
The signal state of output Q4.1 is "1" if one of the following conditions exists:
The signal state is "1" at inputs I0.0 AND I0.1
OR the signal state is "0" at input I0.2 AND "1" at input I0.3

If the example rungs are within an activated MCR zone:

When MCR is on, Q4.0 and Q4.1 are set according to power flow status as
described above.
When MCR is off (=0), Q4.0 and Q4.1 are reset to 0 regardless of power flow.

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1.7 ---( # )--- Midline Output

Symbol
<address>
---( # )---

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, *L, D Assigned bit
* An L area address can only be used if it is declared TEMP in the variable
declaration table of a logic block (FC, FB, OB).

Description
---( # )--- (Midline Output) is an intermediate assigning element which saves the
RLO bit (power flow status) to a specified <address>. The midline output element
saves the logical result of the preceding branch elements. In series with other
contacts, ---( # )--- is inserted like a contact. A ---( # )--- element may never be
connected to the power rail or directly after a branch connection or at the end of a
branch. A negated ---( # )--- can be created by using the ---|NOT|--- (invert power
flow) element.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a midline output coil is placed inside an active
MCR zone. Within an activated MCR zone, if the MCR is on and there is power
flow to a midline output coil; the addressed bit is set to the current status of power
flow. If the MCR is off, a logic "0" is written to the specified address regardless of
power flow status.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 X - 1

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Example
I 1.0 I 1.1 M 0.0 I 2.2 I 1.3 M 1.1 M 2.2 Q 4.0

(#) NOT (#) NOT (#) ( )

I 1.0 I 1.1
M 0.0 has the RLO
I 1.0 I 1.1 I 2.2 I 1.3

M 1.1 has the RLO NOT

M 2.2 has the RLO of the entire bit logic combination

1.8 ---( R ) Reset Coil

Symbol
<address>
---( R )

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D, T, C Reset bit

Description
---( R ) (Reset Coil) is executed only if the RLO of the preceding instructions is "1"
(power flows to the coil). If power flows to the coil (RLO is "1"), the specified
<address> of the element is reset to "0". A RLO of "0" (no power flow to the coil)
has no effect and the state of the element's specified address remains unchanged.
The <address> may also be a timer (T no.) whose timer value is reset to "0" or a
counter (C no.) whose counter value is reset to "0".

MCR (Master Control Relay) dependency

MCR dependency is activated only if a reset coil is placed inside an active MCR
zone. Within an activated MCR zone, if the MCR is on and there is power flow to a
reset coil; the addressed bit is reset to the "0" state. If the MCR is off, the current
state of the element's specified address remains unchanged regardless of power
flow status.

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Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 X - 0

Example
Network 1

I 0.0 I 0.1 Q 4.0

R

I 0.2

Network 2
I 0.3 T1
R

Network 3
I 0.4 C1
R

The signal state of output Q4.0 is reset to "0" if one of the following conditions
exists:
The signal state is "1" at inputs I0.0 and I0.1
Or the signal state is "0" at input I0.2.
If the RLO is "0", the signal state of output Q4.0 remains unchanged.
The signal state of timer T1 is only reset if:
the signal state is "1" at input I0.3.
The signal state of counter C1 is only reset if:
the signal state is "1" at input I0.4.

If the example rungs are within an activated MCR zone:

When MCR is on, Q4.0, T1, and C1 are reset as described above.
When MCR is off, Q4.0, T1, and C1 are left unchanged regardless of RLO state
(power flow status).

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1.9 ---( S ) Set Coil

Symbol
<address>
---( S )

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Set bit

Description
---( S ) (Set Coil) is executed only if the RLO of the preceding instructions is "1"
(power flows to the coil). If the RLO is "1" the specified <address> of the element is
set to "1".
An RLO = 0 has no effect and the current state of the element's specified address
remains unchanged.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a set coil is placed inside an active MCR zone.
Within an activated MCR zone, if the MCR is on and there is power flow to a set coil;
the addressed bit is set to the "1" state. If the MCR is off, the current state of the
element's specified address remains unchanged regardless of power flow status.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 X - 0

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Example
I 0.0 I 0.1 Q 4.0
S
I 0.2

The signal state of output Q4.0 is "1" if one of the following conditions exists:
The signal state is "1" at inputs I0.0 and I0.1
Or the signal state is "0" at input I0.2.
If the RLO is "0", the signal state of output Q4.0 remains unchanged.

If the example rungs are within an activated MCR zone:

When MCR is on, Q4.0 is set as described above.
When MCR is off, Q4.0 is left unchanged regardless of RLO state (power flow
status).

1.10 RS Reset-Set Flip Flop

Symbol
<address>
RS
S Q
R

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Set or reset bit
S BOOL I, Q, M, L, D Enabled reset instruction
R BOOL I, Q, M, L, D Enabled reset instruction
Q BOOL I, Q, M, L, D Signal state of <address>

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Description
RS (Reset-Set Flip Flop) is reset if the signal state is "1" at the R input, and "0" at the
S input. Otherwise, if the signal state is "0" at the R input and "1" at the S input, the
flip flop is set. If the RLO is "1" at both inputs, the order is of primary importance. The
RS flip flop executes first the reset instruction then the set instruction at the specified
<address>, so that this address remains set for the remainder of program scanning.
The S (Set) and R (Reset) instructions are executed only when the RLO is "1".
RLO "0" has no effect on these instructions and the address specified in the
instruction remains unchanged.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a RS flip flop is placed inside an active MCR
zone. Within an activated MCR zone, if the MCR is on, the addressed bit is reset to
"0" or set to "1" as described above. If the MCR is off, the current state of the
specified address remains unchanged regardless of input states.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1

Example
M 0.0 Q 4.0
I 0.0
RS
R Q
I 0.1
S

If the signal state is "1" at input I0.0 and "0" at I0.1, memory bit M0.0 is set and output
Q4.0 is "0". Otherwise, if the signal state at input I0.0 is "0" and at I0.1 is "1", memory
bit M0.0 is reset and output Q4.0 is "1". If both signal states are "0", nothing is
changed. If both signal states are "1", the set instruction dominates because of the
order; M0.0 is set and Q4.0 is "1".

If the example is within an activated MCR zone:

When MCR is on, Q4.0 is reset or set as described above.
When MCR is off, Q4.0 is left unchanged regardless of input states.

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1.11 SR Set-Reset Flip Flop

Symbol
<address>
SR
S Q
R

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Set or reset bit
S BOOL I, Q, M, L, D Enable set instruction
R BOOL I, Q, M, L, D Enable reset instruction
Q BOOL I, Q, M, L, D Signal state of <address>

Description
SR (Set-Reset Flip Flop) is set if the signal state is "1" at the S input, and "0" at the R
input. Otherwise, if the signal state is "0" at the S input and "1" at the R input, the flip
flop is reset. If the RLO is "1" at both inputs, the order is of primary importance. The
SR flip flop executes first the set instruction then the reset instruction at the specified
<address>, so that this address remains reset for the remainder of program
scanning.
The S (Set) and R (Reset) instructions are executed only when the RLO is "1".
RLO "0" has no effect on these instructions and the address specified in the
instruction remains unchanged.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a SR flip flop is placed inside an active MCR
zone. Within an activated MCR zone, if the MCR is on ; the addressed bit is set to
"1" or reset to "0" as described above. If the MCR is off, the current state of the
specified address remains unchanged regardless of input states.

Status word
BR CC1 CC0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1

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Example
M 0.0 Q 4.0
I 0.0
SR
S Q
I 0.1
R

If the signal state is "1" at input I0.0 and "0" at I0.1, memory bit M0.0 is set and output
Q4.0 is "1". Otherwise, if the signal state at input I0.0 is "0" and at I0.1 is "1", memory
bit M0.0 is reset and output Q4.0 is "0". If both signal states are "0", nothing is
changed. If both signal states are "1", the reset instruction dominates because of the
order; M0.0 is reset and Q4.0 is "0".

If the example is within an activated MCR zone:

When MCR is on, Q4.0 is set or reset as described above.
When MCR is off, Q4.0 is left unchanged regardless of input states.

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1.12 ---( N )--- Negative RLO Edge Detection

Symbol
<address>
---( N )

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Edge memory bit, storing the
previous signal state of RLO

Description
---( N )--- (Negative RLO Edge Detection) detects a signal change in the address
from "1" to "0" and displays it as RLO = "1" after the instruction. The current signal
state in the RLO is compared with the signal state of the address, the edge memory
bit. If the signal state of the address is "1" and the RLO was "0" before the
instruction, the RLO will be "1" (pulse) after this instruction, and "0" in all other cases.
The RLO prior to the instruction is stored in the address.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 x x 1

Example

I 0.0 I 0.1 M 0.0 CAS1

N JMP

I 0.2

The edge memory bit M0.0 saves the old RLO state. When there is a signal
change at the RLO from "1" to "0", the program jumps to label CAS1.

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1.13 ---( P )--- Positive RLO Edge Detection

Symbol
<address>
---( P )---

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Edge memory bit, storing the
previous signal state of RLO

Description
---( P )--- (Positive RLO Edge Detection) detects a signal change in the address from
"0" to "1" and displays it as RLO = "1" after the instruction. The current signal state in
the RLO is compared with the signal state of the address, the edge memory bit. If the
signal state of the address is "0" and the RLO was "1" before the instruction, the
RLO will be "1" (pulse) after this instruction, and "0" in all other cases. The RLO prior
to the instruction is stored in the address.

Status word
BR CC1 CC0 OV OS OR STA RLO /FC
writes: - - - - - 0 X X 1

Example

I 0.0 I 0.1 M 0.0 CAS1

P JMP
I 0.2

The edge memory bit M0.0 saves the old RLO state. When there is a signal
change at the RLO from "0" to "1", the program jumps to label CAS1.

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1.14 ---(SAVE) Save RLO into BR Memory

Symbol
---( SAVE )

Description
---(SAVE) (Save RLO into BR Memory) saves the RLO to the BR bit of the status
word. The first check bit /FC is not reset. For this reason, the status of the BR bit is
included in the AND logic operation in the next network.
For the instruction "SAVE" (LAD, FBD, STL), the following applies and not the
recommended use specified in the manual and online help:
We do not recommend that you use SAVE and then check the BR bit in the same
block or in subordinate blocks, because the BR bit can be modified by many
instructions occurring inbetween. It is advisable to use the SAVE instruction before
exiting a block, since the ENO output (= BR bit) is then set to the value of the RLO
bit and you can then check for errors in the block.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: X - - - - - - - -

Example

I 0.0 I 0.1
SAVE
I 0.2

The status of the rung (=RLO) is saved to the BR bit.

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1.15 NEG Address Negative Edge Detection

Symbol
<address1>

NEG
Q
<address2> M_BIT

Parameter Data Type Memory Area Description

<address1> BOOL I, Q, M, L, D Scanned signal
<address2> BOOL I, Q, M, L, D M_BIT edge memory bit, storing
the previous signal state of
<address1>
Q BOOL I, Q, M, L, D One shot output

Description
NEG (Address Negative Edge Detection) compares the signal state of <address1>
with the signal state from the previous scan, which is stored in <address2>. If the
current RLO state is "1" and the previous state was "0" (detection of rising edge), the
RLO bit will be "1" after this instruction.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x - - - - x 1 x 1

Example
I 0.3
I 0.0 I 0.1 I 0.2 NEG I 0.4 Q 4.0
Q ( )
M 0.0 M_BIT
The signal state at output Q4.0 is "1" if the following conditions exist:
The signal state is "1" at inputs I0.0 and I0.1 and I0.2
And there is a negative edge at input I0.3
And the signal state is "1" at input I0.4

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1.16 POS Address Positive Edge Detection

Symbol
<address1>

POS
Q
<address2> M_BIT

Parameter Data Type Memory Area Description

<address1> BOOL I, Q, M, L, D Scanned signal
<address2> BOOL I, Q, M, L, D M_BIT edge memory bit, storing
the previous signal state of
<address1>
Q BOOL I, Q, M, L, D One shot output

Description
POS (Address Positive Edge Detection) compares the signal state of <address1>
with the signal state from the previous scan, which is stored in <address2>. If the
current RLO state is "1" and the previous state was "0" (detection of rising edge),
the RLO bit will be "1" after this instruction.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x - - - - x 1 x 1

Example
I 0.3
I 0.0 I 0.1 I 0.2 POS I 0.4 Q 4.0
Q ( )
M 0.0 M_BIT
The signal state at output Q4.0 is "1" if the following conditions exist:
The signal state is "1" at inputs I0.0 and I0.1 and I0.2
And there is a positive edge at input I0.3
And the signal state is "1" at input I0.4

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1.17 Immediate Read

Description
For the Immediate Read function, a network of symbols must be created as shown
in the example below.
For time-critical applications, the current state of a digital input may be read faster
than the normal case of once per OB1 scan cycle. An Immediate Read gets the state
of a digital input from an input module at the time the Immediate Read rung is
scanned. Otherwise, you must wait for the end of the next OB1 scan cycle when the I
memory area is updated with the P memory state.
To perform an immediate read of an input (or inputs) from an input module, use the
peripheral input (PI) memory area instead of the input (I) memory area. The
peripheral input memory area can be read as a byte, a word, or a double word.
Therefore, a single digital input cannot be read via a contact (bit) element.
To conditionally pass voltage depending on the status of an immediate input:
1. A word of PI memory that contains the input data of concern is read by the
CPU.
2. The word of PI memory is then ANDed with a constant that yields a non-zero
result if the input bit is on ("1").
3. The accumulator is tested for non-zero condition.

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Example
Ladder Network with Immediate Read of Peripheral Input I1.1

I 4.1 WAND_W <>0 I 4.5

EN ENO
PIW1 IN1
16#0002 IN2 OUT MWx *

* MWx has to be specified in order to be able to store the network. x may be any
permitted number.

Description of WAND_W instruction:

PIW1 0000000000101010
W#16#0002 0000000000000010
Result 0000000000000010
In this example immediate input I1.1 is in series with I4.1 and I4.5.
The word PIW1 contains the immediate status of I1.1. PIW1 is ANDed with
W#16#0002. The result is not equal to zero if I1.1 (second bit) in PB1 is true ("1").
The contact A<>0 passes voltage if the result of the WAND_W instruction is not
equal to zero.

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1.18 Immediate Write

Description
For the Immediate Write function, a network of symbols must be created as shown in
the example below.
For time-critical applications, the current state of a digital output may have to be sent
to an output module faster than the normal case of once at the end of the OB1 scan
cycle. An Immediate Write writes to a digital output to a input module at the time the
Immediate Write rung is scanned. Otherwise, you must wait for the end of the next
OB1 scan cycle when the Q memory area is updated with the P memory state.
To perform an immediate write of an output (or outputs) to an output module, use
the peripheral output (PQ) memory area instead of the output (Q) memory area. The
peripheral output memory area can be read as a byte, a word, or a double word.
Therefore, a single digital output cannot be updated via a coil element. To write the
state of a digital output to an output module immediately, a byte, word, or double
word of Q memory that contains the relevant bit is conditionally copied to the
corresponding PQ memory (direct output module addresses).

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Example
Ladder network equivalent of Immediate Write to peripheral digital output
module 5, channel 1.
The bit states of the addressed output Q byte (QB5) are either modified or left
unchanged. Q5.1 is assigned the signal state of I0.1 in network 1. QB5 is copied to
the corresponding direct peripheral output memory area (PQB5).
The word PIW1 contains the immediate status of I1.1. PIW1 is ANDed with
W#16#0002. The result is not equal to zero if I1.1 (second bit) in PB1 is true ("1").
The contact A<>0 passes voltage if the result of the WAND_W instruction is not
equal to zero.

Network 1
I 0.1 Q 5.1

Network 2
MOVE
EN ENO

QB5 IN OUT PQB5

In this example Q5.1 is the desired immediate output bit.

The byte PQB5 contains the immediate output status of the bit Q5.1.
The other 7 bits in PQB5 are also updated by the MOVE (copy) instruction.

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2 Move Instructions
2.1 MOVE Assign a Value

Symbol

MOVE
EN ENO
IN OUT

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input
ENO BOOL I, Q, M, L, D Enable output
IN All elementary data I, Q, M, L, D or Source value
types with a length of constant
8, 16, or 32 bits
OUT All elementary data I, Q, M, L, D Destination address
types with a length of
8, 16, or 32 bits

Description
MOVE (Assign a Value) is activated by the Enable EN Input. The value specified at
the IN input is copied to the address specified at the OUT output. ENO has the same
logic state as EN. MOVE can copy only BYTE, WORD, or DWORD data objects.
User-defined data types like arrays or structures have to be copied with
the system function "BLKMOVE" (SFC 20).

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: 1 - - - - 0 1 1 1

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MCR (Master Control Relay) dependency

MCR dependency is activated only if a Move box is placed inside an active MCR
zone. Within an activated MCR zone, if the MCR is on and there is power flow to
the enable input; the addressed data is copied as described above. If the MCR is
off, and a MOVE is executed, a logic "0" is written to the specified OUT address
regardless of current IN states.

Note
When moving a value to a data type of a different length, higher-value bytes are
truncated as necessary or filled up with zeros:

Example: Double Word 1111 1111 0000 1111 1111 0000 0101 0101
Move Result
to a double word: 1111 1111 0000 1111 1111 0000 0101 0101
to a byte: 0101 0101
to a word: 1111 0000 0101 0101

Example: Byte 1111 0000

Move Result
to a byte: 1111 0000
to a word: 0000 0000 1111 0000
to a double word: 0000 0000 0000 0000 0000 0000 1111 0000

Example

I 0.0 MOVE Q 4.0

EN ENO

MW10 IN OUT DBW12

The instruction is executed if I0.0 is "1". The content of MW10 is copied to data
word 12 of the currently open DB.
Q4.0 is "1" if the instruction is executed.

If the example rungs are within an activated MCR zone:

When MCR is on, MW10 data is copied to DBW12 as described above.
When MCR is off, "0" is written to DBW12.

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3 Timer Instructions

3.1 Overview of Timer Instructions

Description
You can find information for setting and selecting the correct time under "Location
of a Timer in Memory and Components of a Timer".
The following timer instructions are available:
S_PULSE Pulse S5 Timer
S_PEXT Extended Pulse S5 Timer
S_ODT On-Delay S5 Timer
S_ODTS Retentive On-Delay S5 Timer
S_OFFDT Off-Delay S5 Timer
---( SP ) Pulse Timer Coil
---( SE ) Extended Pulse Timer Coil
---( SD ) On-Delay Timer Coil
---( SS ) Retentive On-Delay Timer Coil
---( SA ) Off-Delay Timer Coil

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3.2 Location of a Timer in Memory and Components of a

Timer

Area in Memory
Timers have an area reserved for them in the memory of your CPU. This memory
area reserves one 16-bit word for each timer address. The ladderlogic instruction
set supports 256 timers. Please refer to your CPU’s technical information to
establish the number of timer words available.
The following functions have access to the timer memory area:
Timer instructions
Updating of timer words by means of clock timing. This function of your CPU in
the RUN mode decrements a given time value by one unit at the interval
designated by the time base until the time value is equal to zero.

Time Value
Bits 0 through 9 of the timer word contain the time value in binary code. The time
value specifies a number of units. Time updating decrements the time value by one
unit at an interval designated by the time base. Decrementing continues until the time
value is equal to zero. You can load a time value into the low word of accumulator 1
in binary, hexadecimal, or binary coded decimal (BCD) format.
You can pre-load a time value using either of the following formats:
W#16#wxyz
- Where w = the time base (that is, the time interval or resolution)
- Where xyz = the time value in binary coded decimal format
S5T#aH_bM_cS_dMS
- Where H = hours, M = minutes, S = seconds, and MS = milliseconds;
a, b, c, d are defined by the user.
- The time base is selected automatically, and the value is rounded to the
next lower number with that time base.
The maximum time value that you can enter is 9,990 seconds, or 2H_46M_30S.
S5TIME#4S = 4 seconds
s5t#2h_15m = 2 hours and 15 minutes
S5T#1H_12M_18S = 1 hour, 12 minutes, and 18 seconds

Time Base
Bits 12 and 13 of the timer word contain the time base in binary code. The time
base defines the interval at which the time value is decremented by one unit. The
smallest time base is 10 ms; the largest is 10 s.

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Time Base Binary Code for the Time Base

10 ms 00
100 ms 01
1s 10
10 s 11

Values that exceed 2h46m30s are not accepted. A value whose resolution is too
high for the range limits (for example, 2h10ms) is truncated down to a valid
resolution. The general format for S5TIME has limits to range and resolution as
shown below:

Resolution Range
0.01 second 10MS to 9S_990MS
0.1 second 100MS to 1M_39S_900MS
1 second 1S to 16M_39S
10 seconds 10S to 2H_46M_30S

Bit Configuration in the Time Cell

When a timer is started, the contents of the timer cell are used as the time value.
Bits 0 through 11 of the timer cell hold the time value in binary coded decimal format
(BCD format: each set of four bits contains the binary code for one decimal value).
Bits 12 and 13 hold the time base in binary code.
The following figure shows the contents of the timer cell loaded with timer value
127 and a time base of 1 second:

15... ...8 7... ...0

x x 1 0 0 0 0 1 0 0 1 0 0 1 1 1

1 2 7

Time base Time value in BCD (0 to 999)

1 second

Irrelevant: These bits are ignored when the timer is started.

Reading the Time and the Time Base

Each timer box provides two outputs, BI and BCD, for which you can indicate a
word location. The BI output provides the time value in binary format. The BCD
output provides the time base and the time value in binary coded decimal (BCD)
format.

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Choosing the right Timer

This overview is intended to help you choose the right timer for your timing job.

I 0.0

Q 4.0 S_PULSE

Q 4.0 S_PEXT

Q 4.0 S_ODT

Q 4.0 S_ODTS

Q 4.0 S_OFFDT
t

Timer Description
S_PULSE The maximum time that the output signal remains at 1 is the
Pulse timer same as the programmed time value t. The output signal stays
at 1 for a shorter period if the input signal changes to 0.
S_PEXT The output signal remains at 1 for the programmed length of
Extended pulse timer time, regardless of how long the input signal stays at 1.
S_ODT The output signal changes to 1 only when the programmed time
On-delay timer has elapsed and the input signal is still 1.
S_ODTS The output signal changes from 0 to 1 only when the
Retentive on-delay timer programmed time has elapsed, regardless of how long the input
signal stays at 1.
S_OFFDT The output signal changes to 1 when the input signal changes to
Off-delay timer 1 or while the timer is running. The time is started when the input
signal changes from 1 to 0.

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3.3 S_PULSE Pulse S5 Timer

Symbol

English German
T no. T-Nr.
S_PULSE S_IMPULS
S Q S Q
TV BI TW DUAL
R BCD R DEZ

Parameter Parameter Data Type Memory Area Description

English German
T no. T-Nr. TIMER T Timer identification number;
range depends on CPU
S S BOOL I, Q, M, L, D Start input
TV TW S5TIME I, Q, M, L, D Preset time value
R R BOOL I, Q, M, L, D Reset input
BI DUAL WORD I, Q, M, L, D Remaining time value,
integer format
BCD DEZ WORD I, Q, M, L, D Remaining time value, BCD
format
Q Q BOOL I, Q, M, L, D Status of the timer

Description
S_PULSE (Pulse S5 Timer) starts the specified timer if there is a positive edge at the
start (S) input. A signal change is always necessary in order to enable a timer. The
timer runs as long as the signal state at input S is "1", the longest period, however, is
the time value specified by input TV. The signal state at output Q is "1" as long as
the timer is running. If there is a change from "1" to "0" at the S input before the time
interval has elapsed the timer will be stopped. In this case the signal state at output
Q is "0".
The timer is reset when the timer reset (R) input changes from "0" to "1" while the
timer is running. The current time and the time base are also set to zero. Logic "1"
at the timer's R input has no effect if the timer is not running.
The current time value can be scanned at the outputs BI and BCD. The time value
at BI is binary coded, at BCD it is BCD coded. The current time value is the initial TV
value minus the time elapsed since the timer was started.

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Timing Diagram
Pulse timer characteristics:

t t t
RLO at S input

RLO at R input

Timer running

Scan for "1"

Scan for "0"

t = Programmed time

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1

Example

T5
I 0.0 S_PULSE S Q 4.0
Q

I 0.1 S5TIME#2S TV BI
R BCD

If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the
timer T5 will be started. The timer will continue to run for the specified time of two
seconds (2 s) as long as I0.0 is "1". If the signal state of I0.0 changes from "1" to
"0" before the timer has expired the timer will be stopped. If the signal state of input
I0.1 changes from "0" to "1" while the timer is running, the time is reset.
The output Q4.0 is logic "1" as long as the timer is running and "0" if the time has
elapsed or was reset.

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3.4 S_PEXT Extended Pulse S5 Timer

Symbol

English German
T no. T-Nr.
S_PEXT S_VIMP
S Q S Q
TV BI TW DUAL
R BCD R DEZ

Parameter Parameter Data Type Memory Area Description

English German
T no. T-Nr. TIMER T Timer identification number;
range depends on CPU
S S BOOL I, Q, M, L, D Start input
TV TW S5TIME I, Q, M, L, D Preset time value
R R BOOL I, Q, M, L, D Reset input
BI DUAL WORD I, Q, M, L, D Remaining time value,
integer format
BCD DEZ WORD I, Q, M, L, D Remaining time value, BCD
format
Q Q BOOL I, Q, M, L, D Status of the timer

Description
S_PEXT (Extended Pulse S5 Timer) starts the specified timer if there is a positive
edge at the start (S) input. A signal change is always necessary in order to enable a
timer. The timer runs for the preset time interval specified at input TV even if the
signal state at the S input changes to "0" before the time interval has elapsed. The
signal state at output Q is "1" as long as the timer is running. The timer will be
restarted ("re-triggered") with the preset time value if the signal state at input S
changes from "0" to "1" while the timer is running.
The timer is reset if the reset (R) input changes from "0" to "1" while the timer is
running. The current time and the time base are set to zero.
The current time value can be scanned at the outputs BI and BCD. The time value at
BI is binary coded, at BCD is BCD coded. The current time value is the initial TV
value minus the time elapsed since the timer was started.
See also "Location of a Timer in Memory and Components of a Timer".

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Timing Diagram
Extended pulse timer characteristics:

t t t t
RLO at S input
RLO at R input
Timer running
Scan for "1"
Scan for "0"

t = Programmed time

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1

Example

T5
I 0.0 S_PEXT Q 4.0
S Q

S5TIME#2S TV BI
I 0.1
R BCD

If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the
timer T5 will be started. The timer will continue to run for the specified time of two
seconds (2 s) without being affected by a negative edge at input S. If the signal
state of I0.0 changes from "0" to "1" before the timer has expired the timer will be
re-triggered. The output Q4.0 is logic "1" as long as the timer is running.

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3.5 S_ODT On-Delay S5 Timer

Symbol

English German
T no. T-Nr.
S_ODT S_EVERZ
S Q S Q
TV BI TW DUAL
R BCD R DEZ

Parameter Parameter Data Type Memory Area Description

English German
T no. T-Nr. TIMER T Timer identification number;
range depends on CPU
S S BOOL I, Q, M, L, D Start input
TV TW S5TIME I, Q, M, L, D Preset time value
R R BOOL I, Q, M, L, D Reset input
BI DUAL WORD I, Q, M, L, D Remaining time value,
integer format
BCD DEZ WORD I, Q, M, L, D Remaining time value, BCD
format
Q Q BOOL I, Q, M, L, D Status of the timer

Description
S_ODT (On-Delay S5 Timer) starts the specified timer if there is a positive edge at
the start (S) input. A signal change is always necessary in order to enable a timer.
The timer runs for the time interval specified at input TV as long as the signal state at
input S is positive. The signal state at output Q is "1" when the timer has elapsed
without error and the signal state at the S input is still "1". When the signal state at
input S changes from "1" to "0" while the timer is running, the timer is stopped. In this
case the signal state of output Q is "0".
The timer is reset if the reset (R) input changes from "0" to "1" while the timer is
running. The current time and the time base are set to zero. The signal state at output
Q is then "0". The timer is also reset if there is a logic "1" at the R input while the
timer is not running and the RLO at input S is "1".
The current time value can be scanned at the outputs BI and BCD. The time value at
BI is binary coded, at BCD is BCD coded. The current time value is the initial TV
value minus the time elapsed since the timer was started.
See also "Location of a Timer in Memory and Components of a Timer".

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Timing Diagram
On-Delay timer characteristics:

t t t
RLO at S input
RLO at R input
Timer running
Scan for "1"
Scan for "0"

t = Programmed time

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1

Example

T5
I 0.0 S_ODT Q 4.0
S Q

I 0.1 S5TIME#2S TV BI
R BCD

If the signal state of I0.0 changes from "0" to "1" (positive edge in RLO), the timer
T5 will be started. If the time of two seconds elapses and the signal state at input
I0.0 is still "1", the output Q4.0 will be "1". If the signal state of I0.0 changes from
"1" to "0", the timer is stopped and Q4.0 will be "0" (if the signal state of I0.1 changes
from "0" to "1", the time is reset regardless of whether the timer is running or not).

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3.6 S_ODTS Retentive On-Delay S5 Timer

Symbol

English German
T no. T-Nr.
S_ODTS S_SEVERZ
S Q S Q
TV BI TW DUAL
R BCD R DEZ

Parameter Parameter Data Type Memory Area Description

English German
T no. T-Nr. TIMER T Timer identification number;
range depends on CPU
S S BOOL I, Q, M, L, D Start input
TV TW S5TIME I, Q, M, L, D Preset time value
R R BOOL I, Q, M, L, D Reset input
BI DUAL WORD I, Q, M, L, D Remaining time value,
integer format
BCD DEZ WORD I, Q, M, L, D Remaining time value, BCD
format
Q Q BOOL I, Q, M, L, D Status of the timer

Description
S_ODTS (Retentive On-Delay S5 Timer) starts the specified timer if there is a
positive edge at the start (S) input. A signal change is always necessary in order to
enable a timer. The timer runs for the time interval specified at input TV even if the
signal state at input S changes to "0" before the time interval has elapsed. The signal
state at output Q is "1" when the timer has elapsed without regard to the signal state
at input S. The timer will be restarted (re-triggered) with the specified time if the
signal state at input S changes from "0" to "1" while the timer is running. The timer is
reset if the reset (R) input changes from "0" to "1" without regard to the RLO at the S
input. The signal state at output Q is then "0".
The current time value can be scanned at the outputs BI and BCD. The time value
at BI is binary coded, at BCD it is BCD coded. The current time value is the initial TV
value minus the time elapsed since the timer was started.

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Timing Diagram
Retentive On-Delay timer characteristics:

t t t t
RLO at S input

RLO at R input

Timer running

Scan for "1"

Scan for "0"

t = Programmed time

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1

Example

T5
I 0.0 S_ODTS Q 4.0
S Q

S5TIME#2S TV BI
I 0.1
R BCD

If the signal state of I0.0 changes from "0" to "1" (positive edge in RLO), the timer T5
will be started. The timer runs without regard to a signal change at I0.0 from "1" to
"0". If the signal state at I0.0 changes from "0" to "1" before the timer has expired,
the timer will be re-triggered. The output Q4.0 will be "1" if the timer elapsed. (If the
signal state of input I0.1 changes from "0" to "1", the time will be reset irrespective of
the RLO at S.)

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3.7 S_OFFDT Off-Delay S5 Timer

Symbol

English German
T no. T-Nr.
S_OFFDT S_AVERZ
S Q S Q
TV BI TW DUAL
R BCD R DEZ

Parameter Parameter Data Type Memory Area Description

English German
T no. T-Nr. TIMER T Timer identification number;
range depends on CPU
S S BOOL I, Q, M, L, D Start input
TV TW S5TIME I, Q, M, L, D Preset time value
R R BOOL I, Q, M, L, D Reset input
BI DUAL WORD I, Q, M, L, D Remaining time value,
integer format
BCD DEZ WORD I, Q, M, L, D Remaining time value, BCD
format
Q Q BOOL I, Q, M, L, D Status of the timer

Description
S_OFFDT (Off-Delay S5 Timer) starts the specified timer if there is a negative edge
at the start (S) input. A signal change is always necessary in order to enable a
timer. The signal state at output Q is "1" if the signal state at the S input is "1" or
while the timer is running. The timer is reset when the signal state at input S goes
from "0" to "1" while the timer is running. The timer is not restarted until the signal
state at input S changes again from "1" to "0".
The timer is reset when the reset (R) input changes from "0" to "1" while the timer is
running.
The current time value can be scanned at the outputs BI and BCD. The time value
at BI is binary coded, at BCD it is BCD coded. The current time value is the initial TV
value minus the time elapsed since the timer was started.

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Timing Diagram
Off-Delay timer characteristics:

t t t
RLO at S input
RLO at R input
Timer running
Scan for "1"
Scan for "0"

t = Programmed time

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1

Example

T5
I 0.0 S_OFFDT S Q 4.0
Q

S5TIME#2S TV BI
I 0.1
R BCD

If the signal state of I0.0 changes from "1" to "0", the timer is started.
Q4.0 is "1" when I0.0 is "1" or the timer is running. (if the signal state at I0.1
changes from "0" to "1" while the time is running, the timer is reset).

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3.8 ---( SP ) Pulse Timer Coil

Symbol

English German
<T no..> <T no.>
---( SP ) ---( SI )
<time value> <time value>

Parameter Data Type Memory Area Description

<T no.> TIMER T Timer identification number;
range depends on CPU
<time value> S5TIME I, Q, M, L, D Preset time value

Description
---( SP ) (Pulse Timer Coil) starts the specified timer with the <time value> when
there is a positive edge on the RLO state. The timer continues to run for the
specified time interval as long as the RLO remains positive ("1"). The signal state of
the counter is ”1” as long as the timer is running. If there is a change from "1" to
"0" in the RLO before the time value has elapsed, the timer will stop. In this case, a
scan for "1" always produces the result "0".
See also "Location of a Timer in Memory and Components of a Timer" and
S_PULSE (Pulse S5 Timer).

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 - - 0

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Example

Network 1

I 0.0 T5
SP
S5T#2S
Network 2

T5 Q 4.0

Network 3
I 0.1 T5
R

If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the
timer T5 is started. The timer continues to run with the specified time of two seconds
as long as the signal state of input I0.0 is "1". If the signal state of input I0.0 changes
from "1" to "0" before the specified time has elapsed, the timer stops. The signal
state of output Q4.0 is "1" as long as the timer is running. A signal state change from
"0" to "1" at input I0.1 will reset timer T5 which stops the timer and clears the
remaining portion of the time value to "0".

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3.9 ---( SE ) Extended Pulse Timer Coil

Symbol

English German
<T no.> <T no>
---( SE ) ---( SV )
<time value> <time value>

Parameter Data Type Memory Area Description

<T no.> TIMER T Timer identification number;
range depends on CPU
<time value> S5TIME I, Q, M, L, D Preset time value

Description
---( SE ) (Extended Pulse Timer Coil) starts the specified timer with the specified
<time value> when there is a positive edge on the RLO state. The timer continues to
run for the specified time interval even if the RLO changes to "0" before the timer has
expired. The signal state of the counter is ”1” as long as the timer is running. The
timer will be restarted (re-triggered) with the specified time value if the RLO changes
from "0" to "1" while the timer is running.
See also "Location of a Timer in Memory and Components of a Timer" and
S_PEXT (Extended Pulse S5 Timer).

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 - - 0

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Example

Network 1

I 0.0 T5
SE
S5T#2S
Network 2

T5 Q A.0

Network 3
I 0.1 T5
R

If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the
timer T5 is started. The timer continues to run without regard to a negative edge of
the RLO. If the signal state of I0.0 changes from "0" to "1" before the timer has
expired, the timer is re-triggered.
The signal state of output Q4.0 is "1" as long as the timer is running. A signal state
change from "0" to "1" at input I0.1 will reset timer T5 which stops the timer and
clears the remaining portion of the time value to "0".

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3.10 ---( SD ) On-Delay Timer Coil

Symbol

English German
<T no.> <T no.>
---( SD ) ---( SE )
<time value> <time value>

Parameter Data Type Memory Area Description

<T no.> TIMER T Timer identification number;
range depends on CPU
<time value> S5TIME I, Q, M, L, D Preset time value

Description
---( SD ) (On Delay Timer Coil) starts the specified timer with the <time value> if
there is a positive edge on the RLO state. The signal state of the timer is "1" when
the <time value> has elapsed without error and the RLO is still "1". When the RLO
changes from "1" to "0" while the timer is running, the timer is reset. In this case, a
scan for "1" always produces the result "0".
See also "Location of a Timer in Memory and Components of a Timer" and S_ODT
(On-Delay S5 Timer).

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 - - 0

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Example

Network 1
I 0.0 T5
SD
S5T#2S
Network 2

T5 Q A.0

Network 3
I 0.1 T5
R

If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the
timer T5 is started. If the time elapses and the signal state of input I0.0 is still "1",
the signal state of output Q4.0 will be "1".
If the signal state of input I0.0 changes from "1" to "0", the timer remains idle and the
signal state of output Q4.0 will be "0". A signal state change from "0" to "1" at input
I0.1 will reset timer T5 which stops the timer and clears the remaining portion of the
time value to "0".

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3.11 ---( SS ) Retentive On-Delay Timer Coil

Symbol

English German
<T no.> <T no.>
---( SS ) ---( SS )
<time value> <time value>

Parameter Data Type Memory Area Description

<T no.> TIMER T Timer identification number;
range depends on CPU
<time value> S5TIME I, Q, M, L, D Preset time value

Description
---( SS ) (Retentive On-Delay Timer Coil) starts the specified timer if there is a
positive edge on the RLO state. The signal state of the timer is "1" if the time value
has elapsed. A restart of the timer is only possible if it is reset explicitly. Only a reset
causes the signal state of the timer to be set to "0".
The timer restarts with the specified time value if the RLO changes from "0" to "1"
while the timer is running.
See also "Location of a Timer in Memory and Components of a Timer" and
S_ODTS (Retentive On-Delay S5 Timer).

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 - - 0

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Example

Network 1

I 0.0 T5
SS
S5T#2S
Network 2

T5 Q A.0

Network 3
I 0.1 T5
R

If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the
timer T5 is started. If the signal state of input I0.0 changes from "0" to "1" before
the timer has expired, the timer is re-triggered. The output Q4.0 will be "1" if the
timer elapsed. A signal state "1" at input I0.1 will reset timer T5, which stops the
timer and clears the remaining portion of the time value to "0".

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3.12 ---( SF ) Off-Delay Timer Coil

Symbol

English German
<T no.> <T no.>
---( SF ) ---( SA )
<time value> <time value>

Parameter Data Type Memory Area Description

<T no.> TIMER T Timer identification number;
range depends on CPU
<time value> S5TIME I, Q, M, L, D Preset time value

Description
---( SF ) (Off-Delay Timer Coil) starts the specified timer if there is a negative edge
on the RLO state. The timer is "1" when the RLO is "1" or as long as the timer is
running during the <time value> interval. The timer is reset when the RLO goes
from "0" to "1" while the timer is running. The timer is always restarted when the
RLO changes from "1" to "0".
See also "Location of a Timer in Memory and Components of a Timer" and
S_OFFDT (Off-Delay S5 Timer).

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 - - 0

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Example

Network 1

I 0.0 T5
SF
S5T#2S
Network 2

T5 Q A.0

Network 3
I 0.1 T5
R

If the signal state of input I0.0 changes from "1" to "0" the timer is started.
The signal state of output Q4.0 is "1" when input I0.0 is "1" or the timer is running.
A signal state change from "0" to "1" at input I0.1 will reset timer T5 which stops the
timer and clears the remaining portion of the time value to "0".

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4 Counter Instructions
4.1 Overview of Counter Instructions

Area in Memory
Counters have an area reserved for them in the memory of your CPU. This memory
area reserves one 16-bit word for each counter address. The ladder logic instruction
set supports 256 counters.
The counter instructions are the only functions that have access to the counter
memory area.

Count Value
Bits 0 through 9 of the counter word contain the count value in binary code. The
count value is moved to the counter word when a counter is set. The range of the
count value is 0 to 999.
You can vary the count value within this range by using the following counter
instructions:
S_CUD Up-Down Counter
S_CD Down Counter
S_CU Up Counter
---( SC ) Set Counter Coil
---( CU ) Up Counter Coil
---( CD ) Down Counter Coil

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Bit Configuration in the Counter

You provide a counter with a preset value by entering a number from 0 to 999, for
example 127, in the following format: C#127. The C# stands for binary coded
decimal format (BCD format: each set of four bits contains the binary code for one
decimal value).
Bits 0 through 11 of the counter contain the count value in binary coded decimal
format.
The following figure shows the contents of the counter after you have loaded the
count value 127, and the contents of the counter cell after the counter has been
set.

15 14 13 12 11 10 9 7
8 6 5
4 3 2 1 0
0 0 0 0
1 0 1
0 0 1 1 1

irrelevant 1 2 7

Count value in BCD (0 to 999)

15 14 13 12 11 10 9 7
8 6 5
4 3 2 1 0
0 0 1 1 1 1 1 1

irrelevant Binary count value

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4.2 S_CUD Up-Down Counter

Symbol

English German
C no. Z no.
S_CUD ZAEHLER
CU Q ZV Q
CD ZR
S CV S DUAL
PV CV_BCD ZW DEZ
R R

Parameter Parameter Data Type Memory Area Description

English German
C no. Z no. COUNTER C Counter identification
number; range depends on
CPU
CU ZV BOOL I, Q, M, L, D Count up input
CD ZR BOOL I, Q, M, L, D Count down input
S S BOOL I, Q, M, L, D Set input for presetting
counter
PV ZW WORD I, Q, M, L, D Enter counter value as
or constant C#<value> in the range
from 0 to 999
PV ZW WORD I, Q, M, L, D Value for presetting counter
R R BOOL I, Q, M, L, D Reset input
CV DUAL WORD I, Q, M, L, D Current counter value,
hexadecimal number
CV_BCD DEZ WORD I, Q, M, L, D Current counter value, BCD
coded
Q Q BOOL I, Q, M, L, D Status of the counter

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Description
S_CUD (Up-Down Counter) is preset with the value at input PV if there is a positive
edge at input S. If there is a 1 at input R, the counter is reset and the count is set to
zero. The counter is incremented by one if the signal state at input CU changes from
"0" to "1" and the value of the counter is less than "999". The counter is decremented
by one if there is a positive edge at input CD and the value of the counter is greater
than "0".
If there is a positive edge at both count inputs, both instructions are executed and
the count value remains unchanged.
If the counter is set and if RLO = 1 at the inputs CU/CD, the counter will count
accordingly in the next scan cycle, even if there was no change from a positive to a
negative edge or viceversa.
The signal state at output Q is "1" if the count is greater than zero and "0" if the
count is equal to zero.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1

Note
Avoid to use a counter at several program points (risk of counting errors).

Example

C10
S_CUD
I 0.0 Q 4.0
CU Q
I 0.1
CD
I 0.2
S CV
I 0.3 MW10 PV CV_BCD
R

If I0.2 changes from "0" to "1", the counter is preset with the value of MW10. If the
signal state of I0.0 changes from "0" to "1", the value of counter C10 will be
incremented by one - except when the value of C10 is equal than "999". If I0.1
changes from "0" to "1", C10 is decremented by one - except when the value of C10
is equal to "0". Q4.0 is "1" if C10 is not equal to zero.

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4.3 S_CU Up Counter

Symbol

English German
C no. Z no.
S_CU Z_VORW
CU Q ZV Q
S S
PV CV ZW DUAL
CV_BCD DEZ
R R

Parameter Parameter Data Type Memory Area Description

English German
C no. Z no. COUNTER C Counter identification num-
ber; range depends of CPU
CU ZV BOOL I, Q, M, L, D Count up input
S S BOOL I, Q, M, L, D Set input for presetting
counter
PV ZW WORD I, Q, M, L, D Enter counter value as
or constant C#<value> in the range
from 0 to 999
PV ZW WORD I, Q, M, L, D Value for presetting counter
R R BOOL I, Q, M, L, D Reset input
CV DUAL WORD I, Q, M, L, D Current counter value,
hexadecimal number
CV_BCD DEZ WORD I, Q, M, L, D Current counter value, BCD
coded
Q Q BOOL I, Q, M, L, D Status of the counter

Description
S_CU (Up Counter) is preset with the value at input PV if there is a positive edge at
input S.
The counter is reset if there is a "1" at input R and the count value is then set to
zero.
The counter is incremented by one if the signal state at input CU changes from "0"
to "1" and the value of the counter is less than "999".
If the counter is set and if RLO = 1 at the inputs CU, the counter will count
accordingly in the next scan cycle, even if there was no change from a positive to a
negative edge or viceversa.
The signal state at output Q is "1" if the count is greater than zero and "0" if the
count is equal to zero.

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Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1

Note
Avoid to use a counter at several program points (risk of counting errors).

Example

C10
S_CU
I 0.0 Q 4.0
CU Q
I 0.2
S

MW10 PV CV
I 0.3
R CV_BCD

If I0.2 changes from "0" to "1", the counter is preset with the value of MW10. If the
signal state of I0.0 changes from "0" to "1", the value of counter C10 will be
incremented by one - unless the value of C10 is equal to "999". Q4.0 is "1" if C10 is
not equal to zero.

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4.4 S_CD Down Counter

Symbol

English German
C no. Z no.
S_CD Z_RUECK
CD Q ZR Q
S S
PV CV ZW DUAL
CV_BCD DEZ
R R

Parameter Parameter Data Type Memory Area Description

English German
C no. Z no. COUNTER C Counter identification number;
range depends of CPU
CD ZR BOOL I, Q, M, L, D Count down input
S S BOOL I, Q, M, L, D Set input for presetting counter
PV ZW WORD I, Q, M, L, D Enter counter value as
or constant C#<value> in the range from 0
to 999
PV ZW WORD I, Q, M, L, D Value for presetting counter
R R BOOL I, Q, M, L, D Reset input
CV DUAL WORD I, Q, M, L, D Current counter value,
hexadecimal number
CV_BCD DEZ WORD I, Q, M, L, D Current counter value, BCD
coded
Q Q BOOL I, Q, M, L, D Status counter
Description
S_CD (Down Counter) is set with the value at input PV if there is a positive edge at
input S.
The counter is reset if there is a 1 at input R and the count value is then set to
zero.
The counter is decremented by one if the signal state at input CD changes from "0"
to "1" and the value of the counter is greater than zero.
If the counter is set and if RLO = 1 at the inputs CD, the counter will count
accordingly in the next scan cycle, even if there was no change from a positive to a
negative edge or viceversa.
The signal state at output Q is "1" if the count is greater than zero and "0" if the
count is equal to zero.

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Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1

Note
Avoid to use a counter at several program points (risk of counting errors).

Example

C10
C_CD
I 0.0 Q 4.0
CD Q
I 0.2
S

MW10 PV CV
I 0.3
R CV_BCD

If I0.2 changes from "0" to "1", the counter is preset with the value of MW10. If the
signal state of I0.0 changes from "0" to "1", the value of counter C10 will be
decremented by one - unless the value of C10 is equal to "0". Q4.0 is "1" if C10 is
not equal to zero.

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4.5 ---( SC ) Set Counter Value

Symbol
English German
<C no.> <Z no.>
---( SC ) ---( SZ )
<preset value> <preset value>

Parameter Parameter Data Type Memory Area Description

English German
<C no.> <Z no.> COUNTER C Counter number to be
preset
<preset <preset WORD I, Q, M, L, D Value for presetting BCD
value> value> or constant (0 to 999)

Description
---( SC ) (Set Counter Value) executes only if there is a positive edge in RLO. At
that time, the preset value transferred into the specified counter.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x - - - - 0 x - 0

Example

C5
I 0.0
SC
C#100

The counter C5 is preset with the value of 100 if there is a positive edge at input
I0.0 (change from "0" to "1"). If there is no positive edge, the value of counter C5
remains unchanged.

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4.6 ---( CU ) Up Counter Coil

Symbol

English German
<C no.> <Z no.>
---( CU ) ---( ZV )

Parameter Parameter Data Type Memory Area Description

English German
<C no.> <Z no.> COUNTER C Counter identification
number; range depends on
CPU

Description
---( CU ) (Up Counter Coil) increments the value of the specified counter by one if
there is a positive edge in the RLO and the value of the counter is less than "999". If
there is no positive edge in the RLO or the counter already has the value "999", the
value of the counter will be unchanged.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 - - 0

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Example

Network 1
I 0.0 C10
SC
C#100
Network 2
I 0.1 C10
CU
Network 3
I 0.2 C10
R

If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the
preset value of 100 is loaded to counter C10.
If the signal state of input I0.1 changes from "0" to "1" (positive edge in RLO),
counter C10 count value will be incremented by one unless the value of C10 is
equal to "999". If there is no positive edge in RLO, the value of C10 will be
unchanged.
If the signal state of I0.2 is "1", the counter C10 is reset to "0".

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4.7 ---( CD ) Down Counter Coil

Symbol

English German
<C no.> <Z no.>
---( CD ) ---( ZD )

Parameter Parameter Data Type Memory Area Description

English German
<C no.> <Z no.> COUNTER C Counter identification num-
ber; range depends on
CPU

Description
---( CD ) (Down Counter Coil) decrements the value of the specified counter by
one, if there is a positive edge in the RLO state and the value of the counter is
more than "0". If there is no positive edge in the RLO or the counter has already
the value "0", the value of the counter will be unchanged.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 - - 0

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Example

Network 1
I 0.0 Z10
SC
C#100
Network 2
I 0.1 C10
CU

Network 3
C10 Q 4.0 "0" count value
detector

Network 4
I 0.2 C10
R

If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the
preset value of 100 is loaded to counter C10.
If the signal state of input I0.1 changes from "0" to "1" (positive edge in RLO),
counter C10 count value will be decremented by one unless the value of C10 is
equal to "0". If there is no positive edge in RLO, the value of C10 will be
unchanged.
If the count value = 0, then Q4.0 is turned on.
If the signal state of input I0.2 is "1", the counter C10 is reset to "0".

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5 Comparison Instructions

5.1 Overview of Comparison Instructions

Description
IN1 and IN2 are compared according to the type of comparison you choose:
== IN1 is equal to IN2
<> IN1 is not equal to IN2
> IN1 is greater than IN2
< IN1 is less than IN2
>= IN1 is greater than or equal to IN2
<= IN1 is less than or equal to IN2
If the comparison is true, the RLO of the function is "1". It is linked to the RLO of a
rung network by AND if the compare element is used in series, or by OR if the box is
used in parallel.
The following comparison instructions are available:
CMP I Compare Integer
CMP D Compare Double Integer
CMP R Compare Real

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5.2 CMP I Compare Integer

Symbols
CMP CMP CMP
== I >I >= I
IN1 IN1 IN1
IN2 IN2 IN2

CMP CMP CMP

<> I <I <= I
IN1 IN1 IN1
IN2 IN2 IN2

Parameter Data Type Memory Area Description

box input BOOL I, Q, M, L, D Result of the previous logic
operation
box output BOOL I, Q, M, L, D Result of the comparison, is only
processed further if the RLO at
the box input = 1
IN1 INT I, Q, M, L, D First value to compare
or constant
IN2 INT I, Q, M, L, D Second value to compare
or constant

Description
CMP I (Compare Integer) can be used like a normal contact. It can be located at
any position where a normal contact could be placed. IN1 and IN2 are compared
according to the type of comparison you choose.
If the comparison is true, the RLO of the function is "1". It is linked to the RLO of
the whole rung by AND if the box is used in series, or by OR if the box is used in
parallel.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x x x 0 - 0 x x 1

Example
I 0.0 I 0.1 CMP Q 4.0
>= I S
MW0 IN1
MW2 IN2

Output Q4.0 is set if the following conditions exist:

There is a signal state of "1" at inputs I0.0 and at I0.1
AND MW0 >= MW2

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5.3 CMP D Compare Double Integer

Symbols
CMP CMP CMP
== D >D >= D
IN1 IN1 IN1
IN2 IN2 IN2

CMP CMP CMP

<> D <D <= D
IN1 IN1 IN1
IN2 IN2 IN2

Parameter Data Type Memory Area Description

box input BOOL I, Q, M, L, D Result of the previous logic operation
box output BOOL I, Q, M, L, D Result of the comparison, is only processed
further if the RLO at the box input = 1
IN1 DINT I, Q, M, L, D First value to compare
or constant
IN2 DINT I, Q, M, L, D Second value to compare
or constant

Description
CMP D (Compare Double Integer) can be used like a normal contact. It can be
located at any position where a normal contact could be placed. IN1 and IN2 are
compared according to the type of comparison you choose.
If the comparison is true, the RLO of the function is "1". It is linked to the RLO of a
rung network by AND if the compare element is used in series, or by OR if the box is
used in parallel.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x x x 0 - 0 x x 1

Example
I 0.0 I 0.1 CMP I 0.2 Q 4.0
>= D S
MD0 IN1
MD4 IN2

Output Q4.0 is set if the following conditions exist:

There is a signal state of "1" at inputs I0.0 and at I0.1
And MD0 >= MD4
And there is a signal state of"1" at input I0.2

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5.4 CMP R Compare Real

Symbols
CMP CMP CMP
== R >R >= R
IN1 IN1 IN1
IN2 IN2 IN2

CMP CMP CMP

<> R <R <= R
IN1 IN1 IN1
IN2 IN2 IN2

Parameter Data Type Memory Area Description

box input BOOL I, Q, M, L, D Result of the previous logic operation
box output BOOL I, Q, M, L, D Result of the comparison, is only processed
further if the RLO at the box input = 1
IN1 REAL I, Q, M, L, D First value to compare
or constant
IN2 REAL I, Q, M, L, D Second value to compare
or constant

Description
CMP R (Compare Real) can be used like a normal contact. It can be located at
any position where a normal contact could be placed. IN1 and IN2 are compared
according to the type of comparison you choose.
If the comparison is true, the RLO of the function is "1". It is linked to the RLO of
the whole rung by AND if the box is used in series, or by OR if the box is used in
parallel.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x x x x x 0 x x 1

Example
I 0.0 I 0.1 CMP I 0.2 Q 4.0
>= R S
MD0 IN1
MD4 IN2

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6 Program Control Instructions

6.1 Overview of Program Control Instructions

Description
The following program control instructions are available:
---(CALL) Call FC SFC from Coil (without Parameters)
CALL_FB Call FB from Box
CALL_FC Call FC from Box
CALL_SFB Call System FB from Box
CALL_SFC Call System FC from Box
Call Multiple Instance
Call Block from a Library
Important Notes on Using MCR Functions
---(MCR<) Master Control Relay On
---(MCR>) Master Control Relay Off
---(MCRA) Master Control Relay Activate
---(MCRD) Master Control Relay Deactivate
RET Return

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6.2 ---(Call) Call FC SFC from Coil (without Parameters)

Symbol
<FC/SFC no.>
---( CALL )

Parameter Data Type Memory Area Description

<FC/SFC no.> BLOCK_FC - Number of FC/SFC; range
BLOCK_SFC depends on CPU

Description
---(Call) (Call FC or SFC without Parameters) is used to call a function (FC) or
system function (SFC) that has no passed parameters. A call is only executed if
RLO is "1" at the CALL coil. If ---(Call) is executed,
The return address of the calling block is stored,
The previous local data area is replaced by the current local data area,
The MA bit (active MCR bit) is shifted to the B stack,
A new local data area for the called function is created.
After this, program processing continues in the called FC or SFC.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
Unconditional: writes: - - - - 0 0 1 - 0
Conditional: writes: - - - - 0 0 1 1 0

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Example

.
.
. DB10
OPN
.
.
.
MCRA
.
.
. FC10
CALL

I 0.0 Q 4.0
.
.
.
MCRD
.
.
. I 0.1 FC11
CALL

The Ladder rungs shown above are program sections from a function block written
by a user. In this FB, DB10 is opened and MCR functionality is activated. If the
unconditional call of FC10 is executed, the following occurs:
The return address of the calling FB plus selection data for DB10 and for the
instance data block for the calling FB are saved. The MA bit, set to "1" in the MCRA
instruction, is pushed to the B stack and then set to "0" for the called block
(FC10). Program processing continues in FC10. If MCR functionality is required by
FC10, it must be re-activated within FC10. When FC10 is finished, program
processing returns to the calling FB. The MA bit is restored, DB10 and the instance
data block for the user-written FB become the current DBs again, regardless of which
DBs FC10 has used. The program continues with the next rung by assigning the
logic state of I0.0 to output Q4.0. The call of FC11 is a conditional call. It is only
executed if I0.1 is "1". If it is executed, the process of passing program control to and
returning from FC11 is the same as was described for FC10.

Note
After returning to the calling block, the previously open DB is not always open
again. Please make sure you read the note in the README file.

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6.3 CALL_FB Call FB from Box

Symbol

<DB no.>
FB no.

EN ENO

The symbol depends on the FB (whether it has parameters and how many of
them). It must have the EN, ENO, and the name or number of the FB.

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input
ENO BOOL I, Q, M, L, D Enable output
FB no. BLOCK_FB - Number of FB/DB; range
DB no. BLOCK_DB - depends on CPU

Description
CALL_FB (Call a Function Block from a Box) executed if EN is "1". If CALL_FB is
executed,
The return address of the calling block is stored,
The selection data for the two current data blocks (DB and instance DB) are
stored,
The previous local data area is replaced by the current local data area,
The MA bit (active MCR bit) is shifted to the B stack,
A new local data area for the called function block is created.
After this, program processing continues within the called function block. The BR
bit is scanned in order to find out the ENO. The user has to assign the required
state (error evaluation) to the BR bit in the called block using ---(SAVE).

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
Unconditional: writes: x - - - 0 0 x x x
Conditional: writes: - - - - 0 0 x x x

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Example

.
.
. DB10
OPN
.
.
.
MCRA
.
DB11
.
FB11 Q 4.0
.
. EN ENO
.
. DB10
OPN

The Ladder rungs shown above are program sections from a function block written
by a user. In this FB, DB10 is opened and MCR functionality is activated. If the
unconditional call of FB11 is executed, the following occurs:
The return address of the calling FB plus selection data for DB10 and for the
instance data block for the calling FB are saved. The MA bit, set to "1" in the MCRA
instruction, is pushed to the B stack and then set to "0" for the called block
(FB11). Program processing continues in FB11. If MCR functionality is required by
FB11, it must be re-activated within FB11. The state of the RLO must be saved in the
BR bit by the instruction ---(SAVE) in order to be able to evaluate errors in the calling
FB. When FB11 is finished, program processing returns to the calling FB. The MA bit
is restored and the instance data block of the user-written FB is opened again. If the
FB11 is processed correctly, ENO = "1" and therefore Q4.0 = "1".

Note
When opening an FB or SFB, the number of the previously opened DB is lost. The
required DB has to be reopened.

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6.4 CALL_FC Call FC from Box

Symbol

FC no.

EN ENO

The symbol depends on the FC (whether it has parameters and how many of
them). It must have EN, ENO, and the name or number of the FC.

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input
ENO BOOL I, Q, M, L, D Enable output
FC no. BLOCK_FC - Number of FC; range depends on
CPU

Description
CALL_FC (Call a Function from a Box) is used to call a function (FC). The call is
executed if EN is "1". If CALL_FC is executed,
The return address of the calling block is stored,
The previous local data area is replaced by the current local data area,
The MA bit (active MCR bit) is shifted to the B stack,
A new local data area for the called function is created.
After this, program processing continues in the called function.
The BR bit is scanned in order to find out the ENO. The user has to assign the
required state (error evaluation) to the BR bit in the called block using ---(SAVE). If
you call a function and the variable declaration table of the called block has IN,
OUT, and IN_OUT declarations, these variables are added in the program for the
calling block as a list of formal parameters.
When calling the function, you must assign actual parameters to the formal
parameters at the call location. Any initial values in the function declaration have
no significance.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
Unconditional: writes: x - - - 0 0 x x x
Conditional: writes: - - - - 0 0 x x x

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Example

.
.
. DB10
OPN
.
.
.
MCRA
.
.
FC10 FC11 Q 4.0
.
EN ENO
. EN ENO
.
.

The Ladder rungs shown above are program sections from a function block written
by a user. In this FB, DB10 is opened and MCR functionality is activated. If the
unconditional call of FC10 is executed, the following occurs:
The return address of the calling FB plus selection data for DB10 and for the
instance data block for the calling FB are saved. The MA bit, set to "1" in the MCRA
instruction, is pushed to the B stack and then set to "0" for the called block
(FC10). Program processing continues in FC10. If MCR functionality is required by
FC10, it must be re-activated within FC10. The state of the RLO must be saved in
the BR bit by the instruction ---(SAVE) in order to be able to evaluate errors in the
calling FB. When FC10 is finished, program processing returns to the calling FB.
The MA bit is restored. After execution of FC10, program processing is continued in
the calling FB depending on the ENO:
ENO = "1" FC11 is processed
ENO = "0" processing starts in the next network
If FC11 is also processed correctly, ENO = "1" and therefore Q4.0 = "1".

Note
After returning to the calling block, the previously open DB is not always open
again. Please make sure you read the note in the README file.

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6.5 CALL_SFB Call System FB from Box

Symbol

<DB no.>
SFB no.

EN ENO

The symbol depends on the SFB (whether it has parameters and how many of
them). It must have the EN, ENO, and the name or number of the SFB.

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input
ENO BOOL I, Q, M, L, D Enable output
SFB no. BLOCK_SFB - Number of SFB; range depends
DB no. BLOCK_DB - on CPU

Description
CALL_SFB (Call a System Function Block from a Box) is executed if EN is "1". If
CALL_SFB is executed,
The return address of the calling block is stored,
The selection data for the two current data blocks (DB and instance DB) are
stored,
The previous local data area is replaced by the current local data area,
The MA bit (active MCR bit) is shifted to the B stack,
A new local data area for the called system function block is created. Program
processing then continues in the called SFB. ENO is "1" if the SFB was called (EN
= "1") and no error occurs.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
Unconditional: writes: x - - - 0 0 x x x
Conditional: writes: - - - - 0 0 x x x

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Example

.
.
. DB10
OPN
.
.
.
MCRA
.
. DB 8
. SFB 8 Q 4.0
EN ENO
M11.0 REQ DONE READY
ID ERROR M10.0
R_ID STATUS
CODE
SD_1
DW12
SD_2
DW14
SD_3
DW16
SD_4

DB10
OPN

The Ladder rungs shown above are program sections from a function block written
by a user. In this FB, DB10 is opened and MCR functionality is activated. If the
unconditional call of SFB8 is executed, the following occurs:
The return address of the calling FB plus selection data for DB10 and for the
instance data block for the calling FB are saved. The MA bit, set to "1" in the MCRA
instruction, is pushed to the B stack and then set to "0" for the called block
(SFB8). Program processing continues in SFB8. When SFB8 is finished, program
processing returns to the calling FB. The MA bit is restored and the instance data
block of the user-written FB becomes the current instance DB. If the SFB8 is
processed correctly, ENO = "1" and therefore Q4.0 = "1".

Note
When opening an FB or SFB, the number of the previously opened DB is lost. The
required DB has to be reopened.

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6.6 CALL_SFC Call System FC from Box

Symbol

SFC no.

EN ENO

The symbol depends on the SFC (whether it has parameters and how many of
them). It must have EN, ENO, and the name or number of the SFC.

Parameter Data Type Memory Area Description

EN BOOL - Enable input
ENO BOOL - Enable output
SFC no. BLOCK_SFC - Number of SFC; range depends
on CPU

Description
CALL_SFC (Call a System Function from a Box) is used to call an SFC. The call is
executed if EN is "1". If CALL_SFC is executed,
The return address of the calling block is stored,
The previous local data area is replaced by the current local data area,
The MA bit (active MCR bit) is shifted to the B stack,
A new local data area for the called system function is created.
After this, program processing continues in the called SFC. ENO is "1" if the SFC
was called (EN = "1") and no error occurs.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
Unconditional: writes: x - - - 0 0 x x x
Conditional: writes: - - - - 0 0 x x x

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Example

.
.
. DB10
OPN
.
.
.
MCRA
.
.
. SFC20 Q 4.0
EN ENO
DBDW12 SRCBLK RET_VAL MW10
. DSTBLK
[Link]
.
.

The Ladder rungs shown above are program sections from a function block written
by a user. In this FB, DB10 is opened and MCR functionality is activated. If the
unconditional call of SFC20 is executed, the following occurs:
The return address of the calling FB plus selection data for DB10 and for the
instance data block for the calling FB are saved. The MA bit, set to "1" in the MCRA
instruction, is pushed to the B stack and then set to "0" for the called block
(SFC20). Program processing continues in SFC20. When SFC20 is finished,
program processing returns to the calling FB. The MA bit is restored.
After processing the SFC20, the program is continued in the calling FB depending
on the ENO:
ENO = "1" Q4.0 = "1"
ENO = "0" Q4.0 = "0"

Note
After returning to the calling block, the previously open DB is not always open
again. Please make sure you read the note in the README file.

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6.7 Call Multiple Instance

Symbol

#Variable
name
EN ENO

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input
ENO BOOL I, Q, M, L, D Enable output
#Variable name FB, SFB - Name of multiple instance

Description
A multiple instance is created by declaring a static variable with the data type of a
function block. Only multiple instances that have already been declared are included
in the program element catalog. The symbol for a multiple instance varies depending
on whether and how many parameters are present. EN, ENO and the variable name
are always present.

Status word
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - 0 0 x x x

6.8 Call Block from a Library

The libraries available in the SIMATIC Manager can be used here to select a block
that
Is integrated in your CPU operating system ("Standard Library" library for
STEP 7 projects in version 3 and "stdlibs (V2)" for STEP 7 projects in
version 2)
You saved yourself in a library because you wanted to use it a number of
times.

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7 Overview of All LAD Instructions

7.1 LAD Instructions Sorted According to English

Mnemonics (International)

English German Program Elements Description

Mnemonics Mnemonics Catalog
---| |--- ---| |--- Bit logic Instruction Normally Open Contact (Address)
---|/|--- ---|/|--- Bit logic Instruction Normally Closed Contact (Address)
---( ) ---( ) Bit logic Instruction Output Coil
---(#)--- ---(#)--- Bit logic Instruction Midline Output
==0 ---| |--- ==0 ---| |--- Status bits Result Bit Equal 0
>0 ---| |--- >0 ---| |--- Status bits Result Bit Greater Than 0
>=0 ---| |--- >=0 ---| |--- Status bits Result Bit Greater Equal 0
<=0 ---| |--- <=0 ---| |--- Status bits Result Bit Less Equal 0
<0 ---| |--- <0 ---| |--- Status bits Result Bit Less Than 0
<>0 ---| |--- <>0 ---| |--- Status bits Result Bit Not Equal 0
ABS ABS Floating point Establish the Absolute Value of a Floating-Point
Instruction Number
ACOS ACOS Floating point Establish the Arc Cosine Value
Instruction
ADD_DI ADD_DI Integer Math Add Double Integer
Instruction
ADD_I ADD_I Integer Math Add Integer
Instruction
ADD_R ADD_R Floating point Add Real
Instruction
ASIN ASIN Floating point Establish the Arc Sine Value
Instruction
ATAN ATAN Floating point Establish the Arc Tangent Value
Instruction
BCD_DI BCD_DI Convert BCD to Double Integer
BCD_I BCD_I Convert BCD to Integer
BR ---| |--- BIE ---| |--- Status bits Exception Bit Binary Result
----(CALL) ----(CALL) Program control Call FC SFC from Coil (without Parameters)
CALL_FB CALL_FB Program control Call FB from Box
CALL_FC CALL_FC Program control Call FC from Box
CALL_SFB CALL_SFB Program control Call System FB from Box

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English German Program Elements Description

Mnemonics Mnemonics Catalog
CALL_SFC CALL_SFC Program control Call System FC from Box
----(CD) ----(ZR) Counters Down Counter Coil
CEIL CEIL Convert Ceiling
CMP >=D CMP >=D Compare Compare Double Integer (==, <>, >, <, >=, <=)
CMP >=I CMP >=I Compare Compare Integer (==, <>, >, <, >=, <=)
CMP >=R CMP >=R Compare Compare Real (==, <>, >, <, >=, <=)
COS COS Floating point Establish the Cosine Value
Instruction
----(CU) ---( ZV ) Counters Up Counter Coil
DI_BCD DI_BCD Convert Double Integer to BCD
DI_R DI_R Convert Double Integer to Floating-Point
DIV_DI DIV_DI Integer Math Divide Double Integer
Instruction
DIV_I DIV_I Integer Math Divide Integer
Instruction
DIV_R DIV_R Floating point Divide Real
Instruction
EXP EXP Floating point Establish the Exponential Value
Instruction
FLOOR FLOOR Convert Floor
I_BCD I_BCD Convert Integer to BCD
I_DI I_DI Convert Integer to Double Integer
INV_I INV_I Convert Ones Complement Integer
INV_DI INV_DI Convert Ones Complement Double Integer
---(JMP) ---(JMP) Jumps Unconditional Jump
---(JMP) ---(JMP) Jumps Conditional Jump
---(JMPN) ---(JMPN) Jumps Jump-If-Not
LABEL LABEL Jumps Label
LN LN Floating point Establish the Natural Logarithm
Instruction
---(MCR>) ---(MCR>) Program control Master Control Relay Off
---(MCR<) ---(MCR<) Program control Master Control Relay On
---(MCRA) ---(MCRA) Program control Master Control Relay Activate
---(MCRD) ---(MCRD) Program control Master Control Relay Deactivate
MOD_DI MOD_DI Integer Math Return Fraction Double Integer
Instruction
MOVE MOVE Move Assign a Value
MUL_DI MUL_DI Integer Math Multiply Double Integer
Instruction
MUL_I MUL_I Integer Math Multiply Integer
Instruction
MUL_R MUL_R Floating point Multiply Real
Instruction
---( N )--- ---( N )--- Bit logic Instruction Negative RLO Edge Detection
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English German Program Elements Description

Mnemonics Mnemonics Catalog
NEG NEG Bit logic Instruction Address Negative Edge Detection
NEG_DI NEG_DI Convert Twos Complement Double Integer
NEG_I NEG_I Convert Twos Complement Integer
NEG_R NEG_R Convert Negate Floating-Point Number
---| NOT |--- ---| NOT |--- Bit logic Instruction Invert Power Flow
---( OPN ) ---( OPN ) DB call Open Data Block: DB or DI
OS ---| |--- OS ---| |--- Status bits Exception Bit Overflow Stored
OV ---| |--- OV ---| |--- Status bits Exception Bit Overflow
---( P )--- ---( P )--- Bit logic Instruction Positive RLO Edge Detection
POS POS Bit logic Instruction Address Positive Edge Detection
---( R ) ---( R ) Bit logic Instruction Reset Coil
---(RET) ---(RET) Program control Return
ROL_DW ROL_DW Shift/Rotate Rotate Left Double Word
ROR_DW ROR_DW Shift/Rotate Rotate Right Double Word
ROUND ROUND Convert Round to Double Integer
RS RS Bit logic Instruction Reset-Set Flip Flop
---( S ) ---( S ) Bit logic Instruction Set Coil
---( SAVE ) ---( SAVE ) Bit logic Instruction Save RLO into BR Memory
---( SC ) ---( SZ ) Counters Set Counter Value
S_CD Z_RUECK Counters Down Counter
S_CU Z_VORW Counters Up Counter
S_CUD ZAEHLER Counters Up-Down Counter
---( SD ) ---( SE ) Timers On-Delay Timer Coil
---( SE ) ---( SV ) Timers Extended Pulse Timer Coil
---( SF ) ---( SA ) Timers Off-Delay Timer Coil
SHL_DW SHL_DW Shift/Rotate Shift Left Double Word
SHL_W SHL_W Shift/Rotate Shift Left Word
SHR_DI SHR_DI Shift/Rotate Shift Right Double Integer
SHR_DW SHR_DW Shift/Rotate Shift Right Double Word
SHR_I SHR_I Shift/Rotate Shift Right Integer
SHR_W SHR_W Shift/Rotate Shift Right Word
SIN SIN Floating point Establish the Sine Value
Instruction
S_ODT S_EVERZ Timers On-Delay S5 Timer
S_ODTS S_SEVERZ Timers Retentive On-Delay S5 Timer
S_OFFDT S_AVERZ Timers Off-Delay S5 Timer
---( SP ) ---( SI ) Timers Pulse Timer Coil
S_PEXT S_VIMP Timers Extended Pulse S5 Timer
S_PULSE S_IMPULS Timers Pulse S5 Timer
SQR SQR Floating point Establish the Square
Instruction

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English German Program Elements Description

Mnemonics Mnemonics Catalog
SQRT SQRT Floating point Establish the Square Root
Instruction
SR SR Bit logic Instruction Set-Reset Flip Flop
---( SS ) ---( SS ) Timers Retentive On-Delay Timer Coil
SUB_DI SUB_DI Integer Math Subtract Double Integer
Instruction
SUB_I SUB_I Integer Math Subtract Integer
Instruction
SUB_R SUB_R Floating point Subtract Real
Instruction
TAN TAN Floating point Establish the Tangent Value
Instruction
TRUNC TRUNC Convert Truncate Double Integer Part
UO ---| |--- UO ---| |--- Status bits Exception Bit Unordered
WAND_DW WAND_DW Word logic AND Double Word
Instruction
WAND_W WAND_W Word logic AND Word
Instruction
WOR_DW WOR_DW Word logic OR Double Word
Instruction
WOR_W WOR_W Word logic OR Word
Instruction
WXOR_DW WXOR_DW Word logic Exclusive OR Double Word
Instruction
WXOR_W WXOR_W Word logic Exclusive OR Word
Instruction

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8 Programming Examples
8.1 Example: Bit Logic Instructions

Example 1: Controlling a Conveyor Belt

The following figure shows a conveyor belt that can be activated electrically. There
are two push button switches at the beginning of the belt: S1 for START and S2 for
STOP. There are also two push button switches at the end of the belt: S3 for START
and S4 for STOP. It possible to start or stop the belt from either end. Also, sensor S5
stops the belt when an item on the belt reaches the end.

Sensor S5

S1 O Start S3 O Start
S2 O Stop S4 O Stop
MOTOR_ON

Absolute and symbolic Programming

You can write a program to control the conveyor belt using absolute values or
symbols that represent the various components of the conveyor system.
You need to make a symbol table to correlate the symbols you choose with
absolute values (see the STEP 7 Online Help).

System Component Absolute Address Symbol Symbol Table

Push Button Start Switch I 1.1 S1 I 1.1 S1
Push Button Stop Switch I 1.2 S2 I 1.2 S2
Push Button Start Switch I 1.3 S3 I 1.3 S3
Push Button Stop Switch I 1.4 S4 I 1.4 S4
Sensor I 1.5 S5 I 1.5 S5
Motor Q 4.0 MOTOR_ON Q 4.0 MOTOR_ON

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Ladder Logic Program to control the conveyor belt

Network 1: Pressing either start switch turns the motor on.

S1
I 1.1 Q 4.0
S

S3
I 1.3

Network 2: Pressing either stop switch or opening the normally closed contact at
the end of the belt turns the motor off.

S2
I 1.2 Q 4.0
R

S4
I 1.4

S5
I 1.5

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Example 2: Detecting the Direction of a Conveyor Belt

The following figure shows a conveyor belt that is equipped with two photoelectric
barriers (PEB1 and PEB2) that are designed to detect the direction in which a
package is moving on the belt. Each photoelectric light barrier functions like a
normally open contact.

Q 4.0 PEB2 PEB1 Q 4.1

Absolute and symbolic Programming

You can write a program to activate a direction display for the conveyor belt system
using absolute values or symbols that represent the various components of the
conveyor system.
You need to make a symbol table to correlate the symbols you choose with
absolute values (see the STEP 7 Online Help).

System Component Absolute Address Symbol Symbol Table

Photoelectric barrier 1 I 0.0 PEB1 I 0.0 PEB1
Photoelectric barrier 2 I 0.1 PEB2 I 0.1 PEB2
Display for movement to right Q 4.0 RIGHT Q 4.0 RIGHT
Display for movement to left Q 4.1 LEFT Q 4.1 LEFT
Pulse memory bit 1 M 0.0 PMB1 M 0.0 PMB1
Pulse memory bit 2 M 0.1 PMB2 M 0.1 PMB2

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Ladder Logic Program for Detecting the Direction of a Conveyor Belt

Network 1: If there is a transition in signal state from 0 to 1 (positive edge) at input I
0.0 and, at the same time, the signal state at input I 0.1 is 0, then the package on
the belt is moving to the left.

PEB1 PMB1 PEB2 LEFT

I 0.0 M 0.0 I 0.1 Q 4.1
P S

Network 2: If there is a transition in signal state from 0 to 1 (positive edge) at input I

0.1 and, at the same time, the signal state at input I 0.0 is 0, then the package on the
belt is moving to the right. If one of the photoelectric light barriers is broken, this
means that there is a package between the barriers.

PEB2 PMB2 PEB1 RIGHT

I 0.1 M 0.1 I 0.0 Q 4.0
P S

Network 3: If neither photoelectric barrier is broken, then there is no package

between the barriers. The direction pointer shuts off.

PEB1 PEB2 RIGHT

I 0.0 I 0.1 Q 4.0
R

LEFT
Q 4.1
R

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8.2 Example: Timer Instructions

Clock Pulse Generator
You can use a clock pulse generator or flasher relay when you need to produce a
signal that repeats periodically. A clock pulse generator is common in a signalling
system that controls the flashing of indicator lamps.
When you use the S7-300, you can implement the clock pulse generator function by
using time-driven processing in special organization blocks. The example shown in
the following ladder logic program, however, illustrates the use of timer functions to
generate a clock pulse. The sample program shows how to implement a
freewheeling clock pulse generator by using a timer.

Ladder Logic Program to Generate a Clock Pulse (pulse duty factor 1:1)

Network 1: If the signal state of timer T1 is 0, load the time value 250 ms into T1
and start T1 as an extended-pulse timer.

M0.2 T1
SE
S5T#250MS

Network 2: The state of the timer is saved temporarily in an auxiliary memory

marker.

T1 M0.2

Network 3: If the signal state of timer T1 is 1, jump to jump label M001.

M0.2 M001
JMP

Network 4: When the timer T1 expires, the memory word 100 is incremented by 1.

ADD_I
EN ENO
MW100 IN1 OUT MW100
1 IN2

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Network 5: The MOVE instruction allows you to output the different clock
frequencies at outputs Q12.0 through Q13.7.

M001

MOVE
EN ENO
MW100 IN OUT AW12

Signal Check
A signal check of timer T1 produces the following result of logic operation (RLO) for
opener M0.2.

1
0
250 ms

As soon as the time runs out, the timer is restarted. Because of this, the signal
check made by ––| / |–– M0.2 produces a signal state of 1 only briefly.
The negated (inverted) RLO:

1
0
250 ms

Every 250 ms the RLO bit is 0. The jump is ignored and the contents of memory
word MW100 is incremented by 1.

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Achieving a Specific Frequency

From the individual bits of memory bytes MB101 and MB100 you can achieve the
following frequencies:

Bits of MB101/MB100 Frequency in Hz Duration

M 101.0 2.0 0.5 s (250 ms on / 250 ms off)
M 101.1 1.0 1s (0.5 s on / 0.5 s off)
M 101.2 0.5 2s (1 s on / 1 s off)
M 101.3 0.25 4s (2 s on / 2 s off)
M 101.4 0.125 8s (4 s on / 4 s off)
M 101.5 0.0625 16 s (8 s on / 8 s off)
M 101.6 0.03125 32 s (16 s on / 16 s off)
M 101.7 0.015625 64 s (32 s on / 32 s off)
M 100.0 0.0078125 128 s (64 s on / 64 s off)
M 100.1 0.0039062 256 s (128 s on / 128 s off)
M 100.2 0.0019531 512 s (256 s on / 256 s off)
M 100.3 0.0009765 1024 s (512 s on / 512 s off)
M 100.4 0.0004882 2048 s (1024 s on / 1024 s off)
M 100.5 0.0002441 4096 s (2048 s on / 2048 s off)
M 100.6 0.000122 8192 s (4096 s on / 4096 s off)
M 100.7 0.000061 16384 s (8192 s on / 8192 s off)

Signal states of the Bits of Memory MB 101

Scan Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Time Value
Cycle in ms
0 0 0 0 0 0 0 0 0 250
1 0 0 0 0 0 0 0 1 250
2 0 0 0 0 0 0 1 0 250
3 0 0 0 0 0 0 1 1 250
4 0 0 0 0 0 1 0 0 250
5 0 0 0 0 0 1 0 1 250
6 0 0 0 0 0 1 1 0 250
7 0 0 0 0 0 1 1 1 250
8 0 0 0 0 1 0 0 0 250
9 0 0 0 0 1 0 0 1 250
10 0 0 0 0 1 0 1 0 250
11 0 0 0 0 1 0 1 1 250
12 0 0 0 0 1 1 0 0 250

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8.3 Example: Counter and Comparison Instructions

Storage Area with Counter and Comparator

The following figure shows a system with two conveyor belts and a temporary
storage area in between them. Conveyor belt 1 delivers packages to the storage
area. A photoelectric barrier at the end of conveyor belt 1 near the storage area
determines how many packages are delivered to the storage area. Conveyor belt 2
transports packages from the temporary storage area to a loading dock where trucks
take the packages away for delivery to customers. A photoelectric barrier at the end
of conveyor belt 2 near the storage area determines how many packages leave the
storage area to go to the loading dock. A display panel with five lamps indicates the
fill level of the temporary storage area.

Display Panel

Storage area Storage area Storage area Storage area Storage area
empty not empty 50% full 90% full Filled to capacity

(Q 12.0) (Q 12.1) (Q 15.2) (Q 15.3) (Q 15.4)

Packages in I 12.0 I 12.1 Packages out

Temporary
storage area
for 100
packages

Conveyor belt 1 Conveyor belt 2

Photoelectric barrier 1 Photoelectric barrier 2

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Ladder Logic Program that Activates the Indicator Lamps on the Display Panel
Network 1: Counter C1 counts up at each signal change from “0” to “1” at input CU
and counts down at each signal change from “0” to “1” at input CD. With a signal
change from “0” to ”1” at input S, the counter value is set to the value PV. A signal
change from “0” to “1” at input R resets the counter value to “0”. MW200 contains the
current counter value of C1. Q12.1 indicates “storage area not empty”.

C1
Q 12.1
I 12.0 S_CUD
CU Q
I 12.1
CD
I 12.2
S

C#10 PV CV MW210
I 12.3
R CV_BCD MW200

Network 2: Q12.0 indicates ”storage area empty”.

Q 12.1 Q 12.1

Network 3: If 50 is less than or equal to the counter value (in other words if the
current counter value is greater than or equal to 50), the indicator lamp for “storage
area 50% full” is lit.

CMP Q 15.2
<= 1
50 IN1

MW210 IN2

Network 4: Network 4: If the counter value is greater than or equal to 90, the
indicator lamp for “storage area 90% full” is lit.

Q 15.3
CMP
>= 1
MW210
IN1
90
IN2

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Network 5: If the counter value is greater than or equal to 100, the indicator lamp
for “storage area full” is lit.

CMP Q 15.4
>= 1
MW210 IN1

100 IN2

8.4 Example: Integer Math Instructions

Solving a Math Problem

The sample program shows you how to use three integer math instructions to
produce the same result as the following equation:
MW4 = ((IW0 + DBW3) x 15) / MW0

Ladder Logic Program

Network 1: Open Data Block DB1.

DB1
OPN

Network 2: Input word IW0 is added to shared data word DBW3 (data block must be
defined and opened) and the sum is loaded into memory word MW100. MW100 is
then multiplied by 15 and the answer stored in memory word MW102. MW102 is
divided by MW0 with the result stored in MW4.

ADD_I MUL_I DIV_I

EN ENO EN ENO EN ENO

IW0 IN1 MW100 IN1 MW102 IN1

DBW3 IN2 OUT MW100 15 IN2 OUT MW102 MW0 IN2 OUT MW4

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8.5 Example: Word Logic Instructions

Heating an Oven
The operator of the oven starts the oven heating by pushing the start push button.
The operator can set the length of time for heating by using the thumbwheel
switches shown in the figure. The value that the operator sets indicates seconds in
binary coded decimal (BCD) format.

Thumbwheels for setting BCD digits

Oven

4 4 4

Heat 7.... ...0 7... ...0 Bits

Q 4.0 XXXX 0001 1001 0001 IW 0

IB0 IB1 Bytes

Start push button I 0.7

System Component Absolute Address

Start Push Button I 0.7
Thumbwheel for ones I 1.0 to I 1.3
Thumbwheel for tes I 1.4 to I 1.7
Thumbwheel for hundreds I 0.0 to I 0.3
Heating starts Q 4.0

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Ladder Logic Program

Network 1: If the timer is running, then turn on the heater.

T1 Q 4.0

Network 2: If the timer is running, the Return instruction ends the processing here.

T1
RET

Network 3: Mask input bits I 0.4 through I 0.7 (that is, reset them to 0). These bits of
the thumbwheel inputs are not used. The 16 bits of the thumbwheel inputs are
combined with W#16#0FFF according to the (Word) And Word instruction. The
result is loaded into memory word MW1. In order to set the time base of seconds,
the preset value is combined with W#16#2000 according to the (Word) Or Word
instruction, setting bit 13 to 1 and resetting bit 12 to 0.

WAND_W WOR_W
EN ENO EN ENO

IW0 IN1 OUT MW1 MW1 IN1 OUT MW2

W#16#FFF IN2 W#16#2000 IN2

Network 4: Start timer T 1 as an extended pulse timer if the start push button is
pressed, loading as a preset value memory word MW2 (derived from the logic
above).

I 0.7 T1
SE
MW2

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