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Digital Circuits
Assignment 5- Week 5
TYPE OF QUESTION: MCQ
Number of questions: 15 Total mark: 15 X 1 = 15
Question 1:
Find the number of 2 x 1 MUX (multiplexers) required to implement 16 x 1 MUX
a) 15
b) 20
c) 5
d) 9
Answer: (A)
Detailed Solution:
Step 1: Understanding
A 16×1 multiplexer has:
16 inputs
1 output
4 select lines (because 2^4 = 16)
A 2×1 MUX selects between 2 inputs using 1 select line.
Step 2: Breaking down
We can think of this as building in levels:
1. Level 1: Combine 16 inputs into 8 outputs
o Each 2×1 MUX takes 2 inputs → 1 output
o For 16 inputs, we need 16/2=8 MUXes.
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2. Level 2: Combine 8 outputs into 4 outputs
o Need 8/2=4 MUXes.
3. Level 3: Combine 4 outputs into 2 outputs
o Need 4/2=2 MUXes.
4. Level 4: Combine 2 outputs into 1 output
o Need 2/2=1 MUX.
Step 3: Total
Total number of 2×1 MUXes:
8+4+2+1=15
QUESTION 2:
Consider the 2-bit multiplexer (MUX) shown in the figure. For OUTPUT to be the XOR of C
and D, the values for A0, A 1, A 2 and A3 are ___________.
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a) A₀ = 1, A₁ = 0, A₂ = 1, A₃ = 1
b) A₀ = 1, A₁ = 0, A₂ = 1, A₃ = 0
c) A₀ = 0, A₁ = 1, A₂ = 1, A₃ = 0
d) A₀ = 1, A₁ = 1, A₂ = 0, A₃ = 0
Answer: (C)
Detailed Solution:
QUESTION 3:
The logical function realized by the circuit shown below is:
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A) Y = P Q
B) Y = P + Q
C) Y =
D) Y = +
Correct Answer: (A)
Detailed Solution:
QUESTION 4:
The number of select lines for 32 to 1 multiplexer is
a) 4
b) 5
c) 16
d) 6
Correct Answer: b
Detailed Solution:
The number of select lines for 32 (25) to select one input among them, total (log232) or 5
select lines are required.
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QUESTION 5:
Identify the following circuit
a) 2 to 4 Decoder
b) 1:4 De-multiplexer
c) 4-2 Encoder
d) None
Correct Answer: (b)
Detailed Solution:
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Indian Institute of Technology Kharagpur
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
QUESTION 6:
Octal to Binary Encoders are made by three _____________ gates?
a) NOT gate
b) OR gate
c) AND gate
d) NAND gate
Correct Answer: (b)
Detailed Solution:
Encoders are made by Three OR gates. Octal to Binary Encoder has eight inputs, A7 to A0
and three outputs B2, B1 and B0.
The Truth table of octal to the binary encoder is shown below:
Inputs Outputs
D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
0 0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 1 0 0 0 1
0 0 0 0 0 1 0 0 0 1 0
0 0 0 0 1 0 0 0 0 1 1
0 0 0 1 0 0 0 0 1 0 0
0 0 1 0 0 0 0 0 1 0 1
0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1
A0 = D1 + D3 + D5 + D7
A1 = D2 + D3 + D6 + D7
A2 = D4 +D5 + D6 + D7
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QUESTION 7:
In binary coded decimal (BCD) system, the decimal number 81 is represented as
a) 10000001
b) 10100010
c) 01010001
d) 00011000
Correct Answer: (a)
Detailed Solution:
________
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QUESTION 8:
The excess-3 code of decimal 7 is represented by
a) 1001
b) 1100
c) 1011
d) 1010
Correct Answer: ( d)
Detailed Solution:
Write 7 in 4-bit binary (BCD):
7=(0111)2
Add 3 (0011):
0111 (7)
+ 0011 (3)
-------
1010 (result)
Do the binary addition bit by bit (LSB → MSB):
LSB: 1+1=0 carry 1
Next bit: 1+1+carry 1=3=1 carry 1
Next bit: 1+0+carry 1=2=0 carry 1
MSB: 0+0+carry 1=1 carry 0
So the final 4-bit XS-3 code is 1010.
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QUESTION 9:
The logic function implemented by the circuit below is (ground implies a logic "0"
a) F = AND (P, Q)
b) F = OR (P, Q)
c) F = XNOR (P, Q)
d) F = XOR (P, Q)
Answer: (D)
Detailed Solution:
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QUESTION 10:
The number (762)10 would be represented in 8421 code or BCD code as
a) (0010 0110 0111)
b) (1111 1101 0101)
c) (0111 0110 0010)
d) (1000 0100 0010)
Correct Answer: c
Detailed Solution:
In 8421 or Binary Coded Decimal (BCD), each decimal digit is represented with a group of
4-binary bits group.
(7 6 2 )10
(0111 0110 0010)
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QUESTION 11:
The Boolean expression for the output of the multiplexer shown below is:
A)
B)
C) P+Q+R
D)
Correct Answer: (B)
Detailed Solution:
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QUESTION 12:
The equivalent Gray Code of the binary number (1011)2 is
a) (1101)
b) (1011)
c) (1110)
d) (1100)
Correct Answer: (c)
Detailed Solution:
Step 1: The most significant bit (MSB) of the Gray code is the same as the MSB of the binary
number.
MSB = 1 → Gray MSB = 1
Step 2: For the remaining bits, perform XOR between the current binary bit and the
previous binary bit.
Binary: 1 0 1 1
1⊕0=1
0⊕1=1
1⊕1=0
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Step 3: Combine results:
Gray code = 1 1 1 0
QUESTION 13:
The number of (2 to 4) Decoders required to implement (4 to 16) Decoder is
a) 6
b) 4
c) 5
d) 7
Correct Answer: c
Detailed Solution:
Step 1 – Understanding the structure
A 4-to-16 decoder has 4 input lines and 16 output lines.
We can split the inputs into two groups:
o Upper 2 bits → Used for enabling one of four decoders.
o Lower 2 bits → Used as actual inputs to the final decoding stage.
Step 2 – Implementation
1. First stage: Use one 2-to-4 decoder to decode the upper 2 bits into 4 enable signals.
2. Second stage: Use four 2-to-4 decoders, each enabled by one of the outputs from the
first stage, to decode the lower 2 bits.
Step 3 – Total decoders needed
First stage: 1 decoder
Second stage: 4 decoders
Total = 1 + 4 = 5 decoders
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QUESTION 14:
Perform the addition of (30)10 and (15)10 using the BCD scheme. The correct BCD result is,
A) 0100 0101
B) 0101 0100
C) 0011 0100
D) 1000 0101
Correct Answer: ( A)
Detailed Solution:
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NPTEL Online Certification Courses
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QUESTION 15:
The Boolean function f implemented as shown in the figure using two input multiplexer is:
Correct Answer: (A)
Detailed Solution:
The output of the 1st MUX will be ,
The final output will be:
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