INTRODUCTION

Because of their distinctive advantages, mainly due to their excellent harmonic

performance at higher voltages, independent control of active and reactive power in
transmission lines, voltage control in wind farms, high modularity in their construction,
simple scalability, usage of low cost filters, robust control schemes, and wider applications in
HVDC, MMC based Voltage Source Converters (VSCs) have become the cost effective and
high power quality alternative for industry. This article presents the brief review on MMC.
More than 120 articles are reviewed and classified in to six major categories. Among those,
some of them are further categorized into several categories as shown in Fig.1.1.
(i) The first one is on different topologies proposed in this area since from its original
schematics and their comparative study on technical considerations.
(ii) While the second one is on pulse width modulation (PWM) strategies applied to MMC. It
is subcategorized in to seven areas depends up on their practical applicability and dominant
contribution such as phase disposition(PD) PWM, phase opposition disposition(POD) PWM,
alternate phase opposition disposition(APOD) PWM, carrier phase shifted(CPS) PWM,
selective harmonic elimination(SHE) modulation, nearest level control(NLC) modulation and
pulse dropping switching(PDS) scheme.
(iii) The third category deals with associated voltage balancing issues and their schemes to
resolve.
(iv) Fourth category deals with circulating current control (CCC) schemes.

Fig.1.1 Categorization of Modular Multi Level Converters

(v) The fifth category deals with fault management system and last is on its applications.

1.1 State of the art

 The ever increasing demand of industry for stability, adjustability and Accuracy in
control of power electronic equipments at very high voltages led to the development of
relatively less total harmonic distortion (THD) based modern power electronic static
converters. Static power electronic equipment that converters dc power into ac power at
desired output voltage and frequency is called an inverter. Inverters can be broadly classified
into two types; voltage source inverters (VSIs) and current source inverters (CSIs). A voltage
source inverter has stiff dc voltage source at its input terminals and whereas current source
inverter is fed from a stiff dc current source. VSIs using transistors, like Bipolar Junction
Transistor (BJTs), Metal oxide semiconductor field effect transistor (MOSFETs), Insulated
Gate Bipolar Junction Transistors (IGBTs) can be turned off by the control of their base/gate
current. Switching off of the devices with the help of their gate or base currents is called self
commutation. Self-commutated inverters using Gate Turn off Thyristors (GTOs), IGBTs and
Transistors do not require additional commutation circuitry. This reduces the complexity and
cost of the self-commutated inverter circuits and enhances the reliability of their operation.
For practical purposes, inverters can be categorized in to two ways such as single phase
inverters (SPIs) and three phase inverters (TPIs). For providing adjustable frequency power
to industrial applications, TPIs are more common than SPIs. The transistor family of devices
is now very widely used in inverter circuits. Presently, the use of IGBTs in single-phase and
three-phase inverters is on the rise. A large capacitor Is connected at the input terminals tends
to make the input dc voltage constant. This capacitor also suppresses the harmonics fed back
to the dc source. Although solid state power electronic switches, such as the IGBTs have
brought notified variation in control techniques, but the main disadvantage is that they
produce multiple frequency components called as harmonics. Harmonic voltages can cause
an unacceptable disturbance on the supply network and adversely affect the operation of
other connected electrical equipment. Hence there is requirement to reduce the harmonic
content to an acceptable level. One should design a converter with proper controllers by
keeping THD within limits. Harmonic currents can never be totally eliminated from an
electrical system. They can, however, be very significantly reduced by using a harmonic
controllers. All power electronic converters produces complex waveforms, that can be
resolved into a series of sinusoidal waves of various frequencies, hence any complex
waveform is the sum of a number of odd or even harmonics, that can be eliminated by
properly tuning the controller/adding the respective harmonic filters. In order to reduce the
harmonic level of an inverter output current the switching frequency in its operation must be
increased. However in the field of high voltage, high power applications the switching
frequency of the power device has to be restricted below 1kHz, due to the increase in the
switching losses. So harmonic reduction by raised switching frequency of a two-level inverter
becomes more difficult in high power applications. In addition, as the dc link voltage of this
inverter is limited by voltage ratings of switching devices, the problematic series connection
of switching devices is required to raise the dc link voltage. By series connection, the
maximum allowable switching frequency has to be more lowered, thus the harmonic
reduction becomes more difficult. From the aspect of harmonic reduction and high dc link
voltage level; multi -level approach seems to be the most promising alternative. The
harmonic contents of a multi-level inverter are less than that of an ordinary bridge inverter at
the same switching frequency and the blocking voltage of the switching device is fraction of
the dc-link voltage. So the multi-level inverter topology is generally used in realizing the high
Performance in high voltage ac drive systems, HVDC systems, FACTS tec. The most
attractive features of multilevel converters are as follows:
1) The device voltage stresses can be controlled due to the multilevel structure.
2) The unique structure of multilevel converters enables to attain high voltage levels without
use of the transformers.
3) As the number of levels increases, the harmonic distortion can be significantly reduced.
According to load requirement, component specification and improved output response, the
multilevel inverters (MLI) are mainly classified as
(i).Diode clamped multilevel inverter (DCMLI) (ii).Capacitor clamped (flying capacitor)
multilevel inverter (FCMLI) and (iii).Cascaded multilevel inverter(CMLI). The diode
clamped multilevel inverter has the advantages of high inverter efficiency, reduced usage of
filters and simpler control method. But this topology has some drawbacks such as excessive
use of clamping diodes, difficulty in controlling the real power flow in multi converter
systems and diode reverse recovery of clamping diodes would become a major design
challenge in high power applications. In FCMLI, a large number of capacitors are used to
clamp the voltage. This topology has the major advantages of capability to provide
uninterruptible power during power outages due to the use of large amounts of storage
capacitors, control of both real and reactive power, lower harmonic content and switch
combination redundancy. Inspite of these advantages this topology suffers with drawbacks of
excessive number of storage capacitors, inverter control can be very complicated and
switching losses are high for real power transmission. In CMLI, a series of H-bridge inverter
units are connected using separate dc sources which may be obtained from batteries, fuel
cells or solar cells. Unlike DCMLI and FCMLI, this topology requires least number of
components to achieve same voltage levels. It ensures optimized circuit layout and soft
switching techniques can be used to reduce the switching losses and device stresses. The only
drawback of this topology is that it needs separate dc sources thus limiting its applications.
For higher voltages DCMLI, FCMLI and CMCLI fails to operate due to their complexity and
associated problems as noted in literature [1-10]. Hence industry has chosen MMC as
promising way to deal with high voltage applications. Firstly, the concept of MMC was
introduced with no arm inductors. But due to uncontrollable arm currents researchers
introduced arm inductors in MMC. From then MMC has been used by many industries for
their applications [11-20]. Due to its vast applications in the industry a number of topologies
have been reported in literature. In order to generate the pulse pattern for MMC, various
modulation strategies have been proposed. The problem of capacitor voltage balancing is
observed mainly due to proper implementation of switching scheme as per upper and lower
arms of a leg of MMC. A number of balancing schemes has been reported in literature. In
most of topologies balancing the upper and lower arms of MMC became difficult and results
in flowing circulating currents in the legs of MMC. These circulating currents will create a lot
of losses in the arm inductors. To suppress the circulating currents number of articles has
been reported in literature. To design an efficient fault tolerant system, different schemes
have been proposed. Furthermore, a variety of emerging applications of MMC are presented
in this work.
 MMC TOPOLOGIES

In this chapter, different topologies of MMC are reviewed. Fig.2.1 shows the basic
schematic of three phase MMC. A three phase MMC consists of three legs which consists of
two arms: upper arm and lower arm. Each arm consists of N number of series connected sub
modules(SM) and an arm inductance. The sub modules are the building blocks of MMC.
Each sub module can be realized by different circuits as shown in fig.2.2.

Fig 2.1 schematic diagram of three phase MMC.

2.1 Half Bridge Sub Module

 As shown in Fig. 2.2 (a), this configuration has simple structure and low losses
compared to all other topologies. The output voltage is either equal to capacitor voltage or
zero. This configuration can provide only uni-polar output voltage [22-24].

2.2 Full Bridge Sub Module

As shown in Fig. 2.2 (b) by connecting two half bridge circuits in parallel, a full
bridge circuit is formed. It can provide bipolar output voltage. However, as the number of
switching devices is doubled as compared to half bridge, the power loss as well as the cost is
also doubled [22-24].

2.3 Clamped Double Sub Module

As shown in Fig. 2.2(c) it consists of two half bridge SM's, two additional diodes and
an IGBT. It can also provide bipolar output voltage. During normal operation, the IGBT
(switch 5) is always ON and the circuit appears like two half bridge SM's connected in series.
The losses for this circuit are more than that of half bridge and less than that of full bridge
circuit [22], [23].

2.4 Three Level Flying Capacitor Sub Module

The three level flying capacitor SM is shown in Fig. 2.2(d). It provides only unipolar
output voltage. The intermediate capacitor voltages must be balanced. Losses are similar to
that of half bridge circuit. This topology is not an attractive one due to its control complexity.

2.5 Three Level Neutral Point Clamped Sub Module

The three level neutral clamped circuit is shown in Fig. 2.2(e). It can provide only
unipolar output voltage. Losses are intermediate between half bridge circuit and full bridge
circuit [25]-[28].

2.6 five level cross connected sub module

As shown in fig.2.2(f) it is formed by connecting two half bridge SMs back to back by
two IGBTs. It can provide bipolar output voltage. By cross connecting configuration, more
number of voltage levels is possible. The losses are intermediate between half bridge and full
bridge circuits.
Fig2.2 various sub modules (a) half bridge (b) full bridge (c) clamped double (d) three level
flying capacitor (e) three level neutral point clamped (f) five level cross connected.
 A comparison of various sub module circuits in terms of number of switches, design
complexity, control complexity and losses is shown in table 2.1[29].
TABLE 2.1. Comparison of Various Sub Module Circuits
 MODULATION STRATEGIES

There are several modulation strategies to control the multi level converters. In a
broad perspective, they can be classified as: multi carrier PWM techniques and low frequency
modulation techniques. The multi carrier PWM techniques are further classified as: level
shifted PWM and phase shifted PWM. The multi carrier PWM techniques are most
commonly used. The advantage of multi carrier PWM strategies is that it can be easily
implemented to low voltage modules [18], [19]. The multi carrier based Pulse width
modulation is achieved by comparing the reference sinusoidal signal with high frequency
triangular carrier signal. To generate pulse pattern for N level converter N-1 carrier signals
are required. All the carrier signals have the peak to peak amplitude Ac and frequency fc. The
sinusoidal reference waveform has a frequency fr and peak to peak amplitude Ar. The
reference signal is positioned at the Centre of the carrier set and continuously compared with
the carriers. At every instant, whenever the magnitude of reference wave is greater than a
carrier wave the output goes to 1 and a positive ongoing pulse is generated. As the reference
falls below each carrier the output goes to 0 and a negative ongoing pulse is generated [30]-
[33]. In general the amplitude modulation index (ma) for level shifted PWM is given as:

Similarly, the amplitude modulation index for phase shifted PWM is given by:

The frequency modulation index (mf) for level shifted PWM and phase shifted
PWM is given as:

3.1 Phase Disposition PWM (PDPWM)

In this method all the carriers above and below zero reference line are in same phase. The
PDPWM is the widely used strategy for Modular Multilevel converters because it provides
load voltage and current with lower harmonic distortion. This technique is presented in Fig.
3.1[30]-[33].
Fig. 3.1 Phase disposition scheme

3.2 Phase opposition disposition PWM (PODPWM)

In this method all the carriers have the same frequency and equal amplitude. All the
carriers above the zero value reference are in phase among them and the carriers below zero
value reference are in phase opposition with respect to above carriers (180 degrees phase
shifted) as shown in Fig. 3.2 [30]- [33].

3.3 Alternate phase opposition disposition PWM (APODPWM)

In this method all the carriers have the same frequency and amplitude. All the carriers
have180 degrees phase shift between them as shown in Fig. 3.3 [30]-[33].
Fig. 3.3 Alternate phase opposition disposition scheme

3.4 Carrier Phase Shifted PWM (PSPWM)

The phase shifted multicarrier PWM technique has its performance parameters closest
to PDPWM strategy. All the carriers have same amplitude and frequency but the carriers are
displaced by shifting their phase as shown in Fig. 3.4. The carrier waves are phase shifted so
that the switching instants of different sub modules are offset in time, thus reducing the
harmonics in the output voltage. The phase shift can be done by choosing any delay but to
achieve minimum harmonic distortion the delay is given by (3.4), where TS is the switching
period and P indicates number of levels. This technique ensures substantial reduction in
losses as each sub module switches at only a fraction of the overall switching frequency.
Even though PSPWM is easy to implement the control becomes complex as the number of
modules increases. This can be overcome by lowering the switching frequency for individual
sub modules but it leads to voltage fluctuations in the sub module voltages [34]-[36].
Fig. 3.4 Carrier phase shifted PWM scheme

3.5 Selective Harmonic Elimination (SHE) Modulation

Fig. 3.5 shows a generalized symmetric stepped voltage waveform synthesized by a
(2m+1) level inverter, where m is the number of switching angles. By applying Fourier series
analysis to symmetric waveform, the amplitude of the even harmonics are zero and the
amplitude of odd harmonics are given by (3.5)

where VP is the Pth level of dc voltage, n is the odd harmonic order, m is the number of
switching angles. By properly selecting the switching angles, harmonic contents can be
removed. Since the low frequency harmonics are most predominant they are chosen for
elimination by properly selecting the switching angles. However, high frequency harmonics
can be removed by adding the filters. However, if the switching angles do not satisfy the
condition, this scheme no longer exists. The main disadvantage of this strategy is that it can
provide only a restricted range of modulation indexes. As a result, the total harmonic
distortion (THD) is increased drastically. To minimize the THD, a wide range of modulation
indexes must be achieved which can be made possible through a generalized selective
harmonic elimination scheme. In general, a stepped waveform, which comprises m switching
angles, can be divided into m modulation index levels. By using this technique, low
switching frequencies with minimized harmonics in the output waveforms can be achieved
with wide modulation indexes. A generalized harmonic expression for multilevel stepped
voltage has been derived and is expressed as (3.6):
Fig. 3.5 Selective harmonic elimination modulation

3.6 Nearest Level Control (NLC) Modulation

In this modulation technique, depending upon the number of modules to be inserted in
each arm the voltage level nearest to the desired voltage waveform is selected as shown in
Fig. 3.6. This method is easy to implement regardless of number of sub modules used and it
requires less computational efforts. The commanded number of inserted modules follows the
sinusoidal reference and will increase continuously until the reference reaches its peak value.
A module once inserted cannot be bypassed until the sinusoidal reference has reached the
peak and hence the module will be in inserted state for a half cycle before it can be bypassed.
The main drawback of this technique is that it creates large fluctuations in the sub module
voltages. This can be prevented by properly monitoring the individual sub module voltages
and inserting or bypassing the modules as required.
Fig. 3.6 Nearest level control modulation

3.7 Pulse dropping switching (PDS) scheme

Pulse dropping switching can be implemented by comparing a square wave with
triangular wave as shown in Fig. 3.7. The amplitude modulation index (ma) and frequency
modulation index (mf) are defined as: [42],[43]
Fig. 3.7 Pulse dropping switching scheme