IFT212 – Computer Architecture and Organization

Module 5

5 Addressing modes, stack operations and interrupts

Module outline

5.1 Addressing modes

5.2 Stack operations
5.3 Interrupts

Introduction
In the exploration of "Addressing Modes, Stack Operations, and Interrupts" within this
university course, we embark on a comprehensive journey into the intricacies of computer
architecture and operation. Commencing with an understanding of "Addressing Modes,"
this segment aims to elucidate the varied techniques employed by a computer's central
processing unit (CPU) to access data in memory, setting the foundation for efficient
information retrieval. Following this, attention shifts to "Stack Operations," where the
course navigates through the dynamic storage structure critical for managing data and
control flow during program execution. Subsequently, the focus extends to "Interrupts,"
exploring the mechanisms by which a computer responds to external stimuli, temporarily
diverting its attention to handle urgent tasks. By following this sequence, students will
gain not only a foundational comprehension of addressing modes but also insights into
the pivotal role of stack operations and interrupts in shaping the efficiency and
responsiveness of computing systems. Join us on this educational journey as we unravel
the intricacies of addressing modes, stack operations, and interrupts, fostering a
comprehensive understanding of the core components that govern computer
functionality.

Module learning outcomes

Upon completing this module, you should be able to:
MLO 1. Evaluate the efficiency and applicability of various Addressing Modes.
MLO 2. Apply Stack Operations in showcasing proficiency in the dynamic storage
structure
MLO 3. Design and implement Interrupt mechanisms and evaluate the impact of
interrupts on overall system responsiveness and multitasking efficiency.

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5.1 Addressing modes

 This refers to the different ways in which operands can be addressed, It is the way
of specifying the operand part of instruction. Addressing mode differ in the way the
address information of operands is specified.

 Addressing modes define how the operands (data) of an instruction are located.
They specify how the effective address of the data is calculated.
 Different addressing modes provide flexibility in accessing data, allowing for
efficient program execution.
 Addressing modes are crucial because they provide flexibility in accessing data,
which allows for efficient program execution. Different addressing modes offer
various ways to locate the operands (data) that instructions need, and by
understanding these modes, programmers can optimize how they access and
manipulate data, leading to better performance.

5.2 Types of Addressing Modes

 Immediate Addressing:
o The operand is a constant value given directly in the instruction.
o Example: MOV AX, 10 (Move the value 10 into register AX)
 Register Addressing:
o The operand is located in one of the CPU registers.
o Example: ADD AX, BX (Add the contents of register BX to register AX)
 Direct Addressing (Absolute Addressing):
o The operand's memory address is directly specified in the instruction.
o Example: LOAD AX, [1000] (Load the value from memory location 1000
into register AX)
 Indirect Addressing:
o The instruction specifies a memory location that holds the address of the
operand.
o Example: LOAD AX, [[1000]] (Load the value from the memory location
whose address is stored at memory location 1000 into register AX)
 Register Indirect Addressing:

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o The instruction specifies a register that holds the memory address of the
operand.
o Example: LOAD AX, [BX] (Load the value from the memory location
whose address is in register BX into register AX)
 Indexed Addressing:
o The address of the operand is calculated by adding a constant value to
the contents of a register (index register).
o Example: LOAD AX, [BX + 10] (Load the value from the memory location
whose address is the value in register BX plus 10 into register AX)
 Relative Addressing:
o The address of the operand is calculated relative to the program counter
(PC). This is commonly used for branch instructions.
o Example: JMP +10 (Jump to the instruction 10 bytes ahead of the current
instruction)
5.2 Stack Operations
 A stack is a Last-In, First-Out (LIFO) data structure.
 It is a memory area used to store temporary data, function parameters, return
addresses, and local variables.
 Two primary operations are performed on a stack:
o PUSH: Adds an item to the top of the stack.
o POP: Removes an item from the top of the stack.
 A stack pointer (SP) register keeps track of the current top of the stack.

An Illustration of Stack Operation: PUSH and POP

This illustration clarifies how data is added and removed from a stack, demonstrating the
LIFO principle and the role of the stack pointer. This shows how PUSH and POP
operations work on a stack:
Initial State:
 The stack is initially empty.
 The stack pointer (SP) points to the bottom of the stack (or the first available
slot).

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1. PUSH Operation:
 When an item (e.g., the value 'A') is pushed onto the stack:
1. The stack pointer (SP) is incremented to point to the next available slot.
2. The item ('A') is placed at the location pointed to by the SP.
2. PUSH Operation (Again):
 Another item (e.g., the value 'B') is pushed onto the stack:
1. The SP is incremented again.
2. The item ('B') is placed at the new location pointed to by the SP.

3. POP Operation:
 When an item is popped from the stack:
1. The item at the location pointed to by the SP ('B' in this case) is retrieved
(removed from the stack).
2. The SP is decremented to point to the previous item on the top of the
stack.

4. POP Operation (Again):

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 Another item is popped from the stack:

1. The item at the location pointed to by the SP ('A') is retrieved.
2. The SP is decremented again.

 LIFO: The last item pushed onto the stack is the first item popped off (Last-In,
First-Out).
 Stack Pointer (SP): The SP is crucial for keeping track of the top of the stack.
 Overflow and Underflow:
o Overflow: Occurs when you try to push an item onto a full stack.
o Underflow: Occurs when you try to pop an item from an empty stack.

Example Assembly Language instruction

PUSH AX ; Push the value in register AX onto the stack
PUSH BX ; Push the value in register BX onto the stack
POP CX ; Pop a value from the stack and store it in register CX (BX's value)
POP DX ; Pop a value from the stack and store it in register DX (AX's value)

5.3. Interrupts
 Interrupts are events that cause the CPU to temporarily suspend its current
execution and transfer control to a special routine called an interrupt handler or
interrupt service routine (ISR).

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 Interrupts are a powerful mechanism that significantly improves CPU efficiency

and system responsiveness. However, they also introduce complexity and
potential overhead. A well-designed interrupt system is essential for reliable and
efficient computer operation.
 Interrupts are used to handle events that require immediate attention, such as I/O
requests, hardware errors, or external signals.
Types of Interrupts
 Hardware Interrupts:
o Generated by external devices (e.g., keyboard, mouse, disk controller) to
signal an event.
 Software Interrupts (Exceptions):
o Generated by the CPU itself due to an exceptional condition during
program execution (e.g., division by zero, invalid memory access, or a
system call).
Interrupt Handling Process
1. An interrupt occurs.
2. The CPU saves the current state of the program (e.g., program counter,
registers) onto the stack.
3. The CPU jumps to the appropriate ISR.
4. The ISR handles the interrupt.
5. The ISR finishes and restores the saved state from the stack.
6. The CPU resumes the interrupted program.
Interrupt Vector Table (IVT)
 A table in memory that stores the addresses of the ISRs for different interrupt
types.
 Each interrupt type is assigned a unique number, which is used as an index into
the IVT to find the corresponding ISR address.
Advantages of Interrupts
 Increased CPU Efficiency:
o Interrupts allow the CPU to perform other tasks while waiting for I/O
devices to become ready.

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o Without interrupts, the CPU would have to constantly poll devices, wasting
valuable processing time.
 Faster Response to Events:
o Interrupts provide a quick way for devices to get the CPU's attention when
they need service.
o This enables the system to respond to time-critical events promptly.
 Improved System Responsiveness:
o Interrupts make the system more responsive to user actions and external
events.
o For example, when you press a key on the keyboard, an interrupt is
generated, and the system can quickly process your input.
 Support for Real-Time Processing:
o Interrupts are essential for real-time systems that need to respond to
events within strict time constraints.
 Modularity:
o Interrupt handlers are separate routines, which makes the system more
modular and easier to maintain.
Disadvantages of Interrupts
 Overhead:
o Interrupt handling involves overhead, such as saving the current state of
the CPU, switching to the interrupt handler, and restoring the state after
handling the interrupt.
o If interrupts occur too frequently, this overhead can consume a significant
amount of CPU time.
 Complexity:
o Interrupts can make the system more complex, especially when dealing
with multiple interrupt sources and priorities.
o Proper interrupt management is crucial to avoid conflicts and ensure that
interrupts are handled correctly.
 Interrupt Latency:
o Interrupt latency is the time between the occurrence of an interrupt and
the start of the execution of the interrupt handler.

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o High interrupt latency can be a problem in real-time systems where timely

responses are critical.
 Potential for Instability:
o Improperly designed interrupt handling can lead to system instability, such
as race conditions or deadlocks.
o If an interrupt handler is not carefully written, it can corrupt data or cause
the system to crash.
 Difficulty in Debugging:
o Interrupt-related problems can be difficult to debug, as they may occur
sporadically and depend on the timing of events.