Electronic Circuits Lab Manual
Electronic Circuits Lab Manual
COMMUNICATION ENGINEERING
CERTIFICATE
has satisfactorily completed the lab exercises prescribed for Electronic Circuits Lab
[ECE 2142] of III semester B. Tech. (E & C) Degree at MIT, Manipal, in the
Signature Signature
Faculty in Charge Head of the Department
Date: ……...................................
Contents
Expt. No. Title of the Experiment Page No.
3. Rectifier 25-29
Course Outcomes
• Upon completion of the course, students will be able to apply various network theorems
on given circuits and analyze their behavior to determine voltage and current values,
thus demonstrating a solid understanding of circuit analysis principles.
• At the end of the course, students will be able to verify the functionality and
performance of diode rectifier circuits, utilizing practical methods to rectify AC signals
into DC signals, showcasing their ability to comprehend and apply diode characteristics
and rectification principles.
• By the conclusion of the course, students will have the competence to design, analyze,
and verify operational amplifier (OPAMP) and MOSFET amplifiers and oscillators,
effectively utilizing their knowledge of amplifier configurations, frequency response,
and feedback techniques to achieve desired circuit behavior and performance.
Evaluation plan
• Internal Assessment Marks: 60%
✓ Continuous evaluation component (for each experiment):10 marks
✓ Assessment is based on conduction of each experiment, exercise problems, answering
the questions related to the experiment.
✓ Total marks of the 10 experiments scaled to 60 marks.
Note: Follow code of conduct (punctual, disciplined, and sincere)
• End semester assessment: 40 % (40 marks)
✓ write up (circuit diagram, design/analysis, netlist, observation table, expected
results/graphs): 12marks.
✓ Conduction: 12 marks
✓ Results and Calculations: 08 marks
✓ Viva-Voce: 08 marks.
1
Experiment No. 1: Verification of KCL and KVL using Multisim
Aim: To verify Ohms law and Kirchhoff laws (KCL & KVL) using simple resistive circuits.
V A Rs V
PR3 PR1 PR2
100Ω
V1
10V RL
30kΩ
2
Figure 1.2: Simulation output of circuit 1
R3 V2
V1 1Ω 12V
10V
Results:
3
Circuit 3: Voltage Source
Rs
V
PR1
100Ω
RL
V1 1Ω
10V
Figure 1.5 Circuit to verify relation between voltage source and load resistor
Steps:
1. Draw the schematic
2. Go to Simulate →Analyses and Simulation.
3. Under Active Analysis → Parameter Sweep. Choose the variable to sweep and mention
its ranges. Also choose the analysis to sweep to DC operating point.
4. Choose the required output variables to trace from the ‘Output’ tab. Here we choose
voltage across RL .
4
Output:
Rs R2
100Ω 100kΩ
V1 RL
10V 1kΩ
Figure 1.8 Circuit to analyze the behavior of voltage source as current source
Steps:
Draw the schematic
5. Go to Simulate →Analyses and Simulation.
6. Under Active Analysis → Parameter Sweep. Choose the load resistor as the variable to
sweep and mention its ranges from 1Ω to 100kΩ. Also choose the analysis to sweep to
DC operating point.
7. Choose the current through RL as the output variable to trace from the ‘Output’ tab.
5
Output:
Steps:
1. Get all the components and connect them in the worksheet. Choose the dependent
sources from the components list.
Group Family Component
Sources CONTROLLED_VOLTAGE_SOURCES CURRENT_CONTROLLED_VOLTAGE
SOURCE
2. 5IA and 10IB are the current dependent voltage souces. Double click on the sources and
adjust the transresistance values.
3. Connect the current arrow of the dependent sources to their respective locations in the
circuit to indicate the dependencies of these voltages.
6
4. Simulate and measure the outputs.
V3
R1 A R2 A
PR1 PR2
5Ω 5Ω
10Ω
V1 R3 V2
5V 10Ω 10V
V4
5Ω
2. Connect the components and adjust the component values as per the requirements.
7
3. Set the AC voltage values as per the requirement.
4. To set inductive load of j4Ω , double click on A+jB block and set the value. When the
operating frequency is not given set the value by assuming angular frequency w to be
1 rad/sec. Follow the similar steps to adjust capacitive load values.
Z1
R1 A A
PR2 PR1
Z=A+jB
3Ω
Z2 Z3
V1
100Vpk Z=A+jB
Z=A-jB
0Hz
45°
Output:
8
Exercise Problems:
1. Analyze the circuit shown in Figure 1.3 (i) without R3 (ii) without V2 (short the end).
2. Use the Multisim schematics to construct the circuit shown in Figure 1.16 and obtain the
node voltages and branch currents.
3. Use the Multisim schematics to construct the circuit shown in Figure 1.17 and obtain the
node voltages.
4. Find the voltage across 2Ω resistor for the circuit shown in Figure 1.18.
9
6. For the network shown in Figure 1.20, determine the voltage Vx
10
Experiment No. 2: Network Theorems
Objectives:
To verify the circuit theorems-Thevenin’s, Norton’s, Maximum Power Transfer, and
Superposition Theorem.
Example 1: Find the Thevenin and Norton Equivalent circuits for the circuit shown in Fig. 2.1.
11
5. Activate the Voltage measurement on the Multimeter using the V button. Read the
output as depicted in Fig. 2.2.
6. To find the Short-Circuit Current (ISC): Switch the Multimeter to “Ammeter mode” by
pressing the A button.
7. Read the output as depicted in Fig. 2.3.
Thevenin’s Resistance
Now, draw the Thevenin Circuit with a 100 Ω load and measure the voltage across and the
current through the load resistor.
Figure 2.4 Measure Voltage across and current through a 100 Ω load
12
Construct the Thevenin circuit in Multisim with the 100 Ω load as shown in Fig. 2.5. Simulate
the Voltage across and Current through a 100 Ω load attached to the output of the Thevenin’s
Equivalent Circuit.
Construct Norton’s circuit in Multisim with the 100 Ω load as shown in Fig. 2.6. Simulate the
Voltage across and Current through a 100 Ω load attached to Norton’s Equivalent Circuit
output.
As shown in Figures 2.4, 2.5, and 2.6, the voltage and current across the 100 Ω are the same,
thus confirming that these are the proper Thevenin and Norton Equivalent circuits.
13
Example 2: Find the maximum power transferred to the load resistor for the circuit shown in
Fig. 2.7.
14
Figure 2.8 Power dissipated in RL when load is matched to source
Now, change the value of RL to see what the power is when RL ≠ RS. Stop the simulation, set
RL to 30Ω, and then re-run the simulation.
As we can see in Fig. 2.9, the power dissipated in the load is less than it is when it is matched
to the source resistance (RS = RL).
15
Figure 2.10 Power dissipated in RL when the load resistance is 2KΩ.
Any load resistor value other than 50Ω will provide less than ideal power transfer. This
concept is investigated graphically in the next section.
This example will show graphically that power is maximized in the source resistor RS in Fig.
2.11 when RS = RL for varying values of RS.
Figure 2.11 Multisim circuit with 0 V source and ABM source forming time-varying
resistor.
16
What we want to do is make a resistive component which varies with time. Then we can run a
Transient Analysis which will effectively sweep through a resistance value. This can be done
with the ABM_VOLTAGE source. Draw the circuit shown in Fig. 2.11 above.
Double-click on the ABM source to bring up its properties window. In the Voltage value field
type: I(vv1)*1*TIME as shown in Fig. 2.12.
What we’ve just done is set this circuit such that the voltage at V(3) (and consequently V(2))
is a linear function of the current going into this portion of the circuit. The voltage is dictated
by: V = I·R(t) where R(t) is the simple linear ramp function R(t) = 1·t. The units of the “1”
component are Ω·s-1 and the units of t are s, so when they multiply together the seconds cancel
out and we are left with just Ω!.
17
Now let’s run a Parameter Sweep on the load resistor in Conjunction with a Transient Analysis.
However, remember that because of our time-varying resistor we’ve “hijacked” the Transient
Analysis and turned it into another Parameter sweep (where we sweep the source resistor’s
value).
So open up the Parameter Sweep window and fill in the values as shown in Figure 2.13 below.
Additionally for the Transient Analysis which we want to run inside the Parameter Sweep, set
it to the values shown in Fig. 2.14 on the next page.
18
Figure 2.14 Setting up the “Transient Analysis” to sweep RL from 0 to 500 Ω
Now we need to have something to plot. Under the Output tab of the Parameter Sweep window
set it up as shown in Fig. 2.15. Press Simulate and you should get the plot shown in Fig. 2.16.
(Note that several of the fields have been adjusted in order to ensure clarity in reading the
plots.)
19
Figure 2.15 Output tab of the Parameter Sweep window
20
Example 3: Verify Superposition Theorem for the circuit shown in Fig. 2.17 through 2Ω load
resistor R4.
21
Figure 2.18 Circuit to verify superposition theorem with voltage source alone
Figure 2.19 Circuit to verify superposition theorem with current source alone
Exercise:
1. Find the current through the 10 Ω resistor in the network shown in Figure 2.20 using
Thevenin’s Theorem. Verify the same using Multisim.
2. Find the current through the 5Ω resistor in the network shown in Figure 2.21 using
Thevenin’s Theorem. Verify the same using Multisim.
22
Figure 2.21 Circuit for problem 2
3. Find the current through the 8Ω resistor in the network shown in Figure 2.22 using
Superposition’s Theorem. Verify the same using Multisim.
4. Find the current through the 3Ω resistor in the network shown in Figure 2.23 using
Superposition’s Theorem. Verify the same using Multisim.
5. Find the current through the 1Ω resistor in the network shown in Figure 2.24 using
Norton’s Theorem. Verify the same using Multisim.
23
Figure 2.24 Circuit for problem 5
6. For the value of resistance RL in Figure 2.25 for maximum power transfer and calculate
the maximum power. Verify the same using Multisim. Also, Plot Maximum power by
making RL as time-varying resistor in Multisim.
24
EXPT. 3: RECTIFIER
Circuit Diagram:
25
2. To verify the regulation (line and load regulation) characteristics of fixed voltage
regulator circuit using IC 7805.
Circuit Diagram:
7805 +5 7.3
7812 +12 14.6
1. Set up the circuit as shown in Fig. 3.2 without RL. Apply input voltage morethan 7.3 V
and observe no-load voltage VNL.
2. Vary RL such that IL varies from 50mA to 350mA and note down the
corresponding Vout.
3. Plot the output voltage versus load current.
4. Set up the circuit as shown in Fig. 3.2 with RL such that IL = 250mA.
5. Vary Vin from 8V to 12V and note down the value of Vout.
6. Plot the output voltage versus input voltage.
Observations:
Line Regulation:
IL = 250 mA
Vin (V) 8 9 10 11 12
Vout (V)
Load Regulation:
Vin = 10 V
IL (mA) 50 100 150 200 250 300 350
Vout (V)
26
Calculation: Percentage of Load Regulation (|𝑉𝑁𝐿 | − |𝑉𝐹𝐿 |) × 100⁄|𝑉𝐹𝐿 |
Circuit Diagram:
Design:
If 𝑉𝑋𝑋 is nominal output voltage of the fixed regulator and is the standby current of the
regulator IC then for IC 7805, 𝑉𝑋𝑋 = 5𝑉 and 𝐼𝑄 = 2.5𝑚𝐴. The output voltage is given by.
𝑅2
𝑉0 = 𝑉𝑋𝑋 + 𝑉𝑋𝑋 + 𝐼𝑄 𝑅2
𝑅1
The resistor values for different output voltages can be calculated and are shown to be:
27
Vout (V)
Load Regulation:
Vin = 15V
IL (mA) 250 300 350 400 450 500
Vout (V)
4. To build a constant current regulator using 7805 IC and verify the regulation
characteristics.
Circuit Diagram:
5𝑉
Let 𝑅1 = 10Ω, 𝐼0 = 10Ω + 2.5𝑚𝐴 = 502.5 𝑚𝐴
Procedure:
• Rig up the circuit as shown in the circuit diagram shown in Fig. 3.4
• Keep Vin = 15 V measure IL for different setting of RL
• Note that the desired Io value is provided Vin ≥ 5V + IL RL
Observation: Vin = 15V
RL () 5 8 10
IL (A)
2. Design a circuit with diode which has the following transfer characteristics.
28
3. A signal must be limited at ±100 𝑚𝑉. Assuming 𝑉𝐷,𝑜𝑛 = 800 𝑚𝑉, design the required
limiting circuit.
5. Assume the input and output grounds in a full-wave rectifier are shorted together.
Draw the output waveform and explain the behavior of circuit. (Take the resistance
value as per the choice)
6. Obtain 𝑽𝑶𝑼𝑻 versus time for the circuit shown below. −𝟏𝟎𝑽 ≤ 𝑽𝑰𝑵 ≤ +𝟏𝟎𝑽
29
EXPERIMENT 4
N-CHANNEL MOSFET OUTPUT AND TRANSFER CHARACTERISTICS
AIM:
To study transfer and output characteristics of an n-channel Metal Oxide Semiconductor field effect
Transistor (MOSFET) in Common-source configuration.
APPARATUS:
MOSFET (2N7000), Bread board, resistor (1KΩ, 100KΩ), connecting wires, Ammeters (0‐10mA/ 0‐
25mA), DC power supply (0‐30V) and multimeter.
THEORY:
The MOSFET is actually a four-terminal device, whose substrate, or body terminal must be always held
at one of the extreme voltage in the circuit, either the most positive for the PMOS or the most negative
for the NMOS as shown in the Fig.1. One unique property of the MOSFET is that the gate draws no
measurable current.
Fig.1
Fig.2
30
Fig.3
PROCEDURE:
OUTPUT/DRAIN CHARACTERISTICS:
1. Connect the circuit as per given diagram (Fig.2) properly.
2. Keep VGS constant at some value say 1.1 V by varying VGG
3. Vary VDS in step of 1V upto 10 volts and measure the drain current ID. Tabulate all the readings.
4. Repeat the above procedure for VGS as 1.2V, 1.3V, 1.4V, 1.5V etc.
TRANSFER CHARACTERISTICS:
1. Connect the circuit as per given diagram (Fig.2) properly.
2. Set the voltage VDS constant at 10 V.
3. Vary VGS by varying VGG in the step of 0.1 up to 1.55V and note down value of drain current
ID. Tabulate all the readings.
4. Plot the output characteristics VDS vs ID and transfer characteristics VGS vs ID.
5. Calculate VT, gm, rd or ro from the graphs and verify it from the data sheet
CALCULATION:
1. Threshold voltage VT : Gate to source voltage at which drain current starts flowing.
31
2. Transconductance gm : Ratio of small change in drain current (Δ ID) to the corresponding
change in gate to source voltage (ΔVGS) for a constant VDS.
gm = Δ ID / ΔVGS at constant VDS
3. Output drain resistance : It is given by the relation of small change in drain to source
voltage (Δ VDS) to the corresponding change in Drain Current (Δ ID) for a constant VGS.
rd or ro = ΔVDS / Δ ID at a constant VGS
OBSERVATION TABLE:
RESULTS:
[Link]:________
2. gm: ________
3. ro: _______
32
Exercise Problems
1. Calculate the channel-length modulation coefficient for the MOSFET under consideration,
given that
2. Plot the variation of the transconductance of the MOSFET with respect to (i) ID (ii) VGS-VTH
3. What choice of R2 in Fig.1 places the MOS transistor at the edge of the triode region?
4. For the MOSFET under consideration and estimate its W/L?
(Refer to the datasheet for more details.)
(i) 2N7000
(ii) IRF510
5. Illustrate the working of a NOT Gate using the circuit given in the Fig.2.
6. By following similar procedure plot the Input and output characteristics for a PMOS
Transistor.
OPAMP characteristics
AIM:
To plot the characteristics of an Operational Amplifier and explore its different configurations.
THEORY
Operational Amplifiers or “Op-Amps” are important building blocks for a wide range of electronic
circuits. They are among the most widely used electronic devices today with usage in a vast array of
consumer, industrial, and scientific devices. The term ‘operational’ is used because they can perform
all the basic arithmetic operations (addition – summing, subtraction – difference, multiplication, and
division). In this lab, we will examine the characteristics of an ideal Op-Amp, build fundamental DC
Operational Amplifier Feedback Circuits and see the effects of the Op-Amps on the output of those
circuits.
33
Figure (ii)
If you examine your LM741 Op-Amp, you will find a notch/dot in one of the corners. The notch/dot is
located right next to Pin 1, thus it is used as a marking to identify the orientation of the Op-Amp. There
are a total of eight pins within the LM741. It is also important to note that if you look at the datasheet
for the LM741, it has a recommended range of +10-15 V for Vcc+ and -10-15 V for Vcc-. Normally,
in the lab, we would use +12V and -12V for each Vcc respectively. If you only have the AD2, it can
only supply +5V and -5V, these are the values you will have to use. Anytime you see +12V or -12V,
you can just use +5V and -5V respectively. The LM741 does still work under these conditions, as the
datasheet does not list an actual minimum value, only a recommended one. It is always important to
check the datasheets for any component you use, and is especially important when designing new
circuits.
34
EQUIPMENT REQUIRED
741 Op-amp
100Ω, 100kΩ, 220kΩ resistor, ¼ W
5 kΩ, ¼ W
potentiometer 0-30 V,
1A dc dual regulated power supply
30 MHz Oscilloscope
3 MHz Function Generator
Digital Multimeter Breadboard
DC CHARACTERISTICS
The dc characteristics of op-amp that affect the steady state response are: Input bias current, Input
offset current, Input offset voltage and thermal drift.
The input bias current is the average of the two base currents in the input stage of an op-amp under
no-signal conditions.
35
The input offset current is the difference of the two base currents that results due to non-identical
transistors.
The input offset voltage is the input voltage needed to null or zero the quiescent output voltage.
36
37
PRACTICE PROCEDURE
38
Repeat the above steps with 100K resistors and then with 100Ω resistors. Report your results.
Saturation Voltages
1. Construct the circuit as shown in Figure4.
2. Measure the output voltage.
3. Measure the output voltage by applying an ac voltage of 1 Vp-p, 1 kHz to the non-inverting
terminal.
Repeat the above step applying ac voltage of 1 Vp-p, 1 kHz to the inverting terminal.
39
Open loop non-inverting amplifier
7. Change the circuit as given in Figure 5.3.
8. Apply 2 Vp-p, 100 Hz at the non-inverting terminal and the inverting terminal is grounded.
9. Observe and plot the input and output waveforms.
EXERCISE PROBLEMS
1. Design an Amplifier with a gain of 60dB with voltage swing of 10Vp-p.
2. Design mathematical operations like addition, subtraction that can be performed using the circuits
you have built in lab.
3. Design a comparator circuit can be used in a practical application.
4. Design a current amplifier circuit can be used in a practical application.
5. Explain why the output reaches a limit and saturates regardless of the gain.
40
Experiment 5:MOSFET AMPLIFIER
AIM:
THEORY:
The MOSFET structure has become the most important device structure in the
electronics industry. It dominates the integrated circuit technology in Very Large Scale
Integrated (VLSI) digital circuits based on n-channel MOSFETs and Complementary n-
channel and p-channel MOSFETs (CMOS). The technical importance of the MOSFET results
from its low power consumption, simple geometry, and small size, resulting in very high
packing densities and compatibility with VLSI manufacturing technology. Two of the most
popular configurations of small-signal MOSFET amplifiers are the common source and
common drain configurations. The common source circuit is shown below. The common
sources, like all MOSFET amplifiers, have the characteristic of high input impedance. High
input impedance is desirable to keep the amplifier from loading the signal source. This high
input impedance is controlled by the bias resistors R1 and R2). Normally the value of the bias
resistors is chosen as high as possible. However, too big a value can cause a significant voltage
drop due to the gate leakage current. A large voltage drop is undesirable because it can disturb
the bias point. For amplifier operation the MOSFET should be biased in the active region of
the characteristics.
CIRCUIT DESIG N / DIAGRAM:
820 kΩ
CRO
CS
41
DESIGN:
Now, the voltage across source side resistance VRS = VDD – VDS – VRD = 12 – 6 – 5 = 1 V
Assume, R1 = 100 kΩ. By, voltage division rule, R2 can be obtained as,
VG=VDD x R2/(R1+R2)
Selecting the value of VG as 4V
R2
4 = 12 R2 47 kΩ
100 10 103 + R 2
Design of capacitors:
1
XC1 ≤ 1.5kΩ ie 1.5 kΩ
2 fC1
Let C1 = C2 = 1 μf.
CS = 10μf
42
PROCEDURE:
Set up the circuit as shown in the figure with an input signal of 0.2V (peak-to-peak) at
1000 Hz. Observe the output on the CRO. Vary the frequency of the input signal over a range
of values (from 50Hz to a few MHz) to obtain the frequency response which is a graph between
log f (x-axis) and gain in dB (y-axis).
OBSERVATION:
RESULT:
The required common source MOSFET amplifier was designed and set up to obtain the
required frequency response.
43
Exercise Problems
1. Remove bypass capacitor Cs and observe the output, compare and understand the role of
the bypass capacitors.
2. Increase and decrease the value of Cc and arrive conclusions regarding its optimal value.
3. Increase the input frequency and try to understand why the gain of the amplifier reduces.
4. Design an Amplifier with a gain of 50 dB and input impedance of 50k-ohm.
5. Design the circuit shown in the Fig. 1 for a drain current of 1 mA. And compute R1 and R2
such that the input impedance is at least 50 k-ohm. Minimum Gain required is 40 dB.
6. Demonstrate and explain the Gain Bandwidth product concept using the circuit in Fig. 1.
44
Experiment No. 6: Oscillators Using Transistors
Objectives:
To simulate and understand the working of oscillators using different transistors.
XSC1
Ext Trig
+
_
R3 A B
_ _
V1 1.8kΩ + +
12V R1
C2
47kΩ
C3 Q1 1µF
BF420 C4
1µF 0.001µF
L1
R2 220µH
10kΩ R4 C1
C5
560Ω 1µF
1000pF
Design:
Colpitt’s oscillator is an LC oscillator. The tank circuit is made up of C4, C5 and L1. R1, R2
and R4 provide bias for the transistor.
Frequency of oscillation
𝟏
𝒇=
𝟐𝝅√𝑳𝑪𝑻
𝐶4 𝐶5
𝐶𝑇 =
𝐶4 + 𝐶5
f= 480kHz
Assuming L=220µF C4=C5=0.001µF.
45
Procedure:
1)Place all the given components and make the circuit as shown.
(Place_Component_ Select Sources for Ground and DC power )
2)Simulate-Interactive simulation.
Output:
VCC
5.0V
XSC1
R3
2.2kΩ Ext Trig
+
C2 _
A B
+ _ + _
C3 Q1 10µF
BFW10
10µF R2
1MΩ C1
R1 100µF
1kΩ
L1 L2
1.1mH 3.9mH
C4
100nF
46
Design:
𝟏
𝒇=
𝟐𝝅√𝑳𝑻 𝑪
𝑳𝑻 = 𝑳𝟏 + 𝑳𝟐
𝒇 = 𝟕𝒌𝑯𝒛 C=100nF(assumed) L
Output:
Exercise
1)Design and simulate a Phase shift oscillator for a frequency of [Link] the values of the
Q point of operation of the transistor. Calculate and find out another set of values for R and C
to get the same value of frequency.
2)Design a Colpitts oscillator for a frequency of 200kHz using FET.
3)Design a Hartley Oscillator using BJT for a frequency of 500kHz.
47
Experiment No. 7:
Design and Verification of OPAMP feedback amplifiers
Objective:
To design and verify the feedback operational amplifier as inverting amplifier, non-
inverting amplifiers, differential amplifier, summer, differentiator, integrator, square
wave generator and voltage follower.
Design:
𝑅𝐹
a) For inverting amplifier, 𝑉𝑜𝑢𝑡 = − 𝑉𝑖𝑛
𝑅1
𝑅𝐹
= 5 ⇒ 𝑅𝐹 = 5 𝑅1
𝑅1
𝐿𝑒𝑡 𝑅1 = 1 𝐾Ω ⇒ 𝑅𝐹 = 5 𝐾Ω
𝑅𝐹
b) For non-inverting amplifier, 𝑉𝑜𝑢𝑡 = (1 + ) 𝑉𝑖𝑛
𝑅1
𝑅𝐹
1+ = 5 ⇒ 𝑅𝐹 = 4 𝑅1
𝑅1
𝐿𝑒𝑡 𝑅1 = 1𝐾Ω ⇒ 𝑅𝐹 = 4 𝐾Ω
Circuit diagram:
48
Results:
b) Basic Resistor 1K
c) Source <All families> AC_Voltage
d) Source <All families> Ground
e) Source <All families> VCC
f) Source <All families> VDD
Note: Select required number of components as per the design and click close
3) Connect the components as per the circuit diagram shown in Fig. 1a and 1b.
4) Change the values of the components as per the design.
5) In main menu bar select simulate -> four channel oscilloscope.
6) Adjust the parameters of oscilloscope to visual and analyze the obtain results are as per the
design.
Design:
𝑅𝐹 𝑅𝐹 𝑅𝐹
For summer amplifier, 𝑉𝑜𝑢𝑡 = − ( 𝑉1 + 𝑉2 + 𝑉3 )
𝑅1 𝑅2 𝑅3
Here 𝑅1 = 𝑅2 = 𝑅3, 𝑎𝑛𝑑 𝑙𝑒𝑡 𝑅1 = 1𝐾Ω
⇒ 𝑅𝐹 = 5 𝐾Ω
49
Circuit diagram:
Results:
Fig 2b: Analysis of summer amplifier. Inputs and output are color coded.
Example 3: Design and verify the differential amplifier circuit using OPAMPS
a) 𝑉𝑜𝑢𝑡 = 5(𝑉2 − 𝑉1 )
b) 𝑉𝑜𝑢𝑡 = (𝑉2 − 𝑉1 ) , 𝑎 𝑠𝑢𝑏𝑡𝑟𝑎𝑐𝑡𝑜𝑟
Design:
𝑅𝐹 𝑅3 𝑅𝐹
For differential amplifier, 𝑉𝑜𝑢𝑡 = (1 + )( ) 𝑉2 − 𝑉1
𝑅1 𝑅2 +𝑅3 𝑅1
a) Let 𝑅3 = 𝑅𝐹 and 𝑅2 = 𝑅1 in above equation
𝑅𝐹
Then 𝑉𝑜𝑢𝑡 = (𝑉2 − 𝑉1 )
𝑅1
𝐿𝑒𝑡 𝑅1 = 1 𝐾Ω ⇒ 𝑅𝐹 = 5 𝐾Ω
⇒ 𝑉𝑜𝑢𝑡 = 5(𝑉2 − 𝑉1 )
b) 𝐿𝑒𝑡 𝑅1 = 𝑅𝐹 = 1 𝐾Ω
⇒ 𝑉𝑜𝑢𝑡 = (𝑉2 − 𝑉1 )
50
Circuit diagram:
Circuit diagram:
51
Results:
Circuit diagram:
52
Example 6: Design a square wave generator using OPAMP for the following specification
a) Frequency of oscillator = 1K Hz
b) 𝑽𝒐𝒖𝒕 = 𝟏𝟐 𝑽
Design:
1+𝛽
𝑃𝑒𝑟𝑖𝑜𝑑 𝑜𝑓 𝑠𝑞𝑢𝑎𝑟𝑒 𝑤𝑎𝑣𝑒 ∶ 𝑇 = (2 𝑅𝐶)𝑙𝑛 ( ) , 𝑎𝑠𝑠𝑢𝑚𝑒 𝛽 = 0.5
1−𝛽
𝐺𝑖𝑣𝑒𝑛 , 𝐹 = 1𝐾𝐻𝑧 ⇒ 𝑇 = 1𝑚
𝑅𝐶 = 0.455𝑚 , 𝑙𝑒𝑡 𝐶 = 0.1 𝜇𝐹 𝑡ℎ𝑒𝑛 𝑅 = 4.5 𝐾 Ω
Circuit diagram:
Exercises:
1) Design and implement the following using OPAMP
𝑽𝒐𝒖𝒕 = −𝟐 (𝟎. 𝟏 𝑽𝟏 + 𝟎. 𝟓 𝑽𝟐 + 𝟏. 𝟓𝑽𝟑 ) (Hint: summer circuit)
53
2) Design and implement the following using single OPAMP
𝑽𝒐𝒖𝒕 = 𝟑 𝑽𝟐 − 𝟓 𝑽𝟏 (Hint: differential amplifier circuit)
4) Design a square wave generator using OPAMP for the following specification
a) Frequency of oscillator = 1K Hz
b) 𝑉𝑜𝑢𝑡 = 12 𝑉
5) Design a differentiator circuit using OPAMP and verify the results for sine wave and square
wave as a input signal.
6) Implement the circuit as shown in Fig. 7 and analyze the output for different input signals
(square wave, triangular wave and sine wave).
54
Experiment 8
Oscillators using Op-Amps
Objective: To Design and verify oscillator and waveform generation circuits realized using Op-Amp
UA741.
Example 1
Objective: To generate the sinusoidal signal of desired frequency using R and C.
1
Design : The Frequency in Hz is given by 𝑓 = , where R is the Resistance in Ohms, C is the
2𝜋𝑅𝐶√2𝑁
Capacitance in Farad, and N is the number of RC stages (N = 3). The RC combination in the Oscillator
circuit acts as an attenuator producing an attenuation of 1/29th (Vo/Vi) per stage, the gain of the
amplifier must be sufficient to overcome the losses and must be greater than 29.
For f= 1kHz, Choose C=0.01µF, Hence R= 6.5kΩ.
55
Fig 8.2: Output waveform on CRO for RC phase shift oscillator
Example 2:
Design a suitable circuit to generate the sinusoidal signal of desired frequency using tank Circuit (LC)
using OpAmp.
Design:
1
The frequency of oscillations for a Hartley Oscillator is given as: 2𝜋√LC The total inductance is sum of
two inductive coils: 𝐿 = 𝐿1 + 𝐿2
56
Fig 8.3: Circuit for Hartley Oscillator
57
Fig 8.5: Circuit for Colpitts oscillator
58
Example 4:
Design a suitable circuit to generate square wave using OPAMP for a desired frequency and duty
cycle.
Deign 5:
1+𝛽
𝑇 = 2𝑅𝐶 𝑙𝑛 1−𝛽
; where 𝛽 = 𝑅3/𝑅2 + 𝑅3
59
Exercises:
1. Design a phase shift oscillator to oscillate at 500 Hz. Choose C=0.1µF. Take the resistance
value appropriately. Adjust feedback resistor to obtain a sine wave output. Measure the
frequency of oscillator and voltage amplitude.
2. Design a triangle wave generator of frequency 5kHz. Take β =0.5. Assume Resistance
values appropriately.
60
Experiment No. 9: Non-linear Applications of OPAMP
Objectives: To simulate and analyse various non-linear applications of OPAMP Circuits.
U1
7
5
1
Vin
3
Vout
Vin 6
2
R1
5Vrms 1kΩ
1kHz
0° 741
2V
4
DC_Reference
VEE
-15.0V
Figure 9.1 Non-inverting Comparator
61
Figure 9.2 (b) DC transfer characteristic
1N4007G
U1
4
Vin R1
2 Vout
Vin 10kΩ 6
3 R2
10V 1kΩ
741
7
5
1
VCC
15.0V
62
𝑉𝑖𝑛1
𝑉𝑜𝑢𝑡1 = −𝜂 𝑉𝑇 ln
𝑅1 × 𝐼𝑆
299
𝐻𝑒𝑟𝑒: 𝑇 = 26𝑜 𝐶 ; ∴ 𝑉𝑇 = = 25.775𝑚𝑉
11600
For η and IS values → right click on diode symbol → properties → Value → Edit Model.
U1
4
Vin
2 Vout
6
Vin 3
R1
741 1kΩ
7
5
1
5Vrms
1kHz
0°
R2
1kΩ
VCC
12.0V
63
Analysis:
1. Perform a transient analysis, run for 3ms.
2. TRACE input output waveform as shown in Figure 9.6.
3. Analyse the output w.r.t. the input using the following design formulae:
𝑅2 (+𝑉𝑠𝑎𝑡 )
𝑉𝑈𝑇𝑃 =
𝑅1 + 𝑅2
𝑅2 (−𝑉𝑠𝑎𝑡 )
𝑉𝐿𝑇𝑃 =
𝑅1 + 𝑅2
𝑅2
𝛽=
𝑅1 + 𝑅2
𝐼𝑓 𝑅1 = 1𝑘Ω 𝑎𝑛𝑑 𝑅2 = 1𝑘Ω 𝑡ℎ𝑒𝑛 𝛽 = 0.5, 𝑉𝑈𝑇𝑃 = 6𝑉, 𝑉𝐿𝑇𝑃 = −6𝑉
R1 Vout
1kΩ
U1
4
Vin
2
C1 6
1µF 3
R2
741 1kΩ
7
5
1
R3
VC C 1kΩ
12.0V
64
Steps to draw the Schematic:
1. Draw circuit as shown in Figure 9.7.
Analysis:
1. Perform a transient analysis, run for 70ms.
2. TRACE input output waveform as shown in Figure 9.6.
3. Analyse the output w.r.t. the input using the following design formulae:
𝑅3
𝛽=
𝑅2 + 𝑅3
+𝑉𝑐𝑎𝑝 = 𝛽(+𝑉𝑠𝑎𝑡 )
−𝑉𝑐𝑎𝑝 = 𝛽(−𝑉𝑠𝑎𝑡 )
1kΩ
D1
1N4007G
U1
4
Vin R3
2 D2 Vout
V1 1kΩ 6
5Vrms 3 1N4007G
1kHz R2
741
7
5
1
0° 1kΩ
VCC
12.0V
65
Steps to draw the Schematic:
1. Draw circuit as shown in Figure 9.9.
Analysis:
1. Perform a transient analysis, run for 70ms.
2. TRACE input output waveform as shown in Figure 9.10.
Exercise:
1. Simulate an inverting comparator using OPAMP. Also get the dc transfer characteristic.
2. Simulate and analyze Antilog amplifier circuit using OPAMP.
3. Design a Schmitt trigger circuit for UTP = 2.5V, LTP = -1V, VSAT = 12V. Plot the transient
response of the output voltage for duration of 0 to 4ms.
4. Simulate a precision full wave rectifier using OPAMP.
66
Experiment No. 10: Diode and its Applications
Objectives: To simulate and analyse various applications of Diode Circuits.
Circuit 1
Results:
67
Circuit 2
Results:
68
Circuit 3
Results:
69
Circuit 4
Results
Circuit 6
70
Results
Circuit 5
71
Results
Exercise:
1. Design a clipper with an appropriate DC bias to clip the negative portion of a sine wave
below -2V. Draw the circuit and resulting output.
2. Design a diode clipper circuit to limit a ±6V sine wave between -3V and +3V using only
diodes and DC sources. Show the circuit diagram and the clipped output waveform.
3. Design a diode clamper circuit that shifts a ±5V sine wave so that its entire waveform
lies above the 0V (positive axis). Draw the circuit using a diode, capacitor, and
appropriate DC source. Show the output waveform.
4. Design a diode clamper that shifts a 4V peak sine wave such that the waveform now
oscillates from -6V to +2V. Draw the circuit using a diode, capacitor, and appropriate
DC source. Show the output waveform.
72