PH 411 Physics Laboratory I (Electronics)

Instruction Manual : July 2025

Index

Experiment Name of the experiment Page

No.
Experiment 1 Single-Stage Amplifiers 4

Experiment 2 Operational Amplifier 5-7

Circuits
Experiment 3 Filter Circuits 8-9
Experiment 4 Oscillator Circuits 10

Experiment 5 Logic Gates 10-13

Experiment 6 Digital Circuits I 14-15

Experiment 7 Digital Circuits II 16-18

Experiment 8 Microprocessor 8085 Control 19-20

Experiment 9 Circuit (mini-project) 21

Appendix I 22-25

DEPARTMENT OF PHYSICS

INDIAN INSTITUTE OF TECHNOLOGY, GUWAHATI

July-November 2025
General Instructions to Students

1. On the very first day of the lab familiarize yourself with the power supply, function generator,
oscilloscope, bread board, and digital multi-meter (DMM). You may request for the copies of
respective manual. You may also request the Teaching Assistant or the instructor to guide you
in learning these basic operations.

2. With the help of DMM learn to check the diode and transistors and to measure the value of
resistance.

3. The instruction manual provides the necessary information to perform the experiments.
However alternate circuits exist for most cases and students are encouraged to try out circuits
other than given in this manual (with prior permission from the instructor). The procedure
given is brief. Instructions given in italics are for self-study. Do try them if you want
proficiency in electronic circuitry.

4. Before attending the lab read the instruction manual THOROUGHLY and CAREFULLY
for analyzing the circuits to be used. You should consult any of the good text or reference
books on the subject in advance. This will help you to have tentative estimates of the voltages
and currents you are going to handle and enable you to set the measuring instrument without
trouble.

5. Derive the relevant formula or workout the relevant waveforms expected from the experiment.

6. You should bring with you sufficient number of A4 size white papers, graph sheets (linear as
well as semi-log/log-log as per the requirement of the experiment), tracing paper, for
compiling the report and other stationery items required for data recording and analyses.

7. The format of the report should be:

(a) Name Roll No. Date of Experiment

(b) Experiment title:
(c) Objective/Aims and circuit diagram
(d) Formulas, if any, with brief description
(e) Equivalent Circuit(s) if necessary as per instruction in the manual
(f) Expected waveform/truth table etc. as a function of input if applicable
(g) Observation Table(s)
(h) Input/Output waveform traces wherever necessary
(i) Graph(s) with proper labeling
(j) Calculations, if any
(k) Summary of results
(l) Brief discussion of results
(j) Answers to the questions wherever applicable
(m) Suggestion(s) / New circuit idea pertaining to the experiment / Specific precautions

8. Data is to be recorded directly on the lab record.

9. You are expected to come prepared with points (a) to (f) of above and get it signed by the
instructor before starting the experiment. Five marks are reserved for the same.
10. Please give due respect to common ground line while assembling the circuits.

11. Observations should be signed by either TA or the instructor present.

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12. You have to complete the report and submit it in your FOLDER FILE on the scheduled date
of the experiment.

13. The performance in this course will be evaluated on the basis of Day-to-day lab activities,
a theory exam / Quiz, and the final end-semester exam.

Weekly Lab reports (average) – 30 Marks, Lab Quiz (just before end sem.) – 20 marks

End Sem Exam – 50 Marks

14. Any kind of feedback on the improvement of this course is always welcome.

With best wishes,

Prof. Tarak N Dey and Dr. Binoy K Hazra
(Course Instructors – PH 411)

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 1. Single stage amplifiers
Aim: To Study the single stage Amplifiers using JFET and (i) measure the Gain of each of the
amplifier as a function of frequency, (ii) determine the lower and upper cutoff frequencies and
find the band width and iii) to study the influence of load resistance on mid frequency gain.

A. Common source JFET amplifier:

Fig 1.2 BFW10/11

Prior preparation: Draw the dc and ac equivalent circuit and calculate the theoretical gain and
cut off frequencies.
Gain Avs= Output Voltage (Vout)/input Voltage (Vin)
Gain (dB) = 20 log (Vout/Vin)
Procedure:
1. Connect the circuit as shown in Fig. 1.2.
2. The drain voltage, VDD should be kept around 12V.
3. Display the input and output signals on the Oscilloscope without any load resistance.
4. Set the source voltage at 100mV peak to peak (say) at 1KHz frequency using function
generator. Measure the input and output peak to peak voltage and verify the circuit.
5. Keeping the input peak to peak voltage constant, vary the frequency in regular steps
from 20Hz to 2MHz (or till the output signal becomes very low) and record the output
voltage (peak to peak) in tabular form.
6. Calculate the voltage gain (Avs and dB) as a function of frequency and plot the gain
(dB) as a function of frequency on a semi log graph sheet.
7. Determine the cut off frequencies (at 3dB loss point) and calculate the band width.
8. Compare the theoretical values with those obtained experimentally.
9. Repeat the experiment with the Load resistances of 5kΩ and 10 kΩ and record its
effect on the gain and frequency response.

Question: Do you expect any change in frequency response if instead of sinusoidal input a
triangular or square signal is applied.

Reference: R L Boylestad and L Nashelsky, Electronics Devices and Circuit theory, Prentice
Hall, India.

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 2. Operational Amplifier Circuits
Aim: To construct (a) inverting and non- inverting amplifier (b) integrator and (c)
differentiator for analog signals using an operational amplifier IC 741.

Prior preparation:

1. Draw all the equivalent circuits and work out the expressions for the output voltages and
the voltage gain of the amplifier and expected shape of the output signal for the given input
signal. Final values of gain can be worked out after measuring the actual resistances used.
2. Measure the dc offset voltage of opamp by short circuiting both the inputs. It should be
below 10mV. If its too large then compensate for the off-sets and then proceed. The
relevant circuits are given in Millman & Halkias / Gayakwad’s book.

(a) Non Inverting Amplifier Circuit:

R1

Fig: 3.1 Non-inverting Amplifier

Procedure:

1. Assemble the non-inverting amplifier circuit as shown in fig.3.1. Apply a d.c. input of ≤1
V and measure the output voltage, V0.
2. Repeat the above step for different R2/R1 ratio (at least for three different values, e.g. R2
can be taken as 0.5 kΩ, 1kΩ and 2 kΩ)) and verify the function of the non-inverting
amplifier as a scale changer.

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 3. Now connect a sinusoidal input signal ‘Vi’ from a function generator, frequency ~1 kHz
having peak to peak voltage ≤1 V.
4. Display the input and output signals on CRO. Trace the input and output signals. Measure
the peak to peak voltage of output signal V0. Repeat it for various input frequencies. And
compare the results with those of estimated theoretically.
(b) Inverting Amplifier

Fig: 3.2 Inverting Amplifier

Procedure:
1. Make the inverting amplifier circuit as shown in fig. 3.2.
2. Apply a d.c. input of ≤ 1 V and measure V0.
3. Repeat the above step for different values of R2 and R1 and verify the function of the
inverting amplifier as a scale changer.
4. Apply a sinusoidal input signal ‘Vi’ with frequency 1 kHz and peak to peak voltage 1 V. Trace
the input and output signals. Measure the peak to peak voltage of output signal V0. Repeat for
various input frequencies.

c. Integrator Circuit

Fig: 3.3 Integrator Circuit

1. Connect the integrator circuit as shown in Fig. 3.3. Apply a sinusoidal input signal ‘Vi’
with frequency ~1 kHz and peak to peak voltage in the range of 1-2 V.
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 2. Trace the input and output signals. Measure the peak to peak voltage of output signal V0.
3. Repeat the experiment for square and triangular waves.

4. Repeat for C= 0.047µF, 0.01uF and 0.1µF and tabulate the data. Calculate the output
voltage theoretically and compare it with the experimental data.

d. Differentiator Circuit

Fig: 3.4 Differentiator circuit

Connect the differentiator circuit as shown in Fig. 3.4. For sine wave, square wave and triangular
wave inputs Vi (<1 kHz and Vpp = 1-2V), measure the peak to peak output voltage. Trace the input
and output signals. Calculate the theoretical output voltage and compare it with the
experimental one.

Try out:
1. Solve the differential equation d2V/dt2+K1dV/dt+K2V-V1=0, construct an analog computer
circuit using operational amplifiers. Using an input signal with frequency 1 kHz and peak
to peak voltage ~5V measure the output voltage and compare with input signal d2V/dt2.

References:
1. R L Boylestad and L Nashelsky, Electronics Devices and Circuit theory, Prentice Hall,
India.
2. R A Gayakward, ‘Opamp and Linear Integrated Circuits’, Prentice Hall India

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 3. Filter circuits

Aim: To construct and study low, high and band pass filters using op-amp, determine the cut-
off frequency (ies) and measure the voltage gain and phase shift as a function of frequency.

Circuit diagrams:

Fig: 4.1 Low Pass Filter

Fig: 4.2 All Pass Filter

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Prior preparation: Circuit analysis has to be done before coming to the laboratory.

Procedure:

1. For the low pass filter, make the circuit as shown in Fig. 4.1. Apply an ac signal of 1-2V
peak to peak and measure the output voltage by varying the frequency of the input signal
from 100Hz-1MHz. Plot the voltage gain as a function of the frequency. Determine the
cut off frequency and calculate the allowed frequency band for the low pass filter. Check
if there is any change in phase shift of the signal with frequency.
2. For the all pass filter, make the circuit as shown in Fig. 4.2. Repeat the experiment as in
previous circuits. Measure and plot the gain as well as phase shift as a function of the
frequency.
3. Trace the input and output signals for each of the above circuits atleast for two
frequencies and mark the phase difference on them.
4. Study the variation of phase in all the above circuits with the frequency and make a
suitable plot for it.

Note: In place of potentiometer one can use a resistance of value 6-8kΩ.

Reference
1. R A Gayakward, ‘Opamp and Linear Integrated Circuits’, Prentice Hall India

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 4. Oscillator Circuits
Aim: To construct an astable multivibrator using IC 555.

Circuit Diagram:

Fig: 5.2 Free-running M.V. (RA=1k, RB=3k,10k,

18k)

Procedure:

1. Assemble the astable circuit shown in Fig. 5.2.

2. Trace the output waveform. Try to use the control voltage terminal and vary the output
pulse width and observe the output waveform. The square wave output will have
frequency f= 1.4/[C (RA+2RB)].
3. Repeat the experiment for different RA, RB and C values (three different combinations of
two resistances and three values of C, a total of nine observation).
4. Measure the pulse width and time period and hence frequency and tabulate the data
properly.
5. Trace the voltage across the capacitor alos.

Compile the results and enclose the waveforms traces.

Precaution: List out the precaution and any special steps followed by you.

Pin-out diagram for each IC555 chip is given in Appendix I.

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 5. Logic Gates

Aim: To construct logic gates using discrete components, obtain their truth table and prove
the universality of NAND / NOR gates.

Prior Preparation: Analyse the circuit, draw the equivalent circuits, work out the expression
for the output voltages and make the truth table for the respective logic gate.
1. Logic gates using discrete elements:
Circuit diagram:

A
Y
1kΩ

Fig: 6.1 OR gate

Truth Table
INPUT OUTPUT(Y)
A B
Volts Logic level Volts Logic level Volts Logic level
0 0
1 0
0 1
1 1

330E

1k
B

Fig: 6.2 AND gate circuit using diodes

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 Truth Table
INPUT OUTPUT(Y)
A B
Volts Logic level Volts Logic level Volts Logic level
0 0
0 1
1 0
1 1

330Ω
+5V
15k

1k
100k

Fig: 6.3 NOT or Inverter gate using transistor

INPUT OUTPUT
Volts Logic level Volts Logic level
0
1

Procedure:
1. Assemble the circuit one by one as shown in fig 6.1-6.3 and verify the respective truth
table.
2. Replace the DC inputs with the function generator (square wave) and verify the truth
table.
3. For observing the output via LED, keep the frequency of the function generator around
1-2 Hz.
4. For displaying the output on oscilloscope, frequency can be kept around 1kHz.

Aim: b) To prove the universality of the NOR gate.

[Make your own truth tables to verify the function of each logic gate]

Fig: 6.4 OR gate using NOR gates (IC 7402)

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 Fig: 6.5 AND gate using NOR gates(IC 7402)

Fig: 6.6 Exclusive OR gate using NOR gates

Procedure :

1. The discrete and IC circuits corresponding to the various logic gates are given above.
The voltages 0 V and +5V are respectively taken as logic level “0” and “1”. Obtain the
truth table for various values of binary inputs A and B by obtaining the corresponding
output Y in each case. Measure the output voltage V0 and observe status of the LED at
the output. A glowing LED indicates a logic level 1.
2. While wiring up the logic gate IC s take care to the pin out diagram corresponding to
each IC. Apply + 5V as supply voltage at VCC.
3. To prove the universality of NOR gates, make the connection as shown in corresponding
figures. Verify the truth table experimentally and compare with the truth table of the
corresponding gate.
4. Make the circuit diagram NOT gate using NOR gate and verify the truth table.
5. Make the circuit diagram of NAND gate using NOR gate and verify the truth table.

Pin-out diagrams for each IC chip are given in Appendix I.

Precaution: list out precautions taken by you. Write down the special techniques or simpler
circuits followed by you if any.

Note: prove the universality of the NAND gate as exercise.

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 6. Digital Circuits-I

Aim: a) Verification of De Morgan’s theorems, b) construct Exclusive OR gate and a half

adder circuit using IC-7400, c) construct a half subtractor using Nand gate, d) construct an 2
to 1 multiplexer e) construct an 1 to 2 Demultiplexer.

Prior Preparation: Draw the circuits and make corresponding truth tables.

a) Verification of De Morgan’s theorems

Fig.7.1 Fig. 7.2

Input Output
A B 𝐴̅̅̅+𝐵̅̅ (RHS) 𝐴̅̅̅ • 𝐵̅̅(LHS)
Volt Logic Level Volt Logic Volt Logic Volt Logic
Level level level
0 0
0 1
1 0
1 1

Fig. 7.3 Fig. 7.4

Input Output
A B 𝐴̅̅̅•𝐵̅̅(RHS) 𝐴̅̅̅+𝐵̅̅(LHS)
Volt Logic Level Volt Logic Level Volt Logic Volt Logic
level level
0 0
0 1
1 0
1 1

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 b) To construct an Exclusive OR gate and a half adder circuit using IC-7400:

Fig. 7.5 Exclusive OR gate

Truth Table
Input Output
A B Y
Volt Logic Level Volt Logic Level Volt Logic Level
0 0
0 1
1 0
1 1

Fig: 7.5. Half adder using NAND gates

Truth Table
A B SUM CARRY
Volt Logic Level Volt Logic Volt Logic Level Volt Logic Level
Level
0
0
1
1
Exercise: (A) half subtractor using NAND gate (B) 2 to 1 multiplexer (C) 1 to 2 Demultiplexer
(D) Design a parity checker (E) Design a full adder

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 7. Digital Circuits-II
Aim: Assemble and study a) JK Flip-Flop, b) binary ripple counter and c) 4 bit serial in
Parallel out Shift Register using IC 7476.

Prior preparation: Work out the truth table as well as the Output wave shape for the give
square wave signal and the clock pulses.

a) JK Flip-Flop

Fig: 8.1 J-K Flip-flop

J K CLK Q 𝑸̅
Volt Logic Volt Logic Volt Logic level Volt Logic level
level level
0 0
0 1
1 0
1 1

Procedure:
1. Connect the J-K flip flop circuit as shown in figure 8.1 using IC 7476. In IC 7476 connect
the pin no. 5 to +5V and pin no. 13 to ground. Set J and K inputs to low (0 state) by
connecting the switches S1 and S3 to ground.
2. For initialization follow the following sequence of steps to enable the circuit:

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 Ck Cr Pr Q Remark
0 0 1 0 Clear
0 1 0 1 Preset
1 1 1 Qn+1 enable

Pr and Cr are not shown in in some of the circuits but are marked on IC’s. At each step
monitor Q. Once last row is ensured then don’t disturb Cr (1) and Pr (1) in entire
experiment. This procedure is to be adopted for all the circuits.

3. Connect a square wave input signal with peak voltage 5V and frequency 1 kHz to Ck input.
4. Verify all the row of the truth table.

b) Binary ripple counter

Fig: 8.2. Binary Ripple Counter (count down)

1. Assemble the binary ripple counter circuit as shown in figure 8.2. (initialise the circuit
as instructed at step 2 above). Now, connect the 5V input thereby setting J=K=1 state.
Connect the square wave from function generator as clock input (Ck) of 5V peak and
100Hz to 1kHz frequency (having offset of 0 volt). Display all the outputs on the
DSO Record the counting sequence. Find out whether the counting is up or down
[How will you reverse the counting from down to up or vice versa?]. Make the traces.
Also you can save the traces, take the printout and attach it to your report.
2. You can also try with LED, for it apply the clock frequency of 1-2 Hz (why?).

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Exercise

a) Design a 4 bit serial in Parallel out Shift Register

b) Design D Flip-Flop using JK Flip-Flop
c) Design T Flip-Flop using JK Flip-Flop
d) Design Binary Ripple counter (count up)

Pin-out diagrams for each IC chip are given in Appendix I.

Reference: J Millman and C C Halkias,’ Integrated Electronics, McGrawHill.:

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 8. Programming exercises using a 8085A µP trainer kit

Aim: Elementary programming exercises on a µP trainer kit.

Background: A µP trainer kit consists of basic units required for a simple computer,
namely, a microprocessor chip(CPU), memory(EPROM, and RAM), input device(Hex key-
pad and cassette tape) and output device(seven segment display unit- four address fields
followed by two data fields). Programmable peripheral chips such as 8155 and 8255 provide
the necessary interface between the µP and the external circuitry. These physical units
constitute the basic hardware of the system. Software in the form of a set of instructions written
using the 8085 instruction set makes the µP perform a set of desired operations. It has to borne
in mind that the instructions should be converted into the hexadecimal form while keying in
(most trainer kits come with a C language compiler to facilitate programming, but in this
exercise this provision is not used). A system program ( commonly called the operating
system) resides in the EPROM and gets loaded whenever the kit is switched on.l The
MICROFRIEND DYNA-85 kit given to you is based on the INTEL 8085 A . The CPU
operates at 3 MHz (system clock). The RAM locations (C000)16 to (FFFF)16 are available for
the user to enter any desired program. Single key system commands are provided in the trainer
kit for facilitating easy operation of the kits. These commands available in the form of soft
keys are described below:
<RES> →Does hardware reset. The word “FriEnd” appears in the display when pressed
<DCR>→Decrements memory address presently displayed
<INR>→ Increments memory address presently displayed
<EXEC>→ Starts execution of <GO> command
<SET>→ Used for modifying contents of RAM locations reserved for the user
<GO> → Used for loading the memory address of the beginning of the program
<STEP>→ For executing program in single step or break-point mode
<REG>→ Keys let you examine or modify the CPU registers [To use this command
press <REG> and press one A, B, C, D, E, F, 8 or 9 for choosing the registers A, B, C, D,
E, Flag H or L respectively. The flag register bits are
S Z X AC X P X C
where S is the sign flag, Z is the zero flag, AC is the auxiliary carry flag, P is
the plus flag and C is the carry flag (X means don’s care).
To enter a program, follow the following sequence:
<RES>
<SET> C000
XX ! first hex instruction is entered in the place of XX
<INR> ! this command increments address to C001
.
! enter the entire program by keying one 8 bit no. in hex
. in each location and moving to next by pressing <INR>
<INR> 76 ! last instruction in the program

To execute the entered program, use the following command:

<RES>
<GO> C000 ! load program which starts at address C000
<EXEC> ! execute the loaded program

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It is usually desired that the result of a computation is readily available after the execution of the
program. The subroutine called MODIDT which resides in the EPROM at the address (036E)16
can be used to display the contents of register A (accumulator) to the data fields of the display
units. In order to use this to display the result of any computation use following sequence
instructions:

<move result to register A>

<move zero into register B>
CALL MODIDT ! Key in the address 03 6E in the place of MODIDT

You should know that the CALL MODIDT commands changes the state of all CPU registers
and all flags and hence be careful to use this only towards the end of the program.

Exercises:
1. Add two 8 bit numbers with (a) one number in register A and the other in register B (b)
one number is in the register C and other in register H, (c) the two number in locations
C050 and C060.
2. Add two 16 bit numbers.
3. Subtract two 8 bit numbers in locations D030 and D0D0
4. Subtract two 16 bit numbers.
5. Find the largest and the smallest of the given three numbers in locations C150, C151 and
C152. Store the largest number in C156 and the smallest number in C157.
6. Multiply the given 8 bit numbers and displays the results.
7. Divide the given numbers. Display quotient in display fields.
8. Divide the indivisible numbers and display the quotient in display field and reminder in
location D135.

Load ten 8-bit numbers in ten memory locations and sort these according to ascending order.

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 9. Control Circuits
Aim: The aim of the experiment is to construct a control circuit and demonstrate.

Students need to prepare a control circuit with available components. The proposed circuit should be
submitted for approval at least Four weeks in advance. The working Circuit should be
demonstrated during regular lab class hours as per the schedule

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 Appendix I:

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 Pin diagram of IC 7402

Pin diagram of IC 74

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