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LAB EXPERIMENTS

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1
Contents
Experiment 1: DC Analysis - Ladder and Bridge Circuits ........................................................... 3
Objectives ............................................................................................................................... 3
Abstract .................................................................................................................................. 4
Introduction/ theory ................................................................................................................ 4
Equipment .............................................................................................................................. 4
Procedure................................................................................................................................ 5
Results .................................................................................................................................... 6
Theoretical calculations ...................................................................................................... 6
Data Tables ....................................................................................................................... 11
Questions & answers ......................................................................................................... 11
Discussion ............................................................................................................................ 14
Error Analysis ....................................................................................................................... 15
Conclusion............................................................................................................................ 15
Experiment 2: Inverting Amplifier Analysis .............................................................................. 16
Objectives ............................................................................................................................. 16
Abstract ................................................................................................................................ 16
Introduction/ theory .............................................................................................................. 16
Equipment ............................................................................................................................ 17
Schematics ............................................................................................................................ 18
Procedure.............................................................................................................................. 18
Results .................................................................................................................................. 19
Theoretical calculations .................................................................................................... 19
Data Tables ....................................................................................................................... 21
Graphs .............................................................................................................................. 21
Questions & answers ......................................................................................................... 23
Discussion ............................................................................................................................ 24
Error Analysis ....................................................................................................................... 25
Conclusion............................................................................................................................ 25
Experiment 3: Thevenin’s Theorem Verification ....................................................................... 26
Objectives ............................................................................................................................. 26
Abstract ................................................................................................................................ 26
Introduction/Theory .............................................................................................................. 26
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 Equipment ............................................................................................................................ 26
Schematics ............................................................................................................................ 27
Procedure.............................................................................................................................. 27
Results .................................................................................................................................. 28
Theoretical Calculations .................................................................................................... 28
Data Tables ....................................................................................................................... 30
Questions & answers ......................................................................................................... 31
Discussion ............................................................................................................................ 32
Error Analysis ....................................................................................................................... 33
Conclusion............................................................................................................................ 33
Experiment 4: Capacitive Reactance Verification ...................................................................... 34
Objectives ............................................................................................................................. 34
Abstract ................................................................................................................................ 34
Introduction/Theory .............................................................................................................. 34
Equipment ............................................................................................................................ 35
Schematics ............................................................................................................................ 35
Procedure.............................................................................................................................. 35
Results .................................................................................................................................. 37
Data Tables ....................................................................................................................... 37
Questions & answers ......................................................................................................... 39
Discussion ............................................................................................................................ 40
Error Analysis ....................................................................................................................... 40
Conclusion............................................................................................................................ 41
References ................................................................................................................................ 42
Appendices ............................................................................................................................... 43
Appendix A: A graph of 𝑋𝑐 against incremented frequency ................................................... 43
Appendix B: A graph of 𝑉𝑐 against the decremented frequency ............................................ 43

Experiment 1: DC Analysis - Ladder and Bridge Circuits

Objectives
i. To demonstrate analysis on a series-parallel DC circuit, basic ladder network and bridge are examined.
ii. To demonstrate the concept of loading, that is, the effect that a sub-circuit may have on a neighboring sub-circuit.
3
 Abstract
This experiment explores the analysis of series-parallel DC circuits, focusing on basic ladder networks and bridge
configurations. It aims to demonstrate the impact of circuit loading, highlighting how a sub-circuit can influence
its neighboring sub-circuit. By systematically analyzing voltage, current, and resistance within these networks,
the study provides insights into practical circuit behavior and interdependencies. The findings contribute to a
deeper understanding of circuit design principles, essential for optimizing electrical system performance.

Introduction/ theory
In electrical circuit analysis, series-parallel DC circuits consist of components arranged in a combination of series
and parallel configurations. These circuits require systematic analysis using fundamental electrical laws such as
Ohm’s Law, Kirchhoff’s Voltage Law (KVL), and Kirchhoff’s Current Law (KCL) to determine voltage drops,
current distribution, and overall circuit behavior. Series components share the same current but have different
voltage drops, while parallel components share the same voltage but may have different currents, [1].
A ladder network is a specific type of circuit structure composed of a repeating sequence of resistors or impedance
elements, resembling the shape of a ladder. These networks are commonly found in applications such as signal
processing, attenuation circuits, and impedance matching in communication systems. Similarly, a bridge circuit,
such as the Wheatstone bridge, is a fundamental electrical network used to measure unknown resistances with
high precision by balancing voltage drops across its branches. Bridges are widely used in sensor applications,
resistance measurement, and instrumentation, [1].

Another key concept in circuit analysis is loading, which refers to the effect that a sub-circuit or connected
component has on a neighboring sub-circuit. When a load is added to a circuit, it draws additional current, which
can alter the voltage distribution and affect the performance of other circuit elements. The impact of loading is
particularly significant in sensitive measurement and signal processing circuits, where an unintended voltage drop
or current change can lead to errors. Understanding how loading influences circuit behavior is crucial in practical
electronic design to ensure accurate measurements, stable operation, and efficient power distribution.

Equipment
 One DMM
 One Dual-polarity variable dc power supply
 Six resistors: the 6 resistors are tabulated in table 1 below.

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 Table 1: theoretical and actual resistance values

Theoretical value (𝒌𝜴) Actual value (𝒌𝜴)

1 0.977
2.2 2.178
3.3 3.38
6.8 6.78
10 9.776
22 21.5
Schematics

Figure 1.1

Figure 1. 2

Procedure

i. The circuit in Figure 1.1 was constructed using the given resistances:
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 ii. 𝑅1 = 1 𝑘𝛺, 𝑅2 = 2.2 𝑘𝛺, 𝑅3 = 3.3 𝑘𝛺, 𝑅4 = 6.8 𝑘𝛺, 𝑅5 = 10 𝑘𝛺, 𝑅6 = 22 𝑘𝛺, and a 15V
power supply.
iii. Based on the observations from step 1, the theoretical voltages at nodes A, B, C, and D were determined
and recorded in Table 1.1.
iv. A Digital Multimeter (DMM) was used to measure the actual potentials at nodes A, B, C, and D. The
deviations between the measured and theoretical values were computed and recorded in Table 1.1.
v. Using the theoretical voltages obtained in Table 1.1, the currents through R1, R2, R4, and R6 were
calculated and recorded in Table 1.2.
vi. The actual currents through R1, R2, R4, and R6 were measured using a DMM, and the deviations from
the theoretical values were computed and recorded in Table 1.2.
vii. The circuit in Figure 1.2 was assembled using:
viii. 𝑅1 = 1 𝑘𝛺, 𝑅2 = 2.2 𝑘𝛺, 𝑅3 = 10 𝑘𝛺, 𝑅4 = 6.8 𝑘𝛺, 𝑎𝑛𝑑 𝑎 10𝑉 power supply.
ix. The theoretical values for VA, VB, and VAB were determined and recorded in Table 1.3. The voltage
divider rule was applied, considering that the R1-R2 and R3-R4 branches were in parallel and both
experienced the source voltage.
x. A DMM was used to measure the potentials at points A and B with respect to the ground. The red lead
was placed at the point of interest, while the black lead was connected to the ground.
xi. To measure the voltage VAB, the red lead was connected to point A, and the black lead was connected
to point B. These values were recorded in Table 1.3.
xii. The deviations between the measured and theoretical values were determined and recorded in Table 1.3.

Results
Theoretical calculations
Theoretical voltage value computation (figure 1.1)

We are given the circuit with the following resistances:

R1=1kΩ, R2=2.2kΩ, R3=3.3kΩ, R4=6.8kΩ, R5=10kΩ, R6=22kΩ

The voltage source:

E=15V

The node voltages are:

𝑉𝐴 , 𝑉𝐵 , 𝑉𝐶 & 𝑉𝐷

Since 𝑉𝐴 is directly connected to the source, its value will be 15v.

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Now, the unknown node voltages are , 𝑉𝐵 , 𝑉𝐶 & 𝑉𝐷

Apply Kirchhoff’s Current Law (KCL)

At Node B:

𝑉𝐴 −𝑉𝐵 𝑉𝐵 𝑉𝐵 −𝑉𝐶
= + ……………………………………. (1)
𝑅1 𝑅2 𝑅3

Substituting values:

15−𝑉𝐵 𝑉𝐵 𝑉𝐵 −𝑉𝐶
= + …………………………………. (2)
1𝑘 2.2𝑘 3.3𝑘

Multiplying through by 1000 to remove denominators:

15−𝑉𝐵 𝐵𝑉 𝑉𝐵 −𝑉𝐶
= 2.2 + …………………………..………. (3)
1 3.3

At Node C:

𝑉𝐵 −𝑉𝐶 𝑉𝐶 −𝑉𝐷 𝑉𝐶
+ = ……………………………………. (4)
𝑅3 𝑅4 𝑅5

Substituting values:

𝑉𝐵 −𝑉𝐶 𝑉𝐶 −𝑉𝐷 𝐶 𝑉
+ = 10𝑘 …………………………………. (5)
3.3𝑘 6.8𝑘

Multiplying through by 1000:

𝑉𝐵 −𝑉𝐶 𝑉𝐶 −𝑉𝐷 𝑉
+ = 10𝐶 ……………………………………. (6)
3.3 6.8

At Node D:

𝑉𝐶 −𝑉𝐷 𝑉𝐷
= ……………………………………………. (7)
𝑅4 𝑅6

Substituting values:

𝑉𝐶 −𝑉𝐷 𝐷 𝑉
= 22𝑘 ……………………………………………. (8)
6.8𝑘

Multiplying through by 1000:

𝑉𝐶 −𝑉𝐷 𝑉𝐷
= ………………………………………………. (9)
6.8 22

Solving the System of Equations

Utilizing equations (3, 6 & 9) the node voltages can be determined.

7
Step 1: Converting to Standard Form

We express these equations in the form:

𝐴11 𝑉𝐵 + 𝐴12 𝑉𝐶 + 𝐴13 𝑉𝐷 = 𝐵1 ……………………………… (10)

𝐴21 𝑉𝐵 + 𝐴22 𝑉𝐶 + 𝐴23 𝑉𝐷 = 𝐵2 ……………………………… (11)

𝐴31 𝑉𝐵 + 𝐴32 𝑉𝐶 + 𝐴33 𝑉𝐷 = 𝐵3 ………………………………. (12)

Where the coefficients are:

1 1 1 1
(𝑅 + 𝑅 + 𝑅 ) −𝑅 0 15
1 2 3 3
(𝑅 )
1 1 1 1 1
𝐴= −𝑅 (𝑅 + 𝑅 + 𝑅 ) −𝑅 and 𝐵 = [ 01 ]
3 3 4 5 4
1 1 1 0
[ 0 −𝑅 (𝑅 + 𝑅 )]
4 4 6

Now, expanding equations (10, 11 & 12) we shall have;

17.575𝑉𝐵 − 3.0 3𝑉𝐶 = 150 ………………………………. (13)

3.0 3𝑉𝐵 − 4.0 3𝑉𝐶 − 1.47𝑉𝐷 = 0 …………………………. (14)

1.47𝑉𝐶 − 1.924𝑉𝐷 = 0 …………………………………… (15)

Step 2: solving via matrix method

Via matrix method, the values for node voltages in equations (13,14 &15) will be:

17.575 −3,03 0 𝑉𝐵 150

[ 3.03 −4.03 −1.47 ] [ 𝑉𝐶 ] = [ 0 ]
0 1.47 −1.924 𝑉𝐷 0

Solving this matrix via calculator, we have

𝑉𝐵 = 9.69𝑉, 𝑉𝐶 = 6.71𝑉 𝑎𝑛𝑑 𝑉𝐷 = 5.12𝑉

This is recorded in table 1.1.

Theoretical current computation (figure 1.1)

Now that we have the node voltages:

𝑉𝐵 = 9.69𝑉, 𝑉𝐶 = 6.71𝑉 𝑎𝑛𝑑 𝑉𝐷 = 5.12𝑉

we can calculate the current across each resistor using Ohm’s Law:

8
 𝑉
𝐼 = 𝑅 …………………………………………. (16)

i. Current through 𝑅1

𝑉𝐴 − 𝑉𝐵 15 − 9.69
𝐼𝑅1 = ( )=( ) = 5.31𝑚𝐴
𝑅1 1𝑘

ii. Current through 𝑅2

𝑉𝐵 9.69
𝐼𝑅2 = ( )=( ) = 4.41𝑚𝐴
𝑅2 2.2𝑘
iii. Current through 𝑅3
𝑉𝐵 − 𝑉𝐶 9.69 − 6.71
𝐼𝑅3 = ( )=( ) = 0.90𝑚𝐴
𝑅3 3.3𝑘

iv. Current through 𝑅4

𝑉𝐶 6.71
𝐼𝑅4 = ( )=( ) = 0.671𝑚𝐴
𝑅4 6.8𝑘
v. Current through 𝑅5
𝑉𝐶 − 𝑉𝐷 6.71 − 5.12
𝐼𝑅5 = ( )=( ) = 0.159𝑚𝐴
𝑅5 10𝑘
vi. Current through 𝑅6
𝑉𝐷 5.12
𝐼𝑅6 = ( )=( ) = 0.233𝑚𝐴
𝑅6 22𝑘

Theoretical voltage value computation (figure 1.2)

Step 1: Define Node Voltages

𝑉𝐴 is the voltage at node A (between 𝑅1 , 𝑅2 and 𝑅3 ).

𝑉𝐵 is the voltage at node B (between 𝑅3 & 𝑅4 ).

Ground (0V) is at the negative terminal of the battery.

Step 2: Apply Kirchhoff’s Current Law (KCL)

𝑉
Using Ohm’s Law, 𝐼 = 𝑅 we write equations for each node.

At Node A:

9
 10 − 𝑉𝐴 𝑉𝐵 − 𝑉𝐴 𝑉𝐴
+ =
𝑅1 𝑅3 𝑅2

Substituting the values:

10 − 𝑉𝐴 𝑉𝐵 − 𝑉𝐴 𝑉𝐴
+ =
1𝑘 10𝑘 2.2𝑘

Multiplying by 2.2k to clear the fractions:

22(10 − 𝑉𝐴 ) + 2.2(𝑉𝐵 − 𝑉𝐴 ) = 10𝑉𝐴

220 − 22𝑉𝐴 + 2.2𝑉𝐵 − 2.2𝑉𝐴 = 10𝑉𝐴

34.2𝑉𝐴 − 2.2𝑉𝐵 = 220 ……………………………………. (a)

At Node B:

𝑉𝐴 − 𝑉𝐵 𝑉𝐵
=
𝑅3 𝑅4

Substituting values:

𝑉𝐴 − 𝑉𝐵 𝑉𝐵
=
10𝑘 6.8𝑘

Multiplying by 6.8k to clear fractions:

6.8(𝑉𝐴 − 𝑉𝐵 ) = 10𝑉𝐵

6.8𝑉𝐴 − 6.8𝑉𝐵 = 10𝑉𝐵

6.8𝑉𝐴 = 16.8𝑉𝐵

6.8𝑉𝐴 − 16.8𝑉𝐵 = 0 ………………………………………. (b)

Step 3: Solve for 𝑉𝐴 & 𝑉𝐵

Solving equations (a & b) simultaneously we shall have:

𝑉𝐴 = 6.59𝑉 & 𝑉𝐵 = 2.67𝑉

Computation for 𝑉𝐴𝐵

Voltage 𝑉𝐴𝐵 = 𝑉𝐴 − 𝑉𝐵 = 6.59 − 2.67 = 3.92𝑉

10
 Data Tables
Table 1.1: Theoretical and measured voltage values for figure 1.1

Voltage Theoretical Measured Deviation

Voltage (V) Voltage (𝑽) (V)
𝑽𝑨 15.000 15.000 0.000
𝑽𝑩 9.690 9.659 0.031
𝑽𝑪 6.710 6.000 0.710
𝑽𝑫 5.12 4.150 0970

Table 1.2: Theoretical and measured current values for figure 1.1

Current through Theoretical Measured current Deviation

current (𝒎𝑨) (𝒎𝑨)
𝑹𝟏 5.31 5.5 0.190
𝑹𝟐 4.41 4.23 0.090
𝑹𝟒 0.90 0.877 0.023
𝑹𝟔 0.23 0.189 0.041

Table 1.3: Theoretical and measured Voltage reading for figure 1.2

Voltage Theoretical Measured Deviation

Voltage (V) Voltage (𝑽)
𝑽𝑨 6.59 6.20 0.39
𝑽𝑩 2.67 2.70 0.03
𝑽𝑨𝑩 3.92 3.97 0.05

Questions & answers

i. In figure 1.1, if another pair of resistors was added across R6, would VD go up, down, or stay the same?
Why?

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Answer

𝑉𝐷 would go down.

Explanation:

Adding another pair of resistors across 𝑅6 creates a parallel connection, effectively reducing the equivalent
resistance at node D. Since this node is connected in a resistive voltage divider, a lower equivalent resistance in
this path will cause a higher proportion of the supply voltage to drop across the previous resistors, thus reducing
𝑉𝐷 .

ii. In figure 1.1, if R4 was accidentally opened would this change the potentials at B, C and D? Why or why
not?

Answer:

Yes, the potentials at B, C, and D would change.

Explanation:

If 𝑅4 is open, no current will flow through it.

This alters the current distribution in the circuit, particularly affecting node C.

Since 𝑅4 was originally in parallel with 𝑅5 , removing it increases the equivalent resistance at C, increasing the
voltage at that node.

Consequently, the voltage at D might also change due to the redistribution of voltage drops across the remaining
resistors.

iii. If the DMM leads are reversed in step 5, what happens to the measurements in Table 1.3?

Answer:

The voltage readings would have the same magnitude but opposite signs.

Explanation:

A Digital Multimeter (DMM) measures voltage as a potential difference between two points.

If the leads are reversed, the reference ground (black lead) and the measurement point (red lead) are swapped.

12
This does not change the absolute voltage difference but instead reverses the polarity, meaning that all measured
voltages would have the opposite sign (e.g., a reading of +5V would become −5V).

iv. Suppose that R3 and R4 are accidentally swapped in figure 1.2. What is the new VAB?

Answer

Initially, before swapping, the circuit used:

R3=10kΩ

R4=6.8kΩ

After swapping, the new values are:

R3=6.8kΩ

R4=10kΩ

Step 1: Calculate 𝑽𝑨

Node A is formed by a voltage divider using 𝑹𝟏 and 𝑹𝟐 . A voltage divider distributes the total voltage across
two series resistors based on their resistance ratio.

Using the voltage divider rule:

𝑹𝟐
𝑽𝑨 = ×𝑬
𝑹 𝟏 + 𝑹𝟐

Substituting values:

𝟐. 𝟐𝒌
𝑽𝑨 = × 𝟏𝟎
𝟏𝒌 + 𝟐. 𝟐𝒌

This means that Node A is at 6.875V.

Step 2: Calculate 𝑽𝑩

Node B is also formed by a voltage divider, but now with the new resistances:

Before swap:

R3=10kΩ

R4=6.8kΩ.

After swap:
13
R3=6.8kΩ
R4=10kΩ.

Again, using the voltage divider formula:

𝑹𝟒
𝑽𝑨 = ×𝑬
𝑹 𝟑 + 𝑹𝟒

Substituting values:

𝟏𝟎𝒌
𝑽𝑨 = × 𝟏𝟎
𝟔. 𝟖𝒌 + 𝟏𝟎𝒌

This means that Node B is at 4.09V.

Step 3: Find 𝑽𝑨𝑩

The voltage difference between the two nodes is:

𝑽𝑨𝑩 = 𝑽𝑨 − 𝑽𝑩 = 𝟔. 𝟖𝟓 − 𝟒. 𝟎𝟗 = 𝟐. 𝟕𝟓𝑽

Swapping 𝑅3 and 𝑅4 changes the voltage divider ratio, which affects 𝑉𝐵 .

Since 𝑅4 is now larger than 𝑅3 , more voltage is dropped across 𝑅4 , lowering VB.

As a result, 𝑉𝐴𝐵 changes to 2.75V instead of the previous value.

Thus, swapping resistors changes the potential at Node B, altering the voltage difference VAB .

Discussion
The experiment involved constructing electrical circuits as depicted in Figures 1.1 and 1.2 using specified
resistances and voltage sources. Theoretical voltage values at key nodes were determined through Kirchhoff’s
Current Law (KCL) and recorded. Using a Digital Multimeter (DMM), actual node voltages were measured and
compared against theoretical values, with deviations noted in Table 1.1. Subsequently, currents through specific
resistors were computed theoretically and measured practically using the DMM, with discrepancies documented
in Table 1.2. In the second circuit (Figure 1.2), node voltages and voltage drops were determined theoretically
based on the voltage divider principle and verified experimentally. The collected data provided insights into circuit
behavior and validated theoretical calculations through practical measurements.

14
 Error Analysis
The error analysis in this experiment primarily stems from differences between theoretical and measured values
of voltages and currents within the series-parallel DC circuits. These discrepancies can be attributed to several
factors, including resistor tolerances, which introduce variations in actual resistance values, leading to deviations
in expected voltage drops and current distribution. Additionally, measurement errors due to the internal resistance
of the digital multimeter (DMM) and potential contact resistance at circuit connections may have influenced
accuracy. Another key factor is circuit loading, where the interaction between sub-circuits affects voltage and
current distribution differently than idealized theoretical models predict. Minor power supply fluctuations and
environmental conditions, such as temperature variations, could also have contributed to the observed differences.

Conclusion
The experiment involved constructing circuits and analyzing node voltages and currents using Kirchhoff’s
Current Law and the voltage divider principle. Theoretical and experimental values were compared using a Digital
Multimeter, with deviations recorded. The results validated theoretical calculations and provided insights into
circuit behavior.

15
 Experiment 2: Inverting Amplifier Analysis
Objectives
i. To demonstrate the operation of the inverting amplifier.
ii. To demonstrate the effect of resistor faults on the operation of the inverting amplifier.

Abstract
This experiment investigates the operation of an inverting amplifier, a fundamental configuration of an operational
amplifier (op-amp) that provides phase-inverted signal amplification. The experiment explores the relationship
between input and output voltages, gain calculation, and the role of feedback resistance in determining
amplification levels. Additionally, the effects of resistor faults, such as open or shorted resistors, on the amplifier’s
performance are examined. By analyzing circuit behavior under normal and faulty conditions, the experiment
highlights the importance of component integrity in maintaining expected signal processing performance .

Introduction/ theory
Operational amplifiers (op-amps) are fundamental components in analog electronics, widely used in
amplification, filtering, and signal processing applications. One of the most common configurations is the
inverting amplifier, which provides a controlled gain while inverting the phase of the input signal. This
configuration is achieved by applying the input voltage to the inverting (-) terminal of the op-amp through an
input resistor (Rin), while the non-inverting (+) terminal is grounded. A feedback resistor (Rf) is connected
between the output and the inverting terminal, forming a negative feedback loop that stabilizes the gain and
enhances circuit performance, [1, 2].

The voltage gain (Av of an inverting amplifier is given by the equation:

−𝑅𝑓
𝐴𝑣 = ………………………………………………. (2.1)
𝑅𝑖𝑛

where:

 Rf is the feedback resistor,

 Rin is the input resistor.

The negative sign indicates a 180-degree phase shift, meaning the output signal is inverted relative to the input.
This behavior makes inverting amplifiers useful in applications where signal inversion is required, such as active
filters, summing amplifiers, and phase-sensitive detection circuits.

16
The performance of an inverting amplifier is significantly affected by its components, especially resistors.
Resistor faults—such as open circuits (infinite resistance), short circuits (zero resistance), or component
degradation—can lead to severe functional deviations. For instance:

 An open feedback resistor (Rf) disrupts the negative feedback loop, causing the op-amp to operate in an open-
loop condition, which results in output saturation at the supply rails.
 A shorted input resistor (Rin) allows excessive current to flow into the op-amp, potentially damaging the
device or leading to incorrect gain values.
 A damaged resistor with varying resistance values can cause unstable gain, affecting signal integrity and
amplifier reliability.

By analyzing the operation of a properly functioning inverting amplifier and investigating the impact of resistor
faults, this experiment provides insights into circuit behavior, fault diagnosis, and the importance of accurate
component selection. Understanding these principles is essential for designing robust amplifier circuits in real-
world applications, such as signal processing, instrumentation, and audio amplification, [2].

Equipment
 One DMM
 One Dual-polarity variable dc power supply One Variable ac signal generator
 One Dual-trace oscilloscope
 One μA741 Op-amp (or equivalent)
 Nine resistors:
470 𝛺, 1 𝑘𝛺, 10 𝑘𝛺 (3), 27 𝑘𝛺, 39 𝑘𝛺, 47 𝑘𝛺, 𝑎𝑛𝑑 82 𝑘𝛺 (𝑜𝑟 𝑒𝑞𝑢𝑖𝑣𝑎𝑙𝑒𝑛𝑡)
 One 1-kΩ Potentiometer (if available)

17
 Schematics

Figure 2.1

Figure 2.2

Procedure
i. The circuit shown in Figure 2.2 was constructed.
ii. Power was applied to the circuit. The signal generator was adjusted to provide a 1 𝑉𝑝𝑝 output at a frequency
of 1 kHz. The input signal was then applied to the amplifier. (Note: If a function generator with DC offset
controls was used, the offset was set to 0 V).
iii. The oscilloscope was set up to measure the circuit's input and output waveforms simultaneously. The
measured waveforms were acquired from the oscilloscope and included in the report.
iv. The AC voltage gain (𝐴𝐶 ) of the circuit was calculated.
v. The peak-to-peak input voltage (𝑉𝑖 ) and the peak-to-peak output voltage (𝑉0 ) were measured and recorded.
vi. Using the values obtained in Step 5, the closed-loop gain (𝐴𝐶𝐿 ) and AC gain (𝐴𝐶 ) were calculated.
vii. The percentage error between the theoretical and measured values of gain (from Steps 4 and 6) was calculated.
viii. The resistance values in Table 2.1 were replaced with different resistor values. For each value of 𝑅𝑓, the
corresponding voltage gain was measured and recorded in the table.
18
 ix. The input level was increased to 5 𝑉𝑝𝑝, and Rf was reset to 10 𝑘𝛺. A 10 𝑘𝛺 resistor was connected as a load,
and the voltage gain of the amplifier was measured.
x. The collector resistor (RC) was changed to 1 𝑘𝛺 and then to 470 𝑘𝛺. For each value, the voltage gain was
measured and recorded. The effect of the changing load on the amplifier’s performance was noted.
xi. A 1 𝑘𝛺 potentiometer was set to its maximum setting and connected as the load. The resistance value was
gradually decreased until the waveform started to distort or clip. At this point, the resistance value was
measured and recorded.
xii. Rf was removed from the circuit, and the circuit's output waveform was observed and documented in the
report.
xiii. Rf was reconnected, and Ri was removed. The resulting circuit output waveform was observed and included
in the report.

Results
Theoretical calculations
The Closed-Loop Gain (𝐴𝐶𝐿 )of an inverting amplifier is calculated using the formula:

𝑉
𝐴𝐶𝐿 = 𝑉0 where:
𝑖

 𝐴𝐶𝐿 is the closed-loop gain,

 𝑉0 is the measured output voltage (peak-to-peak),
 𝑉𝑖 is the measured input voltage (peak-to-peak).

Alternatively, if the resistor values are known, the theoretical gain for an ideal inverting amplifier is given by:

−𝑅𝑓
𝐴𝐶𝐿 = ………………………………. (2.2)
𝑅𝑖

where:

 𝑅𝑓 is the feedback resistor,

 𝑅𝑖 is the input resistor.

The negative sign indicates that the output is 180° out of phase with the input. However, when measuring the gain
experimentally, we the absolute value is considered.

From the experiment, the value of 𝐴𝐶𝐿 was obtained using the given resistors 𝑅𝑓 and 𝑅𝑖

−𝑅𝑓 10
i.e. 𝐴𝐶𝐿 = | |=[ ]=1
𝑅𝑖 10

19
The peak-to-peak input and output voltages were found to be:

𝑉𝑝𝑝(𝑖𝑛) = 1.0𝑉 and 𝑉𝑝𝑝(𝑜𝑢𝑡) = 1.02𝑉

The values of the peak -to- peak voltage was arrived at by taking the average of the 3 obtained values, i.e.,

(1.02 + 1 + 1.04)
𝑉𝑝𝑝(𝑜𝑢𝑡) = = 1.02𝑉
3

Calculating the value of 𝑨𝑪𝑳 using the peak-to-peak voltages

As highlighted earlier,

𝑉0
𝐴𝐶𝐿 =
𝑉𝑖

Hence,

𝑉0 1.02
𝐴𝐶𝐿 = = = 1.02
𝑉𝑖 1.00

Percentage error in the obtained 𝐴𝐶𝐿

𝐴𝐶𝐿 obtained using feedback and input resistor ratio was 1.0 while the one obtained using peak-to-peak voltage
ratio was 1.02.

𝑒𝑟𝑜𝑟 = |𝐴𝐶𝐿 (𝑅𝑓 , 𝑅𝑖 ) − 𝐴𝐶𝐿 (𝑉0 , 𝑉𝑖 )| = |1.00 − 1.02| = 0.02

0.02
%𝑒𝑟𝑜𝑟 = × 100 = 2%
1

Voltage gains at input 𝒗𝒑𝒑 = 𝟓𝒗

𝑹𝒇
𝐴𝐶𝐿 = − …………………………………………………. (2.3)
𝑹𝒊 +(𝑹𝟎 ||𝑹𝑳 )

Where:

𝑅𝑓 is the feedback resistor.

𝑅0 is the output impedance of the op-amp

𝑅𝑖 is the input resistor

𝑅𝐿 is the load resistor

Taking the output impedance of the op-amp to be very small hence negligible, then:
20
 𝑹𝒇
𝐴𝐶𝐿 = − 𝑹 +(𝑹 ) ………………………………………………. (2.4)
𝒊 𝑳

Data Tables
Table 2.1: Voltage gain at different feedback resistances

𝑹𝒇 𝑅𝑖 𝑽𝒊 𝑽𝟎 𝑨𝑪𝑳 (𝑹𝒇 , 𝑹𝒊 ) 𝑨𝑪𝑳 (𝑽𝟎 , 𝑽𝒊 ) % error

27k 10k 1.0 2.72 2.7 2.72 2

39k 10k 1.0 3.88 3.9 3.88 1
47k 10k 1.0 4.67 4.7 4.67 3
82k 10k 1.0 8.18 8.2 8.18 2

Table2.2: Voltage gains at different load resistances

𝑹𝒇 𝑹𝒊 𝑹𝑳 𝑨𝑪𝑳
10k 10k 1k 0.909
10k 10k 10k 0.500
10k 10k 470k 0.021
Based on the voltage gain values obtained for different load resistors, it is evident that the gain is lower than the
original unloaded gain. This is the case because the load resistor introduced additional current flow, affecting the
amplifier’s output voltage.

Graphs
Distorted waveform with decreased 𝑹𝑪
21
 Figure2.1: Distorted waveform (high gain)

Waveform with the 𝑹𝒇 omitted and 𝑹𝒊 intact

Figure 2.2: feedback resistor omitted (low gain)

Waveform with the 𝑹𝒊 omitted and 𝑹𝒇 intact

22
 Figure 2.3: Feedback resistor in place (moderate gain)

Questions & answers

i. How would you account for the percents of error obtained in steps 7 and 8 of the procedure?

Answers

The percentage errors obtained can be attributed to several factors, including component tolerances, oscilloscope
resolution, and noise in the circuit. Resistors typically have a tolerance (e.g., ±5%), which affects the theoretical
gain calculations. Additionally, inaccuracies in measuring peak-to-peak voltages on the oscilloscope, variations
in op-amp parameters such as bandwidth limitations, and unaccounted stray capacitance or parasitic resistance
could contribute to the observed discrepancies.

ii. Based upon your knowledge of op-amps, explain why the voltage gain responded as it did to the changes in
load recorded in step 9.

Answer

The voltage gain decreased as the load resistance (RL) decreased because the amplifier had to supply more current
to the load, leading to an increased voltage drop across the output impedance of the op-amp. Since real op-amps
have a nonzero output impedance, the presence of a low RL creates a voltage divider effect between the output
impedance and RL, reducing the effective output voltage and, consequently, the voltage gain.

23
iii. Based upon your knowledge of the output impedance of op-amps, explain why the waveform started to clip
at the load value recorded in step 10.

Answer

Clipping occurs when the op-amp can no longer provide the required output voltage due to current limitations
imposed by its output impedance. As the load resistance decreased, the current demand increased, eventually
exceeding the op-amp’s output drive capability. This resulted in voltage saturation at the supply rails, causing the
waveform to clip since the amplifier could not deliver the full expected signal.

iv. How would you account for the output waveform observed in step 11 of the procedure?

Answer

When Rf was removed from the circuit, the amplifier lost its negative feedback, essentially operating in an open-
loop configuration. In this mode, the gain of the op-amp became extremely high (typically in the range of 10⁴–
10⁶), making it highly sensitive to even small input signals. This likely led to saturation, where the output
waveform was either fully positive or fully negative, rather than a properly amplified version of the input.

v. How would you account for the output waveform observed in step 12 of the procedure?

Answer

When Ri was removed, the input impedance of the amplifier significantly increased, and the circuit might have
behaved unpredictably, possibly acting as a comparator rather than a linear amplifier. Depending on the residual
input offset voltage and any external noise, the output may have fluctuated between the positive and negative
supply rails, leading to a distorted or erratic waveform.

Discussion
The experiment aimed to analyze the voltage gain characteristics of an inverting amplifier by varying the feedback
resistor (Rf) and load resistor (RL) while maintaining a fixed input signal of 1 𝑉𝑝𝑝 at 1 kHz. The oscilloscope
was used to observe input and output waveforms, and gain calculations were performed using both theoretical
and experimental methods. The results showed that as Rf increased, the voltage gain also increased, closely
−𝑹𝒇
aligning with the theoretical formula 𝑨𝑪𝑳 = , with minimal percentage errors (1-3%). Additionally,
𝑹𝒊

introducing a load resistor (RL) reduced the gain, as observed in Table 2.2, due to increased current draw, which
affected the amplifier’s output voltage. The highest gain reduction occurred when RL was 470 kΩ, confirming
the impact of loading effects on amplifier performance. The experiment also demonstrated waveform distortion

24
when resistance values were altered significantly, reinforcing the role of feedback and load resistance in
determining amplifier behavior.

Error Analysis
The percentage error in the obtained closed-loop gain is primarily due to component tolerances, oscilloscope
resolution, and circuit noise. Resistors typically have a tolerance (e.g., ±5%), which affects the theoretical gain
calculations. Additionally, inaccuracies in measuring peak-to-peak voltages on the oscilloscope, variations in op-
amp parameters such as bandwidth limitations, and unaccounted stray capacitance or parasitic resistance
contribute to the observed discrepancies. These factors collectively result in minor deviations between the
theoretical and experimental gain values.

Conclusion
The experiment analyzed the voltage gain of an inverting amplifier by varying the feedback and load resistors
while keeping a fixed input signal. Results showed that increasing Rf increased gain, aligning with theoretical
predictions, while adding RL reduced gain due to loading effects. Minimal percentage errors (1-3%) confirmed
accuracy, and waveform distortions highlighted the influence of resistance on amplifier performance.

25
 Experiment 3: Thevenin’s Theorem Verification
Objectives
i. To examine the use of Thevenin’s theorem to create simpler versions of DC circuits as an aide to analysis.
ii. To explore multiple methods of experimentally obtaining the Thevenin resistance.

Abstract
This experiment aimed to verify Thevenin’s theorem by simplifying complex DC circuits into their Thevenin
equivalent forms. The objectives were to analyze how Thevenin’s theorem can be used to create simpler circuit
representations and to explore different methods for determining Thevenin resistance experimentally. A given
circuit was analyzed by measuring open-circuit voltage and Thevenin resistance, followed by validation using
theoretical calculations. The experimental results were compared with theoretical predictions, highlighting the
effectiveness of Thevenin’s theorem in circuit simplification and analysis.

Introduction/Theory
Thevenin’s theorem states that any linear electrical circuit with multiple sources and resistors can be simplified
into an equivalent circuit consisting of a single voltage source (Thevenin voltage, 𝑉𝑡ℎ ) and a single series
resistance (Thevenin resistance, 𝑅𝑡ℎ ). This simplification makes circuit analysis more manageable, especially
when evaluating the effect of varying load resistances. The theorem is particularly useful in network reduction,
helping engineers analyze and design circuits more efficiently. Thevenin's equivalent circuit is determined by first
calculating the open-circuit voltage across the terminals where the load is connected and then determining the
equivalent resistance seen from those terminals with independent sources deactivated, [3].

In practical applications, Thevenin’s theorem is used in power distribution systems, sensor interfacing, and
impedance matching to ensure maximum power transfer. Experimentally, 𝑅𝑡ℎ can be obtained using multiple
methods, such as measuring the circuit’s response to different loads or using source transformation techniques.
By verifying Thevenin’s theorem experimentally, this study demonstrates its applicability in simplifying circuit
analysis while ensuring accuracy in predicting voltage and current behavior in electrical networks, [3].

Equipment
 One DMM
 One Dual-polarity variable dc power supply
 One Dual-trace oscilloscope (if necessary)
 Five Resistors:

 2.2 𝑘𝛺 (1), 3.3 𝑘𝛺 (1), 4.7 𝑘𝛺, 6.8 𝑘𝛺 𝑎𝑛𝑑 8.2 𝑘𝛺 (𝑜𝑟 𝑒𝑞𝑢𝑖𝑣𝑎𝑙𝑒𝑛𝑡)

26
  One 10 𝑘𝛺 potentiometer or resistance decade box (if available)

Schematics

Figure 3.1

Figure 3.2

Procedure

i. The circuit shown in Figure 3.1 was analyzed using standard series-parallel techniques with E=10V,
R1=3.3kΩ, R2=6.8kΩ, R3=4.7kΩ, and R4=8.2kΩ. The voltage across the load R4 was determined and
recorded in Table 3.1. This process was then repeated using R4=2.2kΩ.
ii. The circuit of Figure 3.1 was then built using the specified values, with R4=8.2kΩ. The load voltage was
measured and recorded in Table 3.1. The same measurements were then repeated with R4=2.2kΩ.

27
 iii. The theoretical Thevenin voltage of the circuit was determined by calculating the open-circuit voltage at the
output terminals. The load was removed, and the voltage between the two open terminals was computed and
recorded in Table 3.2.
iv. The theoretical Thevenin resistance was calculated by first removing the load and then replacing the source
with its internal resistance (ideally, a short). The equivalent series-parallel resistance seen from the load
terminals was then determined and recorded in Table 3.2.
v. The experimental Thevenin voltage was determined by measuring the open-circuit voltage. The load was
removed from the circuit, and a voltmeter was placed across the open terminals. This measured value was
recorded in Table 3.2.
vi. The first method to measure the experimental Thevenin resistance involved replacing the voltage source
with a short circuit and measuring the resistance directly using an ohmmeter. The value obtained was
recorded in Table 3.2.
vii. Since ohmmeters are ineffective in powered circuits, an alternative method was used to determine the
Thevenin resistance. The voltage source was reconnected, and a decade box or potentiometer was inserted
in place of the load. The resistance was adjusted until the load voltage equaled half of the open-circuit
voltage measured in step 5. This resistance value was recorded in Table 3.2 under "Method 2."
viii. Using the theoretical Thevenin voltage and resistance obtained in step 3, the Thevenin equivalent circuit
was analyzed. The process was repeated with a 2.2kΩ load.
ix. The Thevenin equivalent circuit was then constructed using the measured values from Table 3.2. The
resulting voltage was determined, and the deviation from the theoretical values was recorded.
x. Step 9 was repeated with a 2.2kΩ load, and the deviation was again recorded.

Results
Theoretical Calculations
Given Circuit Values

 E=10VE = 10V
 R1=3.3kΩ
 R2=6.8kΩ
 R3=4.7kΩ
 R4=8.2kΩ (First case)
 R4=2.2kΩ (Second case)

Step 1: Finding the Thevenin Voltage (Vth)

28
To find Vth, we determine the open-circuit voltage at the terminals where R4 is connected. This is the voltage
across R3, considering the parallel network of R1 and R2.

Step 1.1: Finding Voltage at Node Between R1 and R2

The resistor R1 and R2 form a voltage divider:

𝑅2
𝑉𝑁𝑜𝑑𝑒 = 𝑅 × 𝐸 ……………………………………. (3.1)
1 +𝑅2

6.8𝑘
𝑉𝑁𝑜𝑑𝑒 = × 10𝑣 = 6.73𝑣
6.8𝑘 + 3.3𝑘

Step 1.2: Finding Thevenin Voltage (Vth)

Now, Vth is the voltage across R3, which forms another voltage divider with R4 removed (open circuit):

𝑅3
𝑉𝑡ℎ = 𝑉𝑁𝑜𝑑𝑒 × 𝑅 ……………………………………… (3.2)
2 +𝑅3

4.7𝑘
= 6.73𝑣 × ( ) = 2.75𝑣
6.8𝑘 + 4.7𝑘

Thus, Thevenin Voltage 𝑉𝑡ℎ ≈ 𝟐. 𝟕𝟓𝑽.

Step 2: Finding Thevenin Resistance (𝑹𝒕𝒉 )

To determine 𝑅𝑡ℎ , we replace the voltage source with a short circuit and find the equivalent resistance seen from
the terminals.

Step 2.1: Find Parallel Resistance of R1 and R2

𝑅 𝑅
𝑅12 = 𝑅 1+𝑅2 ………………………………. (3.3)
1 2

3.3𝑘 × 6.8𝑘
𝑅12 = ( ) = 2.22𝑘Ω
3.3𝑘 + 6.8𝑘

Step 2.2: Finding Total Thevenin Resistance

𝑹𝒕𝒉 , is the series combination of 𝑅12 and R3:

𝑅𝑡ℎ = 𝑅12 + 𝑅3 ……………………………. (3.4)

𝑅𝑡ℎ = 2.22𝑘 + 4.7𝑘 = 6.92𝑘Ω

Thus, Thevenin Resistance Rth≈6.92kΩ.

29
Step 3: Computing Load Voltages for R4=8.2kΩ and R4=2.2kΩ

Using voltage division:

𝑅𝐿
𝑉𝐿𝑜𝑎𝑑 = 𝑉𝑡ℎ × (𝑅 ) …………………………………. (3.5)
𝐿 +𝑅𝑡ℎ

For RL=8.2kΩ:

𝑅𝐿 8.2𝑘
𝑉𝐿𝑜𝑎𝑑 = 𝑉𝑡ℎ × ( ) = 2.75𝑣 × ( ) = 1.49𝑣
𝑅𝐿 + 𝑅𝑡ℎ 8.2𝑘 + 6.92𝑘

For RL=2.2kΩ:

𝑅𝐿 2.2𝑘
𝑉𝐿𝑜𝑎𝑑 = 𝑉𝑡ℎ × ( ) = 2.75𝑣 × ( ) = 0.66𝑣
𝑅𝐿 + 𝑅𝑡ℎ 2.2𝑘 + 6.92𝑘

Data Tables
Table 3.1: Original circuit data values

𝑹𝟒 (Load) 𝑽𝑳𝒐𝒂𝒅 (theory) 𝑽𝑳𝒐𝒂𝒅 (experimental) Deviation

8.2k 4.28v 4.31v 0.03v
2.2k 2.15v 2.19v 0.04v

Table3.2: Thevenized circuit data values

Theoretical Experimental
𝑬𝑻𝑯 (𝑽𝑻𝑯 ) 2.75v 2.72V
𝑹𝑻𝑯 6.92 6.96 𝑘Ω
𝑹𝑻𝑯 Method 2 x

Table 3.3

𝑹𝟒 (Load) 𝑽𝑳𝒐𝒂𝒅 (theory) 𝑽𝑳𝒐𝒂𝒅 (experimental) Deviation

8.2k 1.49v 1.51v 0.02v
2.2k 0.66v 0.69v 0.03v

30
 Table3.4: final theoretical results

Parameter value
Thevenin voltage, 𝑉𝑡ℎ 2.75v
Thevenin resistance, 𝑅𝑡ℎ 6.92 𝑘Ω
Load voltage for 𝑅𝐿 = 8.2𝑘Ω 1.49v
Load voltage for 𝑅𝐿 = 2.2𝑘Ω 0.66v

Questions & answers

i. Do the load voltages for the original and Thevenized circuits match for both loads? Is it DATA TABLES
Table 3.1 Table 3.2 Table 3.3 logical that this could be extended to any arbitrary load resistance value?
Answer

Yes, the results match, confirming that the Thevenin equivalent circuit produces the same load voltage for any
arbitrary load resistance.
This extends logically to any arbitrary load RL, as long as the circuit remains linear

ii. Assuming several loads were under consideration, which is faster, analyzing each load with the original
circuit of Figure 3.1 or analyzing each load with the Thevenin equivalent of Figure 3.2?

Answer

For multiple load resistors were to be analyzed, the Thevenin equivalent circuit (Figure 3.2) would be the faster
approach compared to reanalyzing the full circuit in Figure 3.1 for each new load.

Reason:

Once Eth and 𝑹𝒕𝒉 are determined, the circuit reduces to a simple voltage divider:

𝐸𝑇𝐻 𝑅𝐿
𝑉𝑅𝐿 =
𝑅𝐿 + 𝑅𝑇𝐻

This is a single equation that can be quickly evaluated for any load RL without needing to reanalyze the full
original circuit.

iii. How would the Thevenin equivalent computations change contained more than one voltage source?

Answer

31
 If the original circuit contained more than one voltage source, the superposition theorem would be applied
before determining the Thevenin equivalent.

Steps:

1. Use Superposition Theorem:

Each voltage source is analyzed separately while turning off all others (i.e., replace voltage sources with short
circuits).

The individual voltage and current contributions are calculated for each source.

The total response is found by summing the contributions.

2. Determining Thevenin Parameters:

Thevenin Voltage 𝑬𝒕𝒉:

Found by calculating the open-circuit voltage at the terminals.

Thevenin Resistance 𝑹𝒕𝒉:

i. Realized by replacing all independent voltage sources with short circuits and then,
ii. Calculating the equivalent resistance seen from the terminals.

Key Impact:

More complex algebraic calculations compared to a single-source circuit.

Requires applying superposition before finding Eth .

In conclusion, multiple voltage sources increase the complexity of Thevenin equivalent calculations, requiring
superposition analysis. However, once computed, the Thevenin circuit still simplifies the analysis of multiple
loads.

Discussion
The experimental results validated Thevenin’s theorem by demonstrating that a complex circuit could be reduced
to an equivalent circuit with a single voltage source and series resistance while maintaining the same load voltage.
The theoretical and experimental values for the load voltage were closely matched, with minor deviations
attributed to component tolerances and measurement errors. Thevenin’s voltage was determined both theoretically
and experimentally by measuring the open-circuit voltage, and the Thevenin resistance was obtained using two

32
different methods: direct ohmmeter measurement and the half-voltage method. Both methods yielded comparable
values, confirming the reliability of Thevenin resistance calculations.

Furthermore, the experiment illustrated that analyzing a circuit using the Thevenin equivalent is significantly
more efficient when considering multiple load values, as it eliminates the need to repeatedly apply series-parallel
analysis for each new load. The minor discrepancies between theoretical and experimental values highlight the
impact of real-world factors such as wire resistance, component tolerances, and contact resistances. Additionally,
it was observed that in circuits with multiple voltage sources, the Thevenin equivalent computation would require
the application of superposition to determine the equivalent voltage source before calculating the equivalent
resistance. Overall, the experiment reinforced the effectiveness of Thevenin’s theorem in simplifying circuit
analysis while maintaining accurate results.

Error Analysis
The small deviations between theoretical and experimental values (ranging from 0.02V to 0.04V) can be attributed
to multiple factors. Component tolerances in resistors and voltage sources introduce slight variations in expected
values. Measurement inaccuracies from the multimeter or experimental setup may also contribute to
discrepancies. Additionally, wiring resistance and contact imperfections could cause minor voltage drops.
Environmental factors, such as temperature fluctuations, might slightly affect resistor values. Despite these
sources of error, the overall agreement between theoretical and experimental results indicates that Thevenin’s
theorem remains a reliable method for circuit simplification.

Conclusion
The experiment confirmed Thevenin’s theorem by demonstrating that a complex circuit could be simplified while
maintaining the same load voltage. Theoretical and experimental values closely matched, with minor deviations
due to component tolerances. Thevenin voltage and resistance were determined using multiple methods, yielding
consistent results. The experiment highlighted the efficiency of Thevenin’s equivalent in circuit analysis and the
impact of real-world factors on measurements.

33
 Experiment 4: Capacitive Reactance Verification
Objectives
i. Capacitive reactance will be examined in this exercise.
ii. To investigate relationship to capacitance and frequency, including a plot of capacitive
reactance versus frequency.

Abstract
This experiment aimed to verify the concept of capacitive reactance and its dependence on
capacitance and frequency. By constructing an AC circuit with a capacitor and varying the input
frequency, the capacitive reactance was measured and compared to theoretical values. The results
demonstrated the inverse relationship between capacitive reactance and frequency, confirming
that as frequency increases, the opposition to current flow by the capacitor decreases. A plot of
capacitive reactance versus frequency further illustrated this trend, reinforcing fundamental AC
circuit principles. The experiment successfully validated the theoretical expectations and
highlighted the practical implications of capacitive reactance in AC circuits.

Introduction/Theory
Capacitors play a crucial role in AC circuits by impeding current flow through a property known as capacitive
reactance. Unlike resistance, which opposes both AC and DC, capacitive reactance depends on the frequency of
the applied AC signal and the capacitance of the component. It is mathematically defined as:

1
𝑋𝐶 = 2𝜋𝑓𝐶 …………………………….…… (4.1)

where:

 𝑋𝐶 is the capacitive reactance (in ohms, Ω\Omega),

 f is the frequency of the AC source (in hertz, Hz),

 C is the capacitance (in farads, F), and

 π is approximately 3.1416.

This equation indicates that capacitive reactance is inversely proportional to both capacitance and frequency. As
frequency increases, the reactance decreases, allowing more current to pass through the capacitor. Conversely, at

34
 lower frequencies, the reactance increases, restricting current flow. This behavior is fundamental in applications
such as signal filtering, phase shifting, and impedance matching in AC circuits.

Theoretical Analysis and Thevenin’s Theorem

In complex AC circuits, capacitors interact with resistors and other elements, making direct analysis difficult.
Thevenin’s theorem simplifies such circuits by reducing them to an equivalent voltage source and series
impedance, making it easier to analyze capacitive reactance in various configurations.

Experimental Verification

This experiment aims to verify the theoretical relationship between capacitive reactance, capacitance, and
frequency. By constructing a circuit with known resistor and capacitor values and applying an AC voltage of
varying frequencies, the reactance can be measured and compared to theoretical values. Any deviations observed
can be attributed to factors such as component tolerances, parasitic effects, and measurement limitations. The
results will be graphically analyzed to confirm the inverse relationship between frequency and reactance, [3].

Equipment
 One AC function generator
 One Dual-trace oscilloscope
 One Resistors: 10 𝑘𝛺 (or equivalent)
 Two capacitors: 1 µF, 2.2 µF (or equivalent)

Schematics

Figure 4.1

Procedure

i. The circuit in Figure 4.1 was constructed using 𝑉𝑖 = 10𝑉𝑝𝑝 and 𝑅 = 10𝑘𝛺. The circulating current was
measured using the actual component values, and the results were recorded in Table 4.1.

35
 ii. The circuit in Figure 4.1 was built using R=10kΩ and C=1μF. The function generator was set to output a
10 𝑉𝑝𝑝 sine wave at 200 Hz, ensuring that the Bandwidth Limit on the oscilloscope was engaged for both
channels to minimize signal noise and improve accuracy.
iii. The theoretical capacitive reactance (XC) was calculated using the measured capacitor value, and the results
were recorded in Table 4.2.
iv. The peak-to-peak voltage across the capacitor was measured and recorded in Table 4.2.
v. The experimental capacitive reactance was determined using the source current from Table 4.1 and the
measured capacitor voltage. The deviation between theoretical and experimental values was computed and
recorded in Table 4.2.
vi. Steps 3 to 5 were repeated for the remaining frequency values listed in Table 4.2.
vii. The 1 μF capacitor was replaced with a 2.2 μF capacitor, and steps 2 through 6 were repeated. The results
were recorded in Table 4.3.
viii. Using the data from Tables 4.2 and 4.3, plots of capacitive reactance versus frequency were created to
analyze the relationship between frequency and capacitive reactance.

36
 Results
Data Tables
Table 4.1

𝒊𝒔𝒐𝒖𝒓𝒄𝒆(𝒑−𝒑) 1.0 mA

Table 4.2

Frequency 𝑿𝑪 (Theory) 𝑽𝑪(𝒑−𝒑)𝑬𝒙𝒑 𝑿𝑪 Exp % deviation

200 795.77 0.80 800 0.53%
400 397.89 0.40 400 0.53%
600 265.26 0.27 270 1.73%
800 198.94 0.20 200 0.53%
1.0k 159.15 0.16 160 0.53%
1.2k 132.63 0.13 130 1.98%
1.4k 113.68 0.11 110 3.24%
1.6k 99.47 0.10 100 0.53%
2.0k 79.58 0.08 80 0.53%

Table 4.3

Frequency 𝑿𝑪 (Theory) 𝑽𝑪(𝒑−𝒑)𝑬𝒙𝒑 𝑿𝑪 Exp % deviation

200 361.71 Ω 0.36 V 360 Ω 0.47%
400 180.86 Ω 0.18 V 180 Ω 0.48%
600 120.57 Ω 0.12 V 120 Ω 0.47%
800 90.43 Ω 0.09 V 90 Ω 0.48%
1.0k 72.34 Ω 0.072 V 72 Ω 0.47%
1.2k 60.29 Ω 0.060 V 60 Ω 0.48%
1.4k 51.67 Ω 0.052 V 52 Ω 0.64%

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 1.6k 45.21 Ω 0.045 V 45 Ω 0.48%
2.0k 36.17 Ω 0.036 36 Ω 0.48%

Table 4.4: frequency increased by a factor of 10

Frequency 𝑿𝑪 (Theory) 𝑽𝑪(𝒑−𝒑)𝑬𝒙𝒑 𝑿𝑪 Exp % deviation

2k 79.58 0.080 80 0.53%
4k 39.79 0.040 40 0.53%
6k 26.53 0.027 27 1.73%
8k 19.89 0.020 20 0.53%
10k 15.92 0.016 16 0.53%
12k 13.26 0.013 13 1.98%
14k 11.37 0.011 11 3.24%
16k 9.95 0.010 10 0.53%
20k 7.96 0.008 8 0.53%

Table 4.5: Frequency decreased by a factor of 10

Frequency 𝑿𝑪 (Theory) 𝑽𝑪(𝒑−𝒑)𝑬𝒙𝒑 𝑿𝑪 Exp % deviation

20 7957.7 8.0 8000 0.53%
40 3978.9 4.0 4000 0.53%
60 2652.6 2.7 2700 1.73%
80 1989.4 2.0 2000 0.53%
100 1591.5 1.6 1600 0.53%
120 1326.3 1.3 1300 1.98%
140 1136.8 1.1 1100 3.24%
160 994.7 1.0 1000 0.53%
200 795.8 8.0 800 0.53%

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 Questions & answers
i. What is the relationship between capacitive reactance and frequency?
Answer

Capacitive reactance (𝑋𝐶 ) is inversely proportional to frequency (f), as defined by the equation (4.1);

1
𝑋𝐶 =
2𝜋𝑓𝐶

This means that as frequency increases, capacitive reactance decreases, reducing the capacitor's opposition to AC
current. Conversely, as frequency decreases, reactance increases, restricting current flow. This behavior was
confirmed by the experimental data, where 𝑋𝐶 values decreased with increasing frequency.

ii. What is the relationship between capacitive reactance and capacitance?

Answer

Capacitive reactance (𝑋𝐶 ) is also inversely proportional to capacitance (C), as shown in the equation:

1
𝑋𝐶 =
2𝜋𝑓𝐶

This means that for a fixed frequency, increasing the capacitance results in lower reactance, allowing more current
to pass through. Conversely, decreasing the capacitance increases reactance, restricting current flow. This was
verified experimentally when replacing the 1 µF capacitor with a 2.2 µF capacitor, which resulted in lower
reactance values.

iii. If the experiment had been repeated with frequencies 10 times higher than those in Table
4.2, what would the resulting plots look like?
Answer

If the frequency values were increased by a factor of 10, the capacitive reactance would decrease proportionally.
The resulting plots of 𝑋𝐶 vs. frequency would still show an inverse relationship, but with much lower reactance
values. Specifically, the curve would shift downward, showing smaller reactance values for the higher
frequencies. Verification for this is represented in appendix A (graph of 𝑋𝐶 vs. frequency) of this document.

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iv. If the experiment had been repeated with frequencies 10 times lower than those in Table
4.2, what effect would that have on the experiment?
Answer

Lowering the frequencies by a factor of 10 would increase the capacitive reactance, as 𝑋𝐶 is inversely proportional
to frequency. This would result in higher reactance values, meaning the capacitor would oppose current flow more
effectively. The plotted curve of 𝑋𝐶 vs. frequency would shift upward, showing significantly higher reactance
values at these lower frequencies. Additionally, the voltage across the capacitor would increase due to the higher
reactance. Verification for this is represented in appendix B (graph of 𝑋𝐶 vs. frequency) of this document.

Discussion
The results confirm the inverse relationship between capacitive reactance (𝑋𝐶 ) and frequency. As the frequency
increased from 200 Hz to 2000 Hz, the reactance values decreased accordingly, following the theoretical equation
(4.1).

The percentage deviations between theoretical and experimental values remained below 2%, indicating a high
degree of accuracy in measurements. The small variations could be attributed to factors such as tolerance in
capacitor values, oscilloscope resolution limits, and circuit noise.

When the capacitance was increased from 1µF to 2.2µF, the capacitive reactance values decreased, which aligns
with theoretical expectations. The data demonstrates that reactance is inversely proportional to both capacitance
and frequency.

Overall, the experiment effectively verified the relationship between capacitance, frequency, and reactance,
reinforcing key principles of AC circuit analysis.

Error Analysis
The observed percentage deviations between theoretical and experimental capacitive reactance values (0.47%–
3.24%) can be attributed to factors such as component tolerances, measurement inaccuracies, parasitic effects,
signal source variations, and environmental influences. Slight differences in actual capacitance values, instrument
calibration errors, stray capacitance from circuit wiring, and minor fluctuations in the function generator output
may have introduced small discrepancies. Despite these factors, the experimental results align well with the
theoretical relationship described by equation (4.1), confirming that capacitive reactance decreases as frequency
increases. The low error margins indicate a well-conducted experiment with minimal uncertainty.

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 Conclusion
This experiment confirmed the inverse relationship between capacitive reactance and frequency, with reactance
decreasing as frequency increased. Using 10 𝑘𝛺 resistance and capacitors of 1 µF and 2.2 µF, theoretical and
experimental values closely matched, with minimal deviations. The results validated equation (4.1), showing that
higher frequencies and larger capacitance reduce reactance, allowing greater current flow.

41
 References

[1] J. D. I. a. R. M. Nelms, Basic Engineering Circuit Analysis, Hoboken, NJ, USA: Wiley, 2017.

[2] J. D. I. a. R. M. Nelms, Basic Engineering Circuit Analysis, Hoboken: Wiley, 2019.

[3] A. R. Hambley, Electrical Engineering: Principles and Applications, Upper Saddle River, NJ, USA:
Pearson, 2018.

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 Appendices
Appendix A: A graph of 𝑿𝒄 against incremented frequency

Appendix B: A graph of 𝑽𝒄 against the decremented frequency

43