HIGH-PERFORMANCE VLSI
ARCHITECTURE FOR SECURE
CRYPTOGRAPHIC ALGORITHMS
GUIDED BY
[Link] KRISHNAMMAL
TEAM
21BEC7200 - G NIKITHA
21BEC7213 - P ABHINAYA
21BEC7214 - M MAHIYAH
Motivation
Traditional cryptographic algorithms (AES, DES) are secure but
computationally intensive.
Not suitable for low-power and resource-constrained environments
(e.g., IoT devices).
Lightweight encryption provides necessary security with lower
computational cost.
This project focuses on FPGA-based implementations for better speed,
energy efficiency, and attack resilience.
Objectives
Design and implement a lightweight symmetric encryption
system (e.g., SPECK).
Utilize FPGA-based architecture for real-time encryption
and decryption.
Analyze performance: speed, power consumption, and
resource utilization.
Literature Review
1.A High-Performance VLSI Architecture for Advanced Encryption Standard
(AES) Algorithm Naga M. Kosaraju Murali Varanasi Saraju P. Mohanty
2.A Low-Cost and Flexible FPGA Implementation for SPECK Block Cipher
Ali Nemati, Soheil Feizi, Arash Ahmadi, Vahab Al-din Makki
[Link] of SIMON & SPECK Algorithm Anil G. Sawant ,Sayali Kamthe,
Yashasvini Shaha , Bapu Morajkar , Abhishek Sakpal
[Link] and Speck: Block Ciphers for the Internet of Things Ray Beaulieu
Douglas Shors Jason Smith Stefan Treatman-Clark Bryan Weeks Louis Wingers
[Link] and Performance of the Simon and Speck Lightweight Block
Ciphers on ASICs Ray Beaulieu Douglas Shors Jason Smith Stefan Treatman-Clark
Bryan Weeks Louis Wingers
Design Aspects
MAIN ALGORITHM WEB DEVELOPMENT
Software Development:
Backend - Flask
Xilinx ISM (Verilog)
Front end - Html,Css,
Encryption & Decryption and Python
Algorithm: Firebase
SPECK / AES
Design Aspects
FLOW CHART ALGORITHM
Results
Observations
Conclusion and Future Work
The project demonstrates the feasibility of lightweight, secure
encryption on FPGA platforms.
Effective for real-time applications in constrained environments.
Future Work:
Integrate more lightweight algorithms (e.g., SIMON, PRESENT).
Hardware-level countermeasures for side-channel attack
resistance.
Explore ASIC implementations for commercial deployment.
THANK YOU