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Assembly Language Instructions Overview

The document outlines various assembly language instructions including MOV, LODS, IN/OUT, INS, OUTS, INC, TEST, REPEAT-UNTIL loops, WAIT, PUSH, SHL, SHR, and ROR. It explains their functionalities, such as data transfer between registers and I/O devices, bit manipulation, and loop control. Additionally, it mentions the significance of flags like the ZERO flag and BUSY flag in the context of these instructions.

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0% found this document useful (0 votes)
4 views6 pages

Assembly Language Instructions Overview

The document outlines various assembly language instructions including MOV, LODS, IN/OUT, INS, OUTS, INC, TEST, REPEAT-UNTIL loops, WAIT, PUSH, SHL, SHR, and ROR. It explains their functionalities, such as data transfer between registers and I/O devices, bit manipulation, and loop control. Additionally, it mentions the significance of flags like the ZERO flag and BUSY flag in the context of these instructions.

Uploaded by

u2104002
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© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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1.

MOV:
MOV AL,BL 8 bits Copies BL into AL
MOV CH,CL 8 bits Copies CL into CH

[Link] :LODSB
The LODS instruction loads AL, AX, or EAX with data stored at the data
segment offset address indexed by the SI register

[Link] OUT: An IN instruction transfers data from an external I/O


device into AL, AX, or EAX; an OUT transfers data from AL, AX, or EAX to
an external I/O device
IN AL,p8 8 bits are input to AL from I/O port p8
OUT p8,AL 8 bits are output to I/O port p8 from AL

INS:
The INS (input string) instruction (not available on the 8086/8088
microprocessors) transfers a byte, word, or doubleword of data from an
I/O device into the extra segment memory location addressed by the DI
register. The I/O address is contained in the DX register
INSB ES:[DI] = [DX];DI = DI ± 1 (byte transferred)

OUTS:
The OUTS (output string) instruction (not available on the 8086/8088
microprocessors) transfers a byte, word, or doubleword of data from
the data segment memory location address by SI to an I/O device. The
I/O device is addressed by the DX register as it is with the INS
instruction.
OUTSB [DX] = DS:[SI];SI = SI ± 1 (byte transferred)

5. Increment Addition:
INC BL BL = BL + 1

6 . Test and Bit Test Instructions:


The TEST instruction performs the AND operation. The difference is that
the AND instruction changes the destination operand, whereas the
TEST instruction does not. A TEST only affects the condition of the flag
register, which indicates the result of the test. The TEST instruction uses
the same addressing modes as the AND instruction.

The TEST instruction functions in the same manner as a CMP


instruction. The difference is that the TEST instruction normally tests a
single bit (or occasionally multiple bits), whereas the CMP instruction
tests the entire byte, word, or doubleword. The zero flag (Z) is a logic 1
(indicating a zero result) if the bit under test is a zero, and (indicating a
nonzero result) if the bit under test is not zero.

TEST AL,1 ;test right bit


JNZ RIGHT ;if set
TEST AL,128 ;test left bit
JNZ LEFT ;if set

TEST DL,DH DL is ANDed with DH

6. REPEAT- UNTIL Loops :


There is also an .UNTILCXZ instruction available that uses the LOOP
instruction to check CX for a repeat loop. The .UNTILCXZ instruction
uses the CX register as a counter to repeat a loop a fixed number of
times.
MOV CX, 100 ;set count
.REPEAT
LODSB
ADD AL,[BX]
STOSB
INC BX
.UNTILCXZ

7. WAIT:
The WAIT instruction monitors the hardware BUSY pin on the 80286
and 80386, and the pin on the 8086/8088. The name of this pin was
changed beginning with the 80286 microprocessor from to BUSY. If the
WAIT instruction executes while the BUSY pin = 1, nothing happens and
the next instruction executes. If the BUSY pin = 0 when the WAIT
instruction executes, the microprocessor waits for the BUSY pin to
return to a logic 1. This pin inputs a busy condition when at a logic 0
level.

10. PUSH
PUSHF-Store flags register in the stack.
PUSHA->Push all general purpose registers AX, CX, DX, BX, SP, BP, SI,
DI in the stack.
Original value of SP register (before PUSHA) is used.

11. SHL SHR:


SHL->Shift operand1 Left. The number of shifts is set by operand2.
SHR->Shift operand1 Right. The number of shifts is set by operand2.

12. ZERO flag->if test gives 0 then zero flag is 1

ZERO flag মানে হন া সে zero চায়


zero সেন সে high(1) হনে
BUSY FLAG if 1 then busy
BUSY_BIT value is 1.
13. ROR:
ROR AH,1

AH = 7FH then,
0111 1111main
1011 1111after 1 itr
1101 1111 2
1110 11113
1111 01114
1111 10115
1111 11016
1111 11107

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