3 Power Electronics Chapter 1 Basic Semiconductor Physics and Technology 4

Resistance of semiconductor materials is usually expressed in terms of sheet resistance R□, which is related distribution of phosphorus can be attained by neutron radiation, commonly called neutron transmutation
to resistance as follows. At a given temperature, the impurity depth xj, mobility μ, and impurity distribution doping, NTD. The neutron irradiation flux transmutes silicon atoms first into a silicon isotope with a short
N(x) are related to sheet resistance by 2.62-hour half-lifetime, which then decays into phosphorus. Subsequent thermal annealing removes any
1 crystal damage caused by the irradiation. Neutrons can penetrate over 100mm into silicon, thus large silicon
R  xj
Ω/square (1.4) crystals can be processed using the NTD technique.
q   N (x )dx
0

The average resistivity is   Rx j and given a length L and width w, as defined in figure 1.1, the resistance, A p-n junction is the location in a semiconductor where the doping changes from p to n while the
R, is given by monocrystalline lattice continues undisturbed. A bipolar diode is thus created, which forms the basis of any
L  L L bipolar semiconductor device.
R     R Ω (1.5) The donor-acceptor doping junction is formed by any one of a number of process techniques, namely
A t w w
For parallel n-doped profiles, the resistance can be estimated by treating each layer independently: alloying, diffusion, epitaxy, ion implantation or the metallization for ohmic contacts.
wt wt w t t  w
1
Rtotal  R11  R21  ..  1  1  ..   1  1  ..  R11  R21  ..  q ni N Di t i (1.6) Power semiconductor device processing involves most of the following range of process possibilities.
L 1 L 1 L  1 1  L i 1

 Deposition is any process that grows, coats or otherwise transfers a material onto the wafer. Available
Example 1.1: Resistance of homogeneously doped silicon technologies consist of physical vapour deposition (PVD), chemical vapour deposition (CVD),
electrochemical deposition, molecular beam epitaxy (MBE), and atomic layer deposition.
Silicon doped with phosphorous (ND = 10 /cm ) measures 100μm by 10μm by 1μm. Calculate the sheet
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 Removal processes are any that remove material from the wafer either in bulk or selective form and
resistance and resistance between opposite faces, assuming the electron mobility at this doping level is μn = consist primarily of etch processes, both wet etching and dry etching such as reactive ion etch.
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720cm / V-s. Doping to produce a p-type material has a hole mobility of 40% that for electrons. Recalculate  Patterning covers the series of processes that shape or alter the existing shape of the deposited
sheet resistance and resistance values. materials and is generally referred to as lithography. In conventional lithography, the wafer is coated
with a chemical called a photoresist. The photoresist is exposed by a ‘stepper’, a machine that focuses,
Solution
aligns, and moves the mask, exposing select portions of the wafer to short wavelength UV light. The
From equation (1.3), the resistivity, ρ, of doped silicon is unexposed regions are washed away by a developer solution. After etching or other processing, the
1 1 remaining photoresist is removed by oxygen plasma ashing or stripping.
   Modification of electrical properties consists of doping transistor sources and drains in diffusion

 q n n  p p  furnaces and by ion implantation. These doping processes are followed by furnace annealing or in
Since n >> p in the n-type silicon and assuming complete ionization advanced devices, by rapid thermal annealing which serve to activate the implanted dopants.
1 1 1 Modification of electrical properties extends to reduction of the dielectric constant in low-k insulating
    0.086 Ωcm materials via exposure to ultraviolet light.
q n n q n N D 1.6  1019  720  1017
For a length of 100μm, the resistance is 1.1 Processes forming and involved in forming semiconductor devices
Length L 100  104
R    0.086   8.6 kΩ
Area w t 10  104  1  10 4 1.1.1 Alloying
From equation (1.5) the sheet resistance is given by
At the desired region on an n-type wafer, a small amount of p-type impurity is deposited. The wafer is then
W 10  104
Rs  R  8.6 kΩ   860 Ω/square heated in an inert atmosphere and a thin film of melt forms on the interface. On gradual, slow cooling, a
L 100  10 4 continuous crystalline structure results, having a step or abrupt pn junction as shown in figure 1.2. This
If the length is assumed to be one of the shorter dimensions, then for a length 10μm or 1μm, the process is not employed to form modern p-n junctions but can be used at the metallisation stage of wafer
resistance is 86Ω or 0.86Ω, respectively, while the sheet resistance possibilities, depending on the fabrication.
thickness reference axis, are 86 Ω/square and 8.6 Ω/square.
For a p-type material, the 40% decrease in mobility of holes μp increases resistivity by a factor of
1/0.4 = 2.5. Each aspect resistance therefore increases by a factor 2.5, viz., increases to 21.5kΩ,
215Ω, and 2.15Ω for lengths 100μm, 10μm, and 1μm, respectively. From equation (1.4) the sheet
step
resistances are increased to 2.15kΩ/square, 215Ω/square, and 21.5Ω/square. junction
♣

The carrier concentration equilibrium can be significantly changed by irradiation with photons, the application
of an electric field or by heat. Such carrier injection mechanisms create excess carriers. n
If n-type silicon is irradiated by photons with enough energy to ionise the valence electrons, electron-hole
pairs are generated. There is already an abundance of majority electrons in the n-type silicon, thus the
photon-generated excess minority holes are of more relative and detectable importance. If the light source is (a) (b)
removed, the time constant associated with recombination, or decay of excess minority carriers, is called the
minority carrier hole lifetime, h. For a p-type silicon, exposed to light, excess minority electrons are
Figure 1.2. n-Si to Aℓ metal alloy junction:

generated and after the source is removed, decay at a rate called the minority carrier electron lifetime, e.
(a) cross-section where xj is the junction depth below the metal-semiconductor boundary and
(b) doping profile of the formed step junction.
The minority carrier lifetime is often termed the recombination lifetime.

A manufacturing processing difficulty with high-voltage, large-area semiconductor devices is that of 1.1.2 Diffusion
obtaining uniformity of n-type phosphorus doping throughout the usual high-resistivity silicon starting
material. Normal crystal growing (by liquid encapsulated, contactless, Czochralski crystal growth – see Diffusion, the movement of a chemical species from a region of high concentration to a region of lower
section 1.19.3i) and doping techniques give no better than ±10 per cent fluctuation around the wanted concentration, is one of the two major processes by which chemical dopants are introduced into a
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resistivity at the required low concentration levels (<10 /cc). Final device electrical properties will therefore semiconductor (the other process being ion implantation). The controlled diffusion of dopants into silicon to
vary widely in all lattice directions. Tolerances better than ±1 per cent in resistivity and homogeneous alter the type and level of conductivity of semiconductor materials is the foundation of forming a p-n junction