Introduction to Microprocessor

1. Definition:
Microprocessor ek Integrated Circuit (IC) hota hai jo computer ya electronic
system ka central processing unit (CPU) ka kaam karta hai. Yeh instructions ko
process karta hai aur system ko control karta hai.

2. Main Function:
Iska main function hota hai data ko fetch karna, usse process karna, aur result ko
output dena. Saare logical aur arithmetic kaam yeh karta hai.

3. Programmable Device:
Microprocessor ek programmable device hota hai, jise software ke through
control kiya ja sakta hai. Isme likhi gayi program ke according yeh kaam karta hai.

4. Core Components:
Ek microprocessor mein mainly hoti hain:

o ALU (Arithmetic Logic Unit) – Jo calculation karta hai

o CU (Control Unit) – Jo control signals deta hai

o Registers – Jo temporary data store karte hain

5. Works on Binary Data:

Microprocessor binary system (0s and 1s) pe kaam karta hai. Yeh har instruction
ko binary code ke form mein samajhta aur process karta hai.

6. Clock-Driven Device:
Microprocessor ek clock-driven device hai – iska matlab yeh hai ki yeh
instructions ko clock pulses ke base par process karta hai (e.g., 2.5 GHz = 2.5
billion cycles/sec).

7. Speed & Performance:

Microprocessor ki performance clock speed, instruction set, aur core
architecture par depend karti hai. Zyada MHz/GHz ka matlab zyada fast
processing.

8. Control over System:

Microprocessor poore system ka brain hota hai – yeh input devices se data leta
hai, usse process karta hai, aur output devices ko result deta hai.

9. Used in Wide Applications:

Aaj microprocessors ka use har jagah hota hai – jaise:

o Computers/laptops

o Mobiles
 o Smart TVs

o Automobiles (ECU)

o Washing machines, aur Microwaves

10. Types Based on Usage:

Alag-alag needs ke liye alag-alag types ke microprocessors design kiye jaate
hain, jaise:

 Single chip microprocessors

 General-purpose microprocessors

 Bit-slice microprocessors

 Embedded microprocessors

1. Single Chip Microprocessor

Single chip microprocessor ek aisa microprocessor hai jisme saare essential

components ek hi chip par integrate kiye jaate hain. Isme main components hoti hain:

 Control Unit (CU): Yeh component instructions ko manage karta hai aur control
signals generate karta hai.

 Arithmetic and Logic Unit (ALU): Yeh mathematical aur logical operations
perform karta hai, jaise addition, subtraction, logical AND, OR, etc.

 Registers: Temporary data ko store karne ke liye registers hote hain.

 Clock Circuit: Yeh synchronization provide karta hai by generating clock pulses.

 Memory Interface: Yeh memory ko microprocessor ke saath interface karta hai.

Features:

1. Compact Design: Saare components ek chip par hone ki wajah se, single chip
microprocessors bohot compact hote hain aur inhe easily small devices mein
integrate kiya ja sakta hai.

2. Cost-e ective: Inki manufacturing cost bhi low hoti hai kyunki yeh ek single chip
mein integrate ho jaate hain. Mass production mein yeh a ordable hote hain.

3. Low Power Consumption: Chhoti size aur e icient design ki wajah se yeh low
power consume karte hain, jo unhe portable devices ke liye ideal banata hai.

4. Easy Integration: Single chip design ki wajah se, yeh easily embedded systems
aur consumer electronics mein integrate kiya ja sakte hain.
 5. Applications: Inka use commonly embedded systems, simple computing tasks,
aur consumer devices mein hota hai.

Example: Intel 4004, jo ek 4-bit single chip microprocessor tha, iski design ek single chip
mein ki gayi thi aur yeh early microprocessor systems mein use hota tha.

2. General Purpose Microprocessor

General-purpose microprocessor ek type ka microprocessor hota hai jo wide range of

tasks ko perform kar sakta hai. Yeh kisi bhi specific task ke liye design nahi kiya jaata,
isliye isse multiple applications mein use kiya ja sakta hai. Inka use complex operations
aur multi-tasking systems mein hota hai, jahan par performance aur speed zaroori hote
hain.

Features:

1. Versatility: Yeh microprocessors kisi bhi general-purpose computing task ko

perform kar sakte hain, jaise gaming, o ice applications, video editing, etc.

2. High Performance: General-purpose microprocessors ka architecture high

speed aur high performance ke liye design kiya jaata hai. Yeh multi-core
processors bhi ho sakte hain, jo parallel processing ko allow karte hain.

3. Multi-tasking Support: Inka main feature yeh hai ki yeh multiple tasks ko
simultaneously handle kar sakte hain, jo complex software aur applications ke liye
essential hai.

4. Advanced Architecture: Yeh microprocessors modern architectures, jaise

pipelining, superscalar execution, aur multi-level caching ko support karte hain,
jo inki e iciency ko increase karte hain.

5. Applications: Inka use personal computers, laptops, servers, gaming consoles,

aur high-performance systems mein hota hai.

Example: Intel i7 aur AMD Ryzen series ke processors general-purpose microprocessors

hain jo high-end computing tasks ko handle karte hain, jaise gaming, data processing,
aur media editing.

3. Bit-Slice Microprocessor

Bit-slice microprocessor ek modular microprocessor architecture hota hai, jisme ek

"slice" ek specific bit-width ko process karta hai, jaise 4-bit ya 8-bit. Jab multiple bit-
slices ko combine kiya jaata hai, tab yeh ek complete, powerful microprocessor ban jaata
hai. Iska major advantage yeh hai ki aap performance ko increase karne ke liye more
slices add kar sakte ho.

Features:

1. Modular Design: Iska design modular hota hai, matlab ek bit-slice ko replace ya
upgrade karna easy hota hai, jo system ko flexible banaata hai.

2. Customization: Bit-slice architecture ka use specific applications ke liye kiya

jaata hai, jahan pe flexibility aur customization zaroori hoti hai.

3. Scalable Performance: Agar zyada performance ki zarurat ho, toh aap additional
bit-slices ko add karke system ki overall processing power ko badha sakte hain.

4. E icient for Specialized Tasks: Yeh microprocessor specialized tasks ko

e iciently handle karta hai, jaise real-time systems, digital signal processing
(DSP), aur complex algorithms.

5. Applications: Yeh microprocessors mostly high-performance computing aur

specialized systems jaise military applications, scientific computing, aur custom-
designed embedded systems mein use hote hain.

Example: AMD's Am2900 family ek famous bit-slice microprocessor architecture thi,

jisme alag-alag bit-slices ko combine karke ek powerful system banaya jaata tha.

(MICROPROCESSER EVOLUATION TREE)

1. 4-bit Microprocessor – Intel 4004 (1971)

 Intel 4004 duniya ka pehla commercial microprocessor tha.

 Ye processor sirf 4-bit data ek time pe process kar sakta tha.

 Clock speed: 740 kHz (matlab bahut slow tha).

 Sirf 2300 transistors use hue the isme (aaj ke processors mein croreon hote
hain).

 Iska use mainly calculators aur simple electronics devices mein hota tha.

 Iska architecture bahut basic tha – koi advanced function nahi tha.

2. 8-bit Microprocessor – Intel 8080, 8085 (1974-1976)

 Intel 8080 ne processing power mein bada jump diya – ab processor 8-bit data ek
baar mein handle kar sakta tha.
 Intel 8085 uska upgraded version tha – isme less power use hoti thi aur zyada
speed thi.

 Clock speed around 3 MHz tak pahunch gayi thi.

 Ab ye processor basic computers, terminals, aur embedded systems mein bhi

use hone laga.

 Is waqt microprocessor ka use expand hone laga daily use machines mein.

3. 16-bit Microprocessor – Intel 8086, 80286 (1978–1982)

 Intel 8086 pehla 16-bit processor tha – iska matlab ye 16-bit data ek saath
process karta tha.

 Iske saath memory addressing bhi improve hui – upto 1 MB memory access
possible hua.

 Intel 80286 (286) ne multitasking aur protection modes jaise features diye.

 IBM ne apne PCs mein inhi processors ka use kiya – jisse personal computing
revolution shuru hua.

 Is daur mein computers o ice aur home dono jagah use hone lage.

4. 32-bit Microprocessor – Intel 80386, 80486, Pentium (1985–1995)

 80386 (386) processor ne 32-bit architecture introduce kiya.

 Ab processor 4 GB tak memory handle kar sakta tha – ye bada jump tha.

 80486 mein inbuilt math co-processor tha – isse floating-point calculations fast
ho gayi.

 Pentium series (1993 ke baad) ne clock speed, pipeline processing, aur

multimedia support mein bada upgrade diya.

 Ye processors modern operating systems jaise Windows 95/98 ko e iciently run

karte the.

5. 64-bit Microprocessor – AMD Athlon 64, Intel Itanium (2000s)

 64-bit processors ka matlab: ab processor ek time pe 64-bit data process kar

sakta hai.
  Ye high-end computing ke liye suitable hai – jaise scientific computing, gaming,
video editing.

 AMD ne pehla 64-bit desktop processor launch kiya – Athlon 64.

 Intel Itanium bhi high-end servers ke liye bana tha.

 64-bit processors zyada RAM access kar sakte hain (theoretical limit: 16
exabytes!).

6. Multi-Core Processors – Dual Core, Quad Core, etc. (2005–Present)

 Jab single-core processor ki speed limit pe aa gayi (heat aur power issues ke
kaaran), tab multi-core technology ka vikas hua.

 Dual-core processor mein 2 processing cores hote hain – matlab dono ek saath
kaam kar sakte hain.

 Ab multitasking bahut smooth ho gayi – jaise ek core browsing kare, doosra

background mein app run kare.

 Aaj ke laptops, smartphones mein dual-core, quad-core, aur octa-core

processors common hain.

 Isse performance + battery e iciency dono improve hua hai.

 Multi-core processors mein parallel computing bhi possible hai – AI, graphics,
video rendering mein kaafi helpful.

Conclusion:

Era Bit Size Example Key Features

1971 4-bit Intel 4004 Basic calculation

1974 8-bit Intel 8080/8085 Simple computers

1978 16-bit Intel 8086/80286 IBM PCs, multitasking

1985 32-bit Intel 80386/80486 GUI OS support

2000s 64-bit AMD Athlon 64 High RAM, heavy tasks

Today Multi-core Intel i5, i7, AMD Ryzen Multitasking, AI support

1. Definition of Harvard Architecture

Harvard Architecture ek aisa computer system design hai jisme program instructions
aur data ko separate memory units me store kiya jaata hai. Ye design pehli baar Harvard
Mark I computer me use hua tha, isiliye iska naam Harvard Architecture pada.

2. Structure (Kaise Kaam Karta Hai?)

Harvard Architecture me:

 Instruction Memory (ROM/Flash): Sirf program instructions store hote hain —

jaise MOV, ADD, etc.

 Data Memory (RAM): User data ya variables store hote hain — jaise sensor values,
user inputs, temporary results.

 Two Buses:

o Ek instruction bus hota hai jo sirf instruction memory se data fetch karta
hai.

o Ek data bus hota hai jo data memory se read/write karta hai.

Iska matlab hai ki ek hi clock cycle me CPU ek instruction fetch karta hai aur saath
me koi data read/write bhi kar sakta hai — jisse execution fast ho jaata hai.

3. Example: PIC Microcontroller (like PIC16F877A)

PIC microcontrollers Harvard Architecture ka best example hai.

Isme:

 Instructions ko Flash memory me store kiya jaata hai.

 Data ko SRAM (static RAM) me rakha jaata hai.

 CPU simultaneously ek new instruction ko fetch karta hai jab previous instruction
execute ho raha hota hai.

 Ye design real-time processing ke liye kaafi useful hoti hai — jaise sensors,
motors, robotics, etc.

4. Advantages of Harvard Architecture

Advantage Explanation
 Faster Execution Kyunki instruction aur data ek hi time pe access hote
hain.

Parallelism Do buses hone ki wajah se parallel data flow hota

hai.

Better Performance in Real-time applications me e icient hai.

Embedded Systems

Security Instruction aur data memory alag hone se data

accidentally overwrite nahi hota.

5. Applications of Harvard Architecture

 Digital Signal Processing (DSPs)

 Microcontrollers (PIC, AVR)

 Embedded Systems (Robots, Medical Devices)

 Audio/Video Processing Units

1. Definition of Princeton (Von Neumann) Architecture

Princeton Architecture ek aisi computer architecture hai jisme program instructions aur
data dono ko ek hi memory me store kiya jaata hai. Is architecture ka naam John Von
Neumann ke naam par pada, jinhone is idea ko 1945 me propose kiya tha.

2. Structure (Kaise Kaam Karta Hai?)

 Isme ek hi memory block hota hai jisme instructions (jaise MOV A,B) aur data
(jaise A = 5) dono store hote hain.

 Sirf ek bus hoti hai — jo data aur instruction dono ko transfer karti hai.

 CPU jab memory se instruction fetch karta hai, us time wo data access nahi kar
sakta — aur vice versa.

Is wajah se ek time pe sirf ya to instruction fetch hoga ya data read/write — dono

simultaneously nahi ho sakte. Ye bottleneck kehlaata hai.

3. Example: Intel 8085 Microprocessor

Intel ka 8085 microprocessor ek classic example hai Von Neumann Architecture ka.
  Isme ek hi memory unit hai jisme instructions aur data store hote hain.

 Ek common system bus use hoti hai (Address Bus, Data Bus, Control Bus).

 Is architecture ka use basic microprocessors aur general-purpose computers me

hota hai.

4. Advantages of Princeton Architecture

Advantage Explanation

Simple Design Ek hi memory aur bus hone se circuit design easy

hoti hai.

Cost E ective Kam hardware components lagte hain, toh sasta

padta hai.

Suitable for General Purpose Jahan speed critical nahi hoti.

Computers

5. Disadvantages (Limitations)

Disadvantage Explanation

Bus Contention Ek bus hone ki wajah se instruction aur data access ek

sath nahi ho sakte.

Slower Execution Sequential access hota hai — pehle instruction fetch,

phir data access.

Not suitable for real-time Jahan fast response chahiye, waha ye architecture
systems ideal nahi hai.

6. Applications of Princeton Architecture

 General Purpose Computers (Desktops, Laptops)

 Older Microprocessors (8085, Z80)

 Education & Simulation Projects

 Systems where cost matters more than speed

 Di erence Between Harvard and Von Neumann
Architecture
Feature Von Neumann (Princeton) Harvard
Memory Single memory for data + Separate memory for data
instructions and instructions
Bus Structure Single bus (common for data & Two buses (one for data, one
instructions) for instructions)
Speed Slower due to bus conflict (no Faster due to parallel access
parallel access)
Cost & Complexity Simple and cheaper to design More complex and costly
hardware
Data & Instruction Cannot access data & Can access both
Access instruction at same time simultaneously
Used In General computers, laptops, Microcontrollers (e.g., PIC,
old microprocessors (e.g., AVR), DSPs, real-time systems
8085)
Performance Low to medium High (specially in signal
processing & control systems)
Instruction & Data Possible (since same memory Not possible (as both are
Interference used) stored separately)

Theek hai, ab har ek point ko detail mein Hinglish mein elaborate karte hain:

1. Microprocessor kya hai?

 Definition & Integration

Microprocessor ek aisa semiconductor chip hai jisme pura CPU (Central
Processing Unit) ke sare core components—ALU, Control Unit, Registers, etc.—
integrated hote hain. Pehle alag-alag chips (separate ALU, Control Unit) hoti thi,
lekin microprocessor ne un sabko ek hi chip pe laake cost aur size dono
compress kar diya.

 Peripheral Connections
Ye khud mein ek independent system nahi hota; isko memory (RAM/ROM) aur
I/O devices se connect karna padta hai through system buses (address, data,
control) takki program instructions fetch ho sakein aur input/output operations
perform ho sakein.

 Use Cases
Microprocessors har jagah milenge—from simple calculators aur digital watches
se leke complex PCs, smartphones, automotive ECUs, industrial controllers tak.
ARCHITECTURE OF MICROPROCESSER

1. ALU (Arithmetic and Logic Unit)

1. ALU microprocessor ka main calculation unit hota hai.

2. Ye arithmetic aur logic operations karta hai.

3. ALU ke andar circuits hote hain jo operations perform karte hain.

4. Isme operations ke liye inputs registers se liye jaate hain.

5. Output mostly accumulator mein store hota hai.

6. Ye flags ko set ya reset karta hai operation ke result ke according.

7. ALU kaam karta hai control unit ke signal ke according.

8. Ye processor ka decision-making part hota hai.

2. General Purpose Registers

1. Ye temporary data store karne ke liye use hote hain.

2. Ye processor ke internal registers hote hain.

3. Inka use operations ke dauraan hota hai.

4. Ye high-speed memory location ki tarah kaam karte hain.

5. Har register ka specific naam hota hai.

6. Data processing mein fast access provide karte hain.

7. Inhe ALU directly access karta hai.

8. Inka size processor architecture pe depend karta hai.

3. Special Purpose Registers

1. Ye registers specific tasks ke liye reserve hote hain.

2. Inme program execution se related data store hota hai.

3. Program Counter instruction ka address store karta hai.

4. Stack Pointer stack memory ka track rakhta hai.

5. Accumulator ALU ke liye primary data register hota hai.

6. Flag Register result status batata hai.

7. Ye execution flow ko control karte hain.

8. Inki values control signals ke through update hoti hain.

4. Instruction Decoder

1. Ye instruction ko binary form mein decode karta hai.

2. Iska kaam hai opcode ko samajhna.

3. Ye pata lagata hai kaunsa operation perform karna hai.

4. Decode hone ke baad appropriate signal generate hota hai.

5. Control unit ko instruction ka meaning batata hai.

6. Ye processor ke operation ko control karta hai.

7. Instruction fetch ke baad ye active hota hai.

8. Har instruction ke liye specific decode pattern hota hai.

5. Timing and Control Unit

1. Ye pura processor ka coordination karta hai.

2. Har operation ke liye timing signal generate karta hai.

3. Instruction execution ka proper sequence maintain karta hai.

4. Ye internal aur external devices ke sath sync banata hai.

5. Clock signal ke basis pe sab timing decide hoti hai.

6. Read aur Write operations is unit ke through control hote hain.

7. Interrupts ko bhi ye handle karta hai.

8. Iske signals ke bina processor kaam nahi karta.

6. Address Bus

1. Ye unidirectional bus hoti hai.

2. Processor memory location ka address is bus pe bhejta hai.

3. Iska size memory addressing capacity decide karta hai.

4. Sirf processor se memory/I/O devices tak data jaata hai.

5. Iska use har memory access operation mein hota hai.

6. Ye bus processor ka control part hoti hai.

7. Is bus ke through data ka location decide hota hai.

8. Memory aur I/O location uniquely identify hote hain.

7. Control Bus

1. Ye control signals carry karti hai.

2. Ye processor aur devices ke beech coordination banati hai.

3. Isme bidirectional communication hota hai.

4. Read/Write signals is bus se jaate hain.

5. Interrupt, Clock, Reset jaise signals bhi yahin se jaate hain.

6. Ye data transfer ke process ko initiate karti hai.

7. Iske signals timing unit se generate hote hain.

8. Ye ensure karti hai ki har component sahi time pe kaam kare.

1. Processor ka Role in Microprocessor System
 Central Hub: Processor hi microprocessor system ka “dimaag” hota hai. Ye
sabhi instructions fetch, decode aur execute karta hai.

 Coordination: Memory (RAM/ROM) aur I/O devices (keyboard, display, sensors,

actuators) ke beech data flow ko control karta hai.

 Performance Driver: Processor ki speed, architecture aur features hi system ki

overall throughput aur response time decide karte hain.

2. Processor ke Core Components – Detailed Explanation

2.1 Arithmetic Logic Unit (ALU)

 Datapath Structure
ALU typically ek combinational circuit hota hai jisme:

o Adder/Subtractor block (ripple-carry ya carry-lookahead adder)

o Logic Unit (bitwise AND, OR, XOR, NOT)

o Barrel Shifter (logical/arithmetic shifts, rotations)

In blocks ke beech multiplexer laga hota hai jo control signals (CU se) ke
basis par correct operation select karta hai.

 Flags Generation
ALU output ke saath saath flags bhi generate hote hain:

o Zero (Z): Output sabhi bits zero → set

o Carry (C): Unsigned add/sub me carry/borrow → set

o Sign (S): Result ka MSB → indicate signed sign

o Overflow (V): Signed overflow detect

Ye flags phir Control Unit ya conditional instructions (e.g. JZ, JC) ko guide
karte hain.

2.2 Control Unit (CU)

 Instruction Decoding

o Hard-wired CU: Logic gates aur finite-state machine se implement —

jaldi hota hai, par flexibility kam

o Microprogrammed CU: Instruction ROM (control store) me

micro-instructions store — naya instruction add karna easier
  Sequence Control

o Clock Generator se timing signals pakad ke har micro-operation (fetch,

decode, execute) ko synchronize karta hai.

o Instruction Register (IR) ka opcode field decode karke “control word”

generate hota hai, jo ALU, registers, buses ko enable/disable karta hai.

 Control Signals Examples

o MemRead, MemWrite

o ALUOp[1:0] (ADD=00, SUB=01, AND=10, OR=11, etc.)

o RegDst, RegWrite, ALUSrc (RISC pipelines mein)

2.3 Registers

 Register File Architecture

o Ek chip-internal array of registers with multiple read/write ports

o Typical RISC design: 32 × 32-bit registers, 2 read ports, 1 write port

 Special-Purpose Registers

o Program Counter (PC): Next instruction address

o Instruction Register (IR): Current instruction bits

o Stack Pointer (SP): Memory stack ka top address

o Base/Index Registers: E ective addressing ke liye

 Read/Write Timing

o Registers synchronous – clock edge pe data write

o Asynchronous reads – data immediately available to ALU

 Pipeline Registers (in pipelined CPUs)

o IF/ID, ID/EX, EX/MEM, MEM/WB latches each pipeline stage ke beech data
hold karte hain.

2.4 Internal Cache

 Hierarchy & Purpose

o L1 Cache: On-chip, split I-cache & D-cache, very low latency (1–2 cycles)

o L2/L3 Cache: Larger, slightly higher latency, shared among cores

 Mapping & Replacement

 o Direct-Mapped: Simple, fast, par conflict misses zyada

o Set-Associative (e.g. 4-way): Balance between speed & miss rate

o Replacement Policies: LRU (Least Recently Used), FIFO, Random

 Cache Coherence (Multi-core systems)

o MESI protocol (Modified, Exclusive, Shared, Invalid) ensure karta hai data
consistency across caches.

2.5 Bus Interface Unit (BIU)

 Bus Protocols

o Address Bus: CPU se memory/I-O device tak address signals

o Data Bus: Bidirectional data transfer lines

o Control Bus: Read/Write#, BusGrant#, Interrupt#, Clock

 Bus Cycle Types

o Single-cycle: Ek bus transaction ek cycle me complete

o Burst-mode: Multiple sequential data transfers ek transaction me

 Arbitration & Wait States

o Agar multiple masters (DMA, CPU, I/O) bus request karein, arbitration
logic decide karta hai grant priority

o Wait States: Memory slow ho to CPU ko stall karne ke liye insert kiye jate
hain, taki data ready ho jaye before transfer.

In sub-components ka seamless coordination ensure karta hai ki processor high

throughput, low latency operations perform kare—jo ultimately system ki performance
define karta hai. Agar aapko kisi component ka aur deeper timing diagram, RTL view, ya
real-world example (e.g. Intel vs ARM) chahiye, to bataiyega!

8 important points— Address Bus, Data Bus, aur

Control Bus

1. Address Bus – 8 Key Points

1. CPU se memory ya I/O device tak address bhejne ka kaam karti hai.
2. Unidirectional hoti hai – sirf CPU se nikalti hai, return nahi hoti.

3. Har address ek unique memory location ko represent karta hai.

4. Address Bus ka size (jaise 16-bit, 20-bit) decide karta hai kitni memory access
ho sakti hai.

5. Agar 16-bit address bus hai, toh 2¹⁶ = 65,536 (64KB) locations access ki ja sakti
hain.

6. No data transfer hota hai is bus se, sirf address bheja jata hai.

7. Input/output mapping ke liye bhi address bus ka use hota hai.

8. Har memory ya I/O device ko ek unique address assign hota hai.

2. Data Bus – 8 Key Points

1. Ye bus actual data ko transfer karti hai – CPU se memory ya memory se CPU.

2. Bidirectional hoti hai – data dono directions me ja sakta hai.

3. Iska size (jaise 8-bit, 16-bit, 32-bit) decide karta hai ek baar me kitna data jaa
sakta hai.

4. Agar 8-bit data bus hai, toh ek baar me 8-bit (1 byte) data transfer hota hai.

5. CPU, memory, aur I/O devices sab is bus ko use karte hain.

6. Data Bus directly connect hoti hai CPU ke internal data register se.

7. Instructions aur data dono is bus ke through transfer hote hain.

8. Bus contention (jab do devices ek sath data bhejna chahein) ka issue is bus me
ho sakta hai.

3. Control Bus – 8 Key Points

1. Ye bus control signals transfer karti hai – jaise Read, Write, Clock, Reset,
Interrupt.

2. Ye batati hai CPU kya operation perform kar raha hai.

3. Both unidirectional and bidirectional signals ho sakte hain depending on

signal type.

4. CPU jab kisi location se data read karta hai, toh "Read" signal send karta hai.
 5. Jab CPU data likhta hai, toh "Write" signal send karta hai.

6. Control Bus timing aur synchronization ke liye bhi use hoti hai.

7. Ye CPU aur devices ke beech coordination banati hai.

8. Ye bus kaafi critical hoti hai for system functioning, bina iske CPU ko pata nahi
chalega kya karna hai.

MEMORY UNIT
1. RAM (Random Access Memory) – 10 Points

1. Temporary memory hoti hai (Volatile memory).

2. Power o hone par data erase ho jata hai.

3. CPU is memory se read & write dono kar sakta hai.

4. Very fast hoti hai in terms of access speed.

5. Operating system aur applications yahin load hote hain runtime ke dauraan.

6. Do main types – SRAM (Static RAM) & DRAM (Dynamic RAM).

7. DRAM cheap hoti hai but slow; SRAM fast hoti hai but costly.

8. RAM har computer ka essential component hoti hai.

9. RAM ka size performance ko a ect karta hai.

10. RAM ka data CPU ke liye working space hota hai.

2. ROM (Read Only Memory) – 10 Points

1. Non-volatile memory hoti hai (Power o hone par data safe rehta hai).

2. CPU isme se sirf read kar sakta hai (normal condition me).

3. Isme firmware ya BIOS store hota hai.

4. Data manufacturing time pe store kiya jata hai.

5. Permanent programs (like system booting) store hote hain.

6. Data baar-baar change nahi kiya ja sakta.

7. Fast access speed hoti hai, par RAM se slow hoti hai.
8. ROM ka use embedded systems me bhi hota hai (like washing machine
controllers).

9. Secure hoti hai accidental overwriting ke liye.

10. ROM ka data boot time par automatically load hota hai.

3. PROM (Programmable ROM) – 10 Points

1. ROM ki ek special type hai jise user ek baar program kar sakta hai.

2. Initially blank hoti hai.

3. Ek baar program hone ke baad data change nahi ho sakta.

4. Special hardware (PROM programmer) se program ki jati hai.

5. OTP – One Time Programmable bhi kehte hain.

6. Non-volatile memory hoti hai.

7. Error hone par usko fix karna possible nahi hota.

8. Small quantity production ke liye useful hoti hai.

9. Security applications me bhi use hoti hai.

10. Simple aur reliable hoti hai, par flexibility nahi hoti.

4. EPROM (Erasable Programmable ROM) – 10 Points

1. PROM ki upgraded form hai jise erase karke dobara program kiya ja sakta hai.

2. Data ko erase karne ke liye UV light use hoti hai.

3. Chip ke upar ek transparent quartz window hoti hai UV exposure ke liye.

4. Erasing me kuch minutes lagte hain.

5. Erase karne ke baad pura chip blank ho jata hai.

6. Special programmer se dobara data likha jata hai.

7. Non-volatile memory hai.

8. Reusable hai but not frequently (limited erase cycles).

9. Development aur testing me useful hai.

10. Power failure ke baad bhi data safe rehta hai.

 5. EEPROM (Electrically Erasable PROM) – 10 Points

1. EPROM ka advanced version hai jo electric signal se erase/write hoti hai.

2. UV light ki need nahi hoti.

3. Specific bytes ko individually erase ya write kar sakte hain.

4. Slow hoti hai compared to RAM.

5. Erase/write cycle limited hoti hai (usually 10,000 to 100,000).

6. Data non-volatile hota hai.

7. Microcontrollers me commonly use hoti hai (Arduino, etc.).

8. Reliable hai embedded systems ke liye.

9. BIOS update EEPROM me hota hai.

10. Data ko frequently update karne ke liye thodi limited hoti hai.

6. Flash Memory – 10 Points

1. EEPROM ka advanced version hai – faster & more e icient.

2. Block-wise erase/write hoti hai (EEPROM se di erent).

3. Non-volatile memory hai – power o hone par data safe.

4. USB drives, SSDs, memory cards me use hoti hai.

5. High storage capacity ke saath available hoti hai.

6. Data quickly erase aur write kiya ja sakta hai.

7. Limited write/erase cycles – usually 10,000 to 1,000,000.

8. Compact, lightweight & no moving parts (shockproof).

9. Permanent storage ke liye highly popular hai.

10. Flash memory ne hard disk drives kaafi jagah replace kar di hai.

UNIT 02
Intel 8085 Pin Diagram (40-Pin IC)
1. Vcc (Pin 40)

 Yeh pin +5V power supply provide karti hai microprocessor ko.

 8085 ko kaam karne ke liye constant 5V chahiye hota hai.

 Is pin ko power supply ke positive terminal se connect kiya jaata hai.

 Without is pin, microprocessor on hi nahi hoga.

 Har internal circuit isi voltage se chalta hai.

2. Vss (Pin 20)

 Yeh pin ground yaani 0 volt ke liye hoti hai.

 Isse negative terminal of power supply connect hota hai.

 Processor ke liye yeh reference voltage provide karta hai.

 Har signal ko measure karne ke liye ground zaruri hota hai.

 Vcc aur Vss milke complete power path banate hain.

3. X1 & X2 (Pin 1 & 2)

 Yeh dono pins clock oscillator se connect hoti hain.

 Isme 6 MHz crystal oscillator lagaya jaata hai.

 X1 aur X2 ke through clock signal generate hota hai.

 Clock signal microprocessor ke operations ko synchronize karta hai.

 Iske bina processor ki timing kaam nahi karegi.

4. CLK (OUT) (Pin 37)

 Is pin se clock output milta hai.

 Dusre external devices ko synchronize karne ke kaam aata hai.

 Clock internally generate hoti hai aur is pin se bahar milti hai.

 Yeh output signal timing ke liye use hoti hai.

 Isse memory aur I/O devices same clock se kaam kar sakte hain.
5. AD0–AD7 (Pin 12 to 19)

 Yeh pins address/data multiplexed lines hoti hain.

 Jab address bhejna hota hai tab yeh A0-A7 ka kaam karti hain.

 Jab data exchange hota hai tab yeh D0-D7 ka kaam karti hain.

 Ek hi wire dono kaam karta hai isliye multiplexing bolte hain.

 ALE signal ke through address ko latch karke separate kiya jaata hai.

6. A8–A15 (Pin 21 to 28)

 Yeh 8 pins higher-order address lines ke liye hain.

 A8 to A15 address bus ke upper 8 bits ko carry karte hain.

 Memory ko 64 KB tak address karne ke liye use hoti hain.

 Yeh sirf address bhejne ke liye use hoti hain, data ke liye nahi.

 Inhe demultiplex nahi karna padta kyunki yeh hamesha address hi bhejti hain.

7. ALE (Address Latch Enable) (Pin 30)

 Is signal se pata chalta hai ki abhi address bheja jaa raha hai.

 Jab ALE high hota hai tab AD0-AD7 mein address hota hai.

 Is signal se external latch ko trigger kiya jaata hai (jaise 74LS373).

 Latch AD0–AD7 ko store karta hai taaki data phase mein address na kho jaaye.

 ALE ek timing signal hai, har instruction ke start mein high hota hai.

8. RD̅ (Pin 32)

 Jab RD̅ low hota hai, iska matlab hai processor kuch read kar raha hai.

 Yeh memory ya I/O se data lene ke liye hota hai.

 RD̅ signal active-low hota hai (̅ ka matlab hota hai low active).

 Memory ya device data bus pe data bhejta hai jab yeh signal low hota hai.

 Processor tabhi data read karta hai jab yeh signal low ho.
9. WR̅ (Pin 31)

 Jab WR̅ low hota hai, processor kuch write kar raha hota hai.

 Memory ya I/O device ko data bhejne ke liye hota hai.

 Data AD0–AD7 par hota hai, aur WR̅ low hone par device isse accept karta hai.

 Yeh bhi active-low signal hai.

 Memory write, I/O write dono mein use hota hai.

10. IO/M̅ (Pin 34)

 Yeh batata hai ki operation Memory ka hai ya I/O ka.

 Agar IO/M̅ = 0, toh Memory operation ho raha hai.

 Agar IO/M̅ = 1, toh I/O operation ho raha hai.

 Isse memory aur I/O port easily di erentiate kiye jaate hain.

 Control signals ke sath milke system ko proper instruction deta hai.

11. S0 & S1 (Pin 29 & 33)

 Dono milkar current operation ka status batate hain.

 Har machine cycle mein yeh alag-alag combination mein hote hain.

 Example: Opcode fetch, Memory Read, Memory Write, etc.

 Yeh signals debugging aur bus control ke liye kaam aate hain.

 External logic circuits ko yeh bata sakte hain ki processor kya kar raha hai.

12. TRAP (Pin 6)

 Yeh ek Non-Maskable Interrupt (NMI) hai.

 Iska matlab hai isse disable nahi kiya jaa sakta.

 Yeh sabse highest priority ka interrupt hota hai.

 Power failure jaisi emergency mein TRAP use kiya jaata hai.

 Yeh edge + level triggered hota hai (dono conditions se activate hota hai).
13. RST7.5, RST6.5, RST5.5 (Pins 7 to 9)

 Yeh sab maskable interrupts hain.

 Inhe enable/disable SIM instruction ke through kiya jaa sakta hai.

 RST7.5 > RST6.5 > RST5.5 (priority wise).

 Inka fixed vector address hota hai (jaise RST7.5 = 003C H).

 Yeh level triggered (6.5, 5.5) aur edge triggered (7.5) hote hain.

14. INTR (Pin 10)

 General Purpose Interrupt pin hai.

 External device se processor ko interrupt bhejne ke liye use hota hai.

 Sabse lowest priority ka interrupt hai.

 Processor INTR ko acknowledge karta hai agar interrupt enable ho.

 Iska koi fixed address nahi hota, external device vector provide karta hai.

15. INTA̅ (Pin 11)

 Jab processor INTR ko accept karta hai, toh INTA̅ low karta hai.

 Yeh external device ko batata hai ki uska interrupt accept ho gaya.

 Device phir apna instruction (usually RST) data bus pe bhejta hai.

 INTA̅ ek acknowledgement signal hai.

 Interrupt driven system mein yeh bahut important hota hai.

16. SID (Pin 5)

 Serial Input Data ke liye hota hai.

 Is pin se processor serial form mein data accept karta hai.

 RIM instruction ke through data ko check kiya jaa sakta hai.

 External sensors ya devices isse connect kiye jaate hain.

 Sirf 1-bit data ek baar mein accept karta hai.

17. SOD (Pin 4)

 Serial Output Data ke liye use hota hai.

 SIM instruction ke through 1-bit data ko serially bheja jaa sakta hai.

 External devices jaise LED controller ya serial communication modules ke liye

useful hai.

 Data bus ka use nahi karta.

 Simple serial communication ka part hai.

18. HOLD (Pin 39)

 Jab external device bus ka control chahta hai, woh HOLD pin ko high karta hai.

 Processor is request ko accept karta hai toh bus chhod deta hai.

 DMA (Direct Memory Access) ke time yeh use hota hai.

 Jab HOLD active hota hai, processor koi read/write operation nahi karta.

 Safe bus transfer ke liye useful hai.

19. HLDA (Pin 38)

 Hold Acknowledge signal hai.

 Jab processor HOLD accept kar leta hai, HLDA ko high karta hai.

 HLDA = 1 matlab processor ne bus chhod di hai.

 Jab tak HLDA high rahta hai, processor bus use nahi karta.

 HOLD signal low hone par HLDA bhi low ho jaata hai.

20. READY (Pin 35)

 Yeh pin slow memory/device ke saath synchronize karne ke liye hai.

 Agar external device ready nahi hai, toh READY low kar diya jaata hai.

 Jab tak READY = 0, processor wait karta hai (wait state enter karta hai).

 Isse ensure hota hai ki data loss na ho jab slow device use ho.

 Fast processor ko slow memory ke saath match karne mein help karta hai.
21. RESET IN̅ (Pin 36)

 Is pin ko low karne se processor reset ho jaata hai.

 Program Counter reset ho kar 0000H address se start karta hai.

 Interrupts disable ho jaate hain.

 Flags clear ho jaate hain.

 Isse system ek known state se start hota hai.

22. RESET OUT (Pin 3)

 Jab processor reset hota hai, toh yeh pin high hoti hai.

 Dusre external devices ko bhi reset karne ke liye yeh signal diya jaata hai.

 Synchronization ke liye yeh pin useful hoti hai.

 RESET IN se linked hoti hai.

 Reset signal ka propagation yahan se hota hai.

EXPLANATION OF ARCHITECTURE 8085
1. ALU (Arithmetic and Logic Unit):

1. Arithmetic Operations: ALU performs basic arithmetic operations like addition,

subtraction, and comparison. It handles the core mathematical calculations in
the microprocessor.

2. Logical Operations: ALU also does logical operations like AND, OR, XOR, NOT.
Yeh operations bitwise data par apply hote hain.

3. Flag Handling: ALU sets flags like Zero (Z), Carry (CY), Sign (S), and Parity (P)
after every operation, jo ki result ke basis pe update hoti hain.

4. Shifting and Rotating: ALU bitwise shifting or rotating operations perform karta
hai, jisse data ko manipulate kiya jaata hai, jaise multiplication or division by
powers of 2.

5. Result Storage: ALU ka result usually accumulator register mein store hota hai,
jo next instructions ke liye available hota hai.

2. Instruction Decoder:
 1. Instruction Interpretation: Instruction decoder instruction ko read karta hai aur
samajhta hai ki kaunsa operation perform karna hai (Arithmetic, Data Transfer,
etc.).

2. Control Signal Generation: Jab instruction decode hota hai, decoder control
signals generate karta hai jo ALU, registers aur memory ko control karte hain.

3. Opcode Decoding: Decoder opcode ko identify karta hai, jo microprocessor ko

batata hai ki kaunsa operation perform karna hai (addition, subtraction, etc.).

4. Operand Identification: Decoder ko operands (data ya address) ko identify

karna padta hai, jo instruction mein involved hote hain.

5. Instruction Type Identification: Decoder samajhta hai ki instruction kis type ka

hai (data transfer, arithmetic, etc.), aur uske hisaab se processing instructions ko
handle karta hai.

3. Address Bu er:

1. Address Storage: Address bu er memory ya I/O devices ko access karne ke liye

address ko temporarily store karta hai.

2. Memory Address Transmission: Yeh address ko memory ya I/O ports tak bhejta
hai taaki correct memory location se data fetch ya store kiya jaa sake.

3. I/O Addressing: Address bu er I/O devices ko bhi address karta hai, jaise
keyboards, printers, etc.

4. Bu er Latching: Address bu er address ko latch karke hold karta hai taaki jab
memory ko address ki zarurat ho, to woh available ho.

5. Bus Isolation: Address bu er CPU ko memory aur I/O se isolate karta hai, taaki
ek time par sirf ek device address line ko use kare, isse data conflict nahi hota.

4. Data Bu er:

1. Data Storage: Data bu er microprocessor ke data ko temporarily store karta hai

jab tak data ko memory ya I/O devices tak bheja nahi jata.

2. Bidirectional Data Transfer: Yeh data ko memory se CPU ya CPU se memory tak
transfer karta hai, data ko read/write karne mein help karta hai.

3. E icient Data Handling: Data bu er microprocessor ko data transfer ke liye

ready rakhta hai, jisse process delay nahi hota.
 4. Bu er Latching: Yeh data ko latch karke store karta hai taaki jab zarurat ho, data
quickly transfer ho sake.

5. Data Bus Synchronization: Data bu er data bus ko synchronize karta hai, taaki
data ek sahi time par CPU aur memory ke beech transfer ho sake.

5. Interrupt Control:

1. Interrupt Handling: Interrupt control unit external devices se interrupt signals ko

handle karta hai, aur microprocessor ko interrupt response ke liye direct karta
hai.

2. Interrupt Prioritization: Iska kaam interrupts ko prioritize karna hai. Higher-

priority interrupt pehle handle hota hai, baaki ko wait karna padta hai.

3. Interrupt Masking: Jab microprocessor ko kisi interrupt ka response nahi

chahiye, toh interrupt mask kiya jaata hai, jisse wo ignore ho jaata hai.

4. Interrupt Enable/Disable: Interrupt control unit interrupts ko enable ya disable

karta hai, taaki specific interrupts ko handle kar sake.

5. Interrupt Vectoring: Jab interrupt hota hai, interrupt control unit interrupt
service routine (ISR) ke liye address generate karta hai, jahan se instruction jump
hoti hai.

6. Serial I/O Control:

1. Serial Data Communication: Serial I/O control serial data transfer ko handle
karta hai, jisme data bit-by-bit transfer hota hai.

2. Transmit and Receive Control: Yeh transmit aur receive operations ko manage
karta hai, taaki microprocessor aur external devices ke beech data ka exchange
ho sake.

3. Asynchronous Communication: Yeh asynchronous communication ko support

karta hai, jisme sender aur receiver ka clock synchronize nahi hota.

4. Data Framing: Serial I/O control data ko frame karta hai, jisme start, stop aur
parity bits include hoti hain for error detection.

5. Flow Control: Yeh data transfer ke flow ko control karta hai, jisse bu er overflow
na ho aur data transfer e iciently ho sake.

7. Timing and Control Circuitry:

 1. Clock Signal Generation: Timing and control circuitry clock signals generate
karta hai, jo microprocessor ke saare operations ko synchronize karta hai.

2. Control Signal Generation: Yeh control signals generate karta hai (jaise read,
write) jo microprocessor ke alag components ko activate karte hain.

3. Clock Cycle Management: Yeh instruction cycle ko manage karta hai, jisme
instruction fetch, decode, execute phases ko time ke hisaab se manage kiya
jaata hai.

4. Synchronization of Units: Yeh ALU, registers, memory, aur I/O devices ko

synchronize karta hai, taaki har component apna kaam sahi time pe kare.

5. Instruction Cycle Control: Yeh instruction cycle ko control karta hai, har
instruction ke liye cycle manage karta hai, jaise fetch, decode, execute, taaki
CPU e iciently kaam kare.

RESISTER CLASSIFIED…..
1. General Purpose Registers (B, C, D, E, H, L):

1. Data Storage: Yeh registers general data storage ke liye use hote hain. Inme
temporary data ko store kiya jaata hai during computation or data transfer.

2. Register Pairing: In registers ko pair karke use kiya jaata hai. Jaise BC, DE, HL
register pairs form karte hain jo 16-bit data store karte hain.

3. Arithmetic and Logical Operations: Yeh registers ALU ke saath arithmetic and
logical operations mein use hote hain. Data manipulation in registers se hoti hai.

4. Data Transfer: Yeh registers CPU ke beech data transfer mein help karte hain.
Example: B register ko C register se data transfer ho sakta hai.

5. Addressing: H aur L registers ko address register ke taur pe use kiya jaata hai.
Yeh 16-bit address store karte hain, jo memory location ke liye hota hai.

3. Temporary Register (T):

1. Temporary Data Storage: Temporary register ka use intermediate or temporary

data ko store karne ke liye hota hai jab data ko process kiya jaa raha ho.

2. Data Movement: Yeh register data ko ek location se doosri location transfer

karne mein help karta hai, bina accumulator ko directly use kiye.

3. Short-Term Operation: Yeh short-term operations mein use hota hai, jahan data
ko zyada der tak store nahi karna hota.

4. Instruction Execution: Temporary register ka use instruction execution ke

dauraan hota hai jab ek instruction doosre instruction ko modify kar raha ho.
 5. Flexibility: Yeh register flexible hota hai aur directly ALU aur accumulator ke
beech mein data pass karne mein help karta hai.

. Instruction Register (IR):

1. Instruction Storage: Instruction register har instruction ko store karta hai jo CPU
execute karega. Jab instruction fetch hota hai, IR mein load ho jaata hai.

2. Decoding: IR instruction ko decode karta hai jisse microprocessor samajhta hai

ki kaunsa operation perform karna hai.

3. Control Signal Generation: IR decode karke control signals generate karta hai,
jo ALU, registers, aur memory ko operate karne mein help karte hain.

4. Instruction Cycle: Yeh register instruction cycle mein key role play karta hai,
instruction ko fetch aur execute karne mein.

5. Temporary Holding: Jab instruction execute hoti hai, IR temporarily instruction

ko store karta hai takki proper decoding aur execution ho sake.

The Flag Register in the 8085 microprocessor is a special 8-bit register that contains
bits called flags, which are used to indicate the status or condition of the
microprocessor after performing an operation. These flags are set or reset based on the
result of arithmetic, logical, or other operations.

The Flag Register in the 8085 has five flags, and they are as
follows:
1. Sign Flag (S):

 Bit Position: 7th bit (Most Significant Bit)

 Purpose: The Sign Flag indicates the sign of the result of an operation. If the
result of an operation is negative, the sign flag is set to 1, otherwise, it is 0.

 Condition:

o If the result is negative (i.e., the most significant bit of the result is 1), the
flag is set to 1.

o If the result is positive (i.e., the most significant bit of the result is 0), the
flag is set to 0.

2. Zero Flag (Z):

 Bit Position: 6th bit

 Purpose: The Zero Flag is set when the result of an operation is zero.

 Condition:
 o If the result of an arithmetic or logical operation is zero, the Zero Flag is
set to 1.

o If the result is non-zero, the Zero Flag is reset to 0.

3. Auxiliary Carry Flag (AC):

 Bit Position: 4th bit

 Purpose: The Auxiliary Carry Flag is used in binary coded decimal (BCD)
operations. It is mainly used to indicate carry from the lower nibble (4 bits) to the
upper nibble during an operation.

 Condition:

o If there is a carry from bit 3 to bit 4 during an addition, the Auxiliary Carry
Flag is set to 1.

o If there is no carry, the flag is reset to 0.

4. Parity Flag (P):

 Bit Position: 2nd bit

 Purpose: The Parity Flag indicates whether the number of 1s in the result is odd
or even.

 Condition:

o If the result of an operation contains an even number of 1s, the Parity

Flag is set to 1 (even parity).

o If the result contains an odd number of 1s, the Parity Flag is set to 0 (odd
parity).

5. Carry Flag (CY):

 Bit Position: 0th bit (Least Significant Bit)

 Purpose: The Carry Flag is used to indicate if there was a carry-out from the
most significant bit (MSB) during an addition operation, or if there was a borrow
during a subtraction operation.

 Condition:

o For addition: If there is a carry-out from the most significant bit, the Carry
Flag is set to 1.

o For subtraction: If there is a borrow, the Carry Flag is set to 1.

o If there is no carry or borrow, the flag is reset to 0.

Summary Table of Flags:

Flag Bit Set Condition Reset Condition

Position

Sign (S) 7th Result is negative (MSB = 1) Result is positive

(MSB = 0)

Zero (Z) 6th Result is zero Result is non-zero

Auxiliary Carry 4th Carry from bit 3 to bit 4 during No carry from bit 3 to
(AC) addition bit 4

Parity (P) 2nd Even number of 1s in result Odd number of 1s in

result

Carry (CY) 0th Carry/borrow occurred in No carry/borrow

operation occurred

Important Points:

 Flag Register is typically not directly accessible to the programmer, but the
individual flags can be accessed by specific instructions.

 The Carry Flag (CY) is important for operations like addition, subtraction, and
rotating operations.

 The Zero Flag (Z) is often used in conditional branching to check if a result is
zero.

Interrupts in 8085 Microprocessor:

An interrupt is a mechanism that temporarily halts the execution of the current program
and gives control to a special program, known as the Interrupt Service Routine (ISR),
to handle specific tasks. After the ISR is executed, control is returned to the main
program.

In the 8085 microprocessor, interrupts are used to handle asynchronous events like
hardware signals, user input, or timer events. They allow the microprocessor to respond
to external events without having to constantly check for them in the program.

Types of Interrupts in 8085:

The 8085 microprocessor supports several types of interrupts, which can be classified
into maskable and non-maskable interrupts.

1. Maskable Interrupts:
  Definition: These are interrupts that can be disabled or masked by the
microprocessor. The interrupt is not processed until it is unmasked by a specific
instruction.

 Types of Maskable Interrupts in 8085:

 RST7.5 (Restart 7.5):

o Priority: Highest among the maskable interrupts.

o Operation: When this interrupt occurs, the 8085 microprocessor jumps

to address 003C (Hex).

o Masking: Can be masked by using the SIM (Set Interrupt Mask)

instruction.

 RST6.5 (Restart 6.5):

o Priority: Second highest among maskable interrupts.

o Operation: When this interrupt occurs, the 8085 microprocessor jumps

to address 0038 (Hex).

o Masking: Can also be masked by the SIM instruction.

 RST5.5 (Restart 5.5):

o Priority: Third highest among maskable interrupts.

o Operation: When this interrupt occurs, the 8085 microprocessor jumps

to address 0034 (Hex).

o Masking: Can be masked by the SIM instruction.

 INTR (Interrupt Request):

o Priority: Lowest priority maskable interrupt.

o Operation: This is a general-purpose interrupt that allows external

devices to request an interrupt.

o Masking: Can be masked using the SIM instruction.

2. Non-Maskable Interrupt/HARDWARE INTRUPPTS :

 Definition: These interrupts cannot be disabled or masked. They are always

processed when they occur, and cannot be ignored by the microprocessor.

 TRAP:

o Priority: Highest priority interrupt in 8085, even higher than the maskable
interrupts.
 o Operation: This interrupt has a fixed address of 0024 (Hex), and when it
occurs, the microprocessor jumps to this address to execute the interrupt
service routine (ISR).

o Masking: Non-maskable, meaning it cannot be disabled or masked.

o Application: Used in critical situations, such as power failure or

emergency events.

Interrupt Priority in 8085:

The priority of the interrupts determines the order in which they are serviced if multiple
interrupts occur at the same time. The priority of interrupts in 8085 is as follows:

1. TRAP (highest priority)

2. RST7.5

3. RST6.5

4. RST5.5

5. INTR (lowest priority)

How Interrupts Work in 8085:

1. Interrupt Request: An interrupt is triggered by an external device or an event. For

example, pressing a key on the keyboard may generate an interrupt request.

2. Interrupt Acknowledgment: The microprocessor acknowledges the interrupt by

sending an interrupt acknowledgment signal, after which the interrupt service
routine (ISR) is executed.

3. Interrupt Service Routine (ISR): This is a special program that is executed in

response to the interrupt. The ISR addresses the task that triggered the interrupt
(e.g., reading data from an I/O device).

4. Return from Interrupt: Once the ISR has been executed, the microprocessor
returns to the main program using the RET (Return) instruction.

Interrupt Enable/Disable:

 The Interrupt Enable (EI) instruction allows the microprocessor to respond to

interrupts.

 The Interrupt Disable (DI) instruction disables interrupts, meaning no interrupt

request will be acknowledged.

Detailed Explanation of Each Interrupt:

1. TRAP:
 o Non-maskable.

o Priority: Highest priority interrupt.

o Function: It is used in critical situations, like power failure, and is always

processed when triggered.

o Address: 0024 (Hex).

o Masking: Cannot be masked or disabled.

o Usage: Often used for emergency handling in embedded systems.

2. RST7.5:

o Maskable interrupt.

o Priority: Second highest priority.

o Address: 003C (Hex).

o Masking: Can be masked using SIM instruction.

o Usage: Generally used for high-priority events like system status updates,
etc.

3. RST6.5:

o Maskable interrupt.

o Priority: Third highest priority.

o Address: 0038 (Hex).

o Masking: Can be masked using SIM instruction.

o Usage: Used for mid-priority events.

4. RST5.5:

o Maskable interrupt.

o Priority: Fourth priority.

o Address: 0034 (Hex).

o Masking: Can be masked using SIM instruction.

o Usage: Used for lower-priority events.

5. INTR (Interrupt Request):

o Maskable interrupt.

o Priority: Lowest priority.

 o Address: The address is determined by the microprocessor at the time of
the interrupt (not fixed).

o Masking: Can be masked using SIM instruction.

o Usage: General-purpose interrupt, commonly used for external devices.

Summary Table:

Interrupt Maskable/Non- Priority Address Masking Usage

maskable Ability

TRAP Non-maskable Highest 0024 Cannot be Critical,

(Hex) masked emergency

RST7.5 Maskable High 003C Can be High-priority

(Hex) masked events

RST6.5 Maskable Medium- 0038 Can be Mid-priority

High (Hex) masked events

RST5.5 Maskable Medium 0034 Can be Lower-priority

(Hex) masked events

INTR Maskable Lowest Variable Can be General-

masked purpose

Conclusion:

Interrupts in 8085 are an essential feature that allows the microprocessor to respond to
external events promptly without constantly polling or checking for them in the main
program. The various types of interrupts (maskable and non-maskable) provide
flexibility in handling di erent priority levels of events e iciently.

Software Interrupts in 8085:

Software interrupts are interrupts that are initiated by the program itself rather than by
external hardware devices. In 8085, these interrupts are generated by executing specific
instructions, usually Restart (RST) instructions.

Software interrupts are useful when the program needs to trigger an interrupt for some
specific task, such as handling special events or system services.

Types of Software Interrupts in 8085:

In the 8085 microprocessor, Software Interrupts are generally implemented using the
Restart (RST) Instructions. These instructions include RST 7.5, RST 6.5, RST 5.5, RST
4, RST 3, RST 2, RST 1, and RST 0.
The most commonly used software interrupts in 8085 are RST 7.5, RST 6.5, and RST 5.5,
which are known as Restart Instructions. These instructions cause the program to
jump to specific memory addresses (interrupt vector addresses).

Software Interrupts in Detail:

1. RST 7.5 (Restart 7.5):

o Interrupt Address: 003C (Hex)

o Priority: Highest among the software interrupts.

o Usage: Used for high-priority operations in the software where you want
to interrupt the program and perform a specific task.

o Function: When the RST 7.5 instruction is executed, the program

execution jumps to memory location 003C.

2. RST 6.5 (Restart 6.5):

o Interrupt Address: 0038 (Hex)

o Priority: Second-highest priority among the software interrupts.

o Usage: Used for medium-priority tasks, similar to RST 7.5, but with a
slightly lower priority.

o Function: When the RST 6.5 instruction is executed, the program

execution jumps to memory location 0038.

3. RST 5.5 (Restart 5.5):

o Interrupt Address: 0034 (Hex)

o Priority: Third-highest priority among software interrupts.

o Usage: Used for tasks with lower priority than RST 7.5 and RST 6.5.

o Function: When the RST 5.5 instruction is executed, the program

execution jumps to memory location 0034.

4. RST 4, RST 3, RST 2, RST 1, RST 0:

o Interrupt Addresses: These are used for lower-priority tasks, with

specific addresses assigned to each one.

o RST 4: 0030 (Hex)

o RST 3: 002C (Hex)

o RST 2: 0028 (Hex)

 o RST 1: 0024 (Hex)

o RST 0: 0020 (Hex)

o Priority: These interrupts have progressively lower priorities.

o Usage: These instructions are used for non-urgent operations or general

purposes.

How Software Interrupts Work in 8085:

1. Triggering the Software Interrupt:

o A software interrupt is triggered when a RST instruction is encountered in

the program.

o For example, if the program has the instruction RST 7.5, it will
immediately jump to the memory location associated with 003C (the
interrupt vector for RST 7.5).

2. Interrupt Handling:

o When the software interrupt is triggered, the microprocessor saves the

current address (Program Counter) onto the stack and jumps to the
interrupt vector address corresponding to the specific RST instruction.

o The microprocessor then executes the interrupt service routine (ISR)

written at that address.

3. Return from Interrupt:

o After completing the interrupt service routine (ISR), the RET (Return)
instruction is used to pop the return address from the stack and return
control to the main program.

4. Masking of Software Interrupts:

o Like hardware interrupts, software interrupts (except for TRAP, which is

non-maskable) can also be masked or disabled using the SIM (Set
Interrupt Mask) instruction in the 8085. This means you can prevent
specific software interrupts from being serviced.

Summary of Software Interrupts:

Interrupt Address (Hex) Priority Usage

RST 7.5 003C Highest High-priority tasks

RST 6.5 0038 Second-highest Medium-priority tasks

 RST 5.5 0034 Third-highest Low-priority tasks

RST 4 0030 Lower Non-urgent tasks

RST 3 002C Lower General-purpose tasks

RST 2 0028 Lower General-purpose tasks

RST 1 0024 Lower General-purpose tasks

RST 0 0020 Lowest General-purpose tasks

Conclusion:

Software interrupts in 8085 are used to execute specific tasks or operations at

predetermined memory locations. They allow a program to interrupt its normal flow of
execution and jump to an interrupt service routine (ISR) for handling certain events or
processes. The RST instructions provide di erent levels of priority for handling
interrupts, making it easier to manage critical operations in embedded systems or
software.

8085 Microprocessor Machine Cycle

1. Machine Cycle ka Meaning

Machine cycle ek aisa process hota hai jisme 8085 microprocessor kisi bhi
instruction ko execute karne ke liye ek specific operation perform karta hai jaise
ki: data fetch, memory read, memory write, I/O read/write.

2. Har Instruction ke Execution ke liye Multiple Machine Cycles Lagte Hain

Ek instruction ko complete execute karne ke liye microprocessor ko ek se
zyada machine cycles ki zarurat hoti hai.
✔ Example: LDA 2050H instruction ko execute karne ke liye 4 machine cycles
lagte hain.

3. Machine Cycle Consist karta hai T-States se

Har machine cycle kuch clock pulses se banta hai, jinhe T-states kehte hain.
✔ 1 T-state = 1 clock pulse.
✔ Opcode fetch me 4-6 T-states lagte hain, memory read/write me usually 3 T-
states lagte hain.
4. Types of Machine Cycles
8085 me mainly 6 types ke machine cycles hote hain:

o Opcode Fetch

o Memory Read

o Memory Write

o I/O Read

o I/O Write

o Interrupt Acknowledge

5. Opcode Fetch Cycle

Har instruction start hoti hai opcode fetch se.
✔ Isme microprocessor instruction ka opcode memory se fetch karta hai.
✔ Normally 4 to 6 T-states lagte hain.
✔ Control signal: IO/M = 0, RD = 1

6. Memory Read Cycle

Jab CPU ko memory se data read karna hota hai (except opcode), tab ye
cycle use hoti hai.
✔ Example: MVI A, 32H me 32H ko read karne ke liye.
✔ Time: 3 T-states
✔ Control signal: IO/M = 0, RD = 1

7. Memory Write Cycle

Jab CPU kisi data ko memory me write karta hai, tab ye cycle use hoti hai.
✔ Example: STA 2050H instruction me.
✔ Time: 3 T-states
✔ Control signal: IO/M = 0, WR = 1

8. I/O Read Cycle

Jab CPU kisi I/O device se data read karta hai, tab ye cycle hoti hai.
 ✔ Example: IN 01H instruction.
✔ Control signal: IO/M = 1, RD = 1

9. I/O Write Cycle

Jab CPU kisi I/O device ko data bhejta hai, tab ye cycle hoti hai.
✔ Example: OUT 02H instruction.
✔ Control signal: IO/M = 1, WR = 1

10. Interrupt Acknowledge Cycle

Jab CPU kisi interrupt ko accept karta hai (like INTR), tab ye cycle execute hoti
hai.
✔ CPU interrupt signal ko acknowledge karta hai.
✔ Mostly 3 T-states lagte hain.
✔ Special control signal: INTA = 0

11. Instruction Execution Example:

Example: LDA 2050H execute hone ke liye 4 machine cycles lagte hain:

 Opcode fetch (LDA)

 Memory read (Low byte: 50H)

 Memory read (High byte: 20H)

 Memory read (Data at 2050H)

12. T-States are Crucial for Timing Analysis

Machine cycles ke andar jo T-states hote hain, unse hum calculate kar sakte
hain ki koi instruction kitne microseconds me execute hoga (based on system
clock frequency).

Summary Table in Hinglish:

Machine Cycle Purpose Typical T- IO/M Control

States Signal

Opcode Fetch Opcode ko fetch karna 4–6 0 RD

Memory Read Memory se data read 3 0 RD
karna

Memory Write Memory me data write 3 0 WR

karna

I/O Read I/O port se data read 3 1 RD

karna

I/O Write I/O port me data write 3 1 WR

karna

Interrupt INTR interrupt ka 3 – INTA

Acknowledge response dena

FIG PHOTO SE

T-State in 8085 Microprocessor (Hinglish Explanation)

1. Definition of T-State:

 T-State ek single clock period hota hai.

 Har machine cycle multiple T-states se milke banta hai.

 T-state decide karta hai ki ek operation kitne time me execute hoga.

2. Importance of T-State:

 T-state se microprocessor ke execution speed ka pata chalta hai.

 Jaise agar clock frequency 3 MHz hai, to ek T-state ka time = 1 / 3 MHz = 0.33
microseconds.

3. T-State Naming:

 T-states ko T1, T2, T3, etc. se denote kiya jata hai.

 Ek machine cycle ke andar:

o T1 me address place hota hai

o T2 me control signals activate hote hain

 o T3 me data transfer complete hota hai

4. Example: Opcode Fetch Machine Cycle (Timing Diagram Ke Saath)

Let’s take a typical Opcode Fetch machine cycle which usually has 4 T-states: T1, T2,
T3, and T4.

Timing Diagram:

I’ll describe the signal lines for each T-state. If you want, I can draw a visual version too.

T1:

 Address bus par opcode ka address place hota hai.

 ALE (Address Latch Enable) signal high hota hai.

 IO/M, S1, S0 control lines set hote hain to indicate Opcode Fetch.

T2:

 RD signal low (active) hota hai.

 Memory ko instruction read karne ke liye signal milta hai.

 Memory prepare karti hai data bus par opcode bhejne ke liye.

T3:

 Memory opcode ko data bus par place karta hai.

 CPU us opcode ko read karta hai.

 RD signal wapas high hota hai (inactive).

T4:

 Opcode CPU ke Instruction Register me load hota hai.

 CPU ready hota hai next machine cycle ke liye.

Typical Control Signals Behavior in T-States:

Signal T1 T2 T3 T4

Address Bus Valid Valid Invalid Invalid

Signal T1 T2 T3 T4

ALE High Low Low Low

RD High Low High High

Data Bus Z Z Valid Z

If System Clock = 3 MHz

 1 T-state = 0.33 μs

 Opcode Fetch = 4 T-states = 4 × 0.33 = 1.33 μs

Summary in Points:

1. T-State = 1 clock cycle.

2. Har machine cycle multiple T-states ka combination hota hai.

3. T1 me address set hota hai.

4. T2 me control signal activate hote hain (RD, WR).

5. T3 me data transfer hota hai (memory ya I/O se).

6. Some instructions need 4-6 T-states for opcode fetch.

7. Memory read/write usually takes 3 T-states.

8. Instruction timing = (No. of T-states) × (clock period)

9. Control signals ALE, RD, WR vary with T-states.

10. Timing diagrams help in hardware design and debugging.

Sure! Let's discuss the Classification of the Instruction Set of the 8085
Microprocessor in Hinglish (Hindi + English), with examples and at least 5 points for
each category.

Instruction Set of 8085 – Classification

8085 microprocessor ke instruction set ko broadly 5 categories me divide kiya gaya hai:

1. Data Transfer Instructions

 2. Arithmetic Instructions

3. Logical Instructions

4. Branching Instructions

5. Control Instructions

1. Data Transfer Instructions (Data ka movement)

Purpose: Data ko ek register, memory ya I/O device se doosre place par transfer
karna.

Examples:

 MOV A, B

 MVI C, 45H

 LDA 2050H

 STA 2500H

 IN 01H, OUT 02H

Key Points:

1. Ye instructions sirf data ko copy karte hain, original data delete nahi hota.

2. Memory se register, register se register, register se memory me data transfer hota

hai.

3. No arithmetic or logical operation involved.

4. I/O operations bhi isi category me aate hain (IN, OUT).

5. Mostly 1 or 2 byte ke instructions hote hain.

2. Arithmetic Instructions (Mathematical operations)

Purpose: Addition, subtraction, increment, decrement jaise operations perform

karna.

Examples:

 ADD B

 ADI 10H

 SUB C
  INR D

 DCR M

Key Points:

1. Operations perform hote hain accumulator (A) ke saath.

2. Result always accumulator me store hota hai.

3. Flags (Zero, Sign, Carry, etc.) update hote hain.

4. Direct (immediate) aur indirect operands dono pe kaam hota hai.

5. INR/DCR single register/memory content ko +1/-1 karta hai.

3. Logical Instructions (Bitwise or logical operation)

Purpose: AND, OR, XOR, Compare, Rotate, Clear jaise logical operations karna.

Examples:

 ANA B

 ORA C

 XRA D

 CMP E

 RLC, RAL, CMA

Key Points:

1. Operations mostly bitwise hote hain.

2. CMP compare karta hai bina result store kiye.

3. CMA, CMC, STC directly flags ya accumulator pe kaam karte hain.

4. Rotate instructions bits ko left/right shift karte hain.

5. Flags (especially Zero, Carry) update hote hain.

4. Branching Instructions (Program flow control)

Purpose: Program ka control kisi dusre location pe transfer karna.

Examples:

 JMP 2050H
  JC 3000H, JZ 4000H

 CALL 5000H

 RET, RST 5

Key Points:

1. Jump, Call, Return aur Restart instructions included hain.

2. Conditional (like JZ, CNZ) aur unconditional (JMP, CALL) forms hote hain.

3. Subroutines me jump karne ke liye CALL-RET ka use hota hai.

4. Program ka control specific memory address pe shift hota hai.

5. Flags ke basis pe branching hoti hai.

5. Control Instructions (Special processor control)

Purpose: Processor ke operation ya status ko control karna.

Examples:

 NOP

 HLT

 DI, EI

 SIM, RIM

Key Points:

1. NOP (No Operation) processor ko idle karta hai for 1 machine cycle.

2. HLT processor ko halt (stop) kar deta hai.

3. DI (Disable Interrupt) aur EI (Enable Interrupt) interrupt control ke liye use hote
hain.

4. SIM (Set Interrupt Mask) aur RIM (Read Interrupt Mask) serial communication aur
interrupt ke liye use hote hain.

5. Ye instructions generally system-level control ke liye use hote hain.

Quick Summary Table:

Category Examples Function

Data Transfer MOV, MVI, LDA, STA Data ko ek jagah se dusri jagah le jana

Arithmetic ADD, SUB, INR, DCR Math operations

Logical AND, OR, XOR, CMP, CMA Logical/bitwise operations

Branching JMP, CALL, RET, JZ Program control shift

Control NOP, HLT, DI, EI Processor control

various data transfer instructions of the 8085 microprocessor.

1. MOV Instruction

Example: MOV A, B → Register B ka data Register A me copy hoga.

5 Key Points:

1. Data transfer hota hai register to register, memory to register, or vice versa.

2. Format: MOV destination, source.

3. Ye ek 1-byte instruction hoti hai.

4. No flags a ected — sirf data copy hota hai.

5. Memory access ke liye MOV A, M ya MOV M, A use hota hai (M = memory at HL

address).

2. MVI Instruction (Move Immediate)

Example: MVI C, 3EH → Register C me 3EH load hoga.

5 Key Points:

1. Direct 8-bit data register/memory me load karta hai.

2. Format: MVI register/M, data.

3. Ye 2-byte instruction hoti hai.

4. Data memory me store karne ke liye: MVI M, 55H.

5. Koi bhi flag a ect nahi hota.

3. LDA Instruction (Load Accumulator Direct)

Example: LDA 2050H → Memory[2050H] ka data A (accumulator) me.

5 Key Points:

1. Memory se directly data accumulator me load karta hai.

2. 16-bit memory address diya jata hai.

3. Ye 3-byte instruction hoti hai.

4. HL pair ka use nahi hota — direct addressing hai.

5. Flags una ected.

4. STA Instruction (Store Accumulator Direct)

Example: STA 3050H → A ka data memory[3050H] me store hoga.

5 Key Points:

1. Accumulator ka data direct memory location pe store hota hai.

2. 16-bit address instruction ke andar hota hai.

3. Ye bhi 3-byte instruction hai.

4. No flags a ected.

5. Use hota hai data ko memory me save karne ke liye.

5. LHLD Instruction (Load HL Pair Directly)

Example: LHLD 2500H → L ← [2500H], H ← [2501H]

5 Key Points:

1. Memory se 16-bit data HL register pair me load karta hai.

2. LSB → L, MSB → H (Little endian format).

3. Ye bhi 3-byte instruction hoti hai.

4. Data fetching consecutive memory locations se hota hai.

5. HL pair update hota hai, flags nahi.

6. SHLD Instruction (Store HL Pair Directly)

Example: SHLD 3500H → [3500H] ← L, [3501H] ← H

5 Key Points:

1. HL pair ka content memory ke do locations me store hota hai.

2. LSB (L) pehle store hoti hai, MSB (H) baad me.

3. Ye bhi 3-byte instruction hoti hai.

4. Reverse of LHLD.

5. Flags remain unchanged.

7. LDAX Instruction (Load Accumulator Indirect)

Example: LDAX B → Accumulator ← Memory at address in BC.

5 Key Points:

1. BC or DE register pair ke address se A me data lata hai.

2. Indirect addressing ka use karta hai.

3. Sirf BC or DE allowed (not HL).

4. 1-byte instruction hai.

5. Flags a ect nahi hote.

8. STAX Instruction (Store Accumulator Indirect)

Example: STAX D → Memory at DE ← A

5 Key Points:

1. Accumulator ka data memory[DE] me store karta hai.

2. BC/DE register pair ka indirect address use karta hai.

3. 1-byte instruction hoti hai.

4. Fast memory operations ke liye useful hai.

5. Flags remain unchanged.

9. XCHG Instruction (Exchange HL with DE)

 Example: XCHG → H↔D, L↔E

5 Key Points:

1. HL and DE register pairs ke contents exchange karta hai.

2. Koi operand nahi — single instruction.

3. 1-byte instruction hoti hai.

4. Useful in swapping pointers.

5. Koi flag a ect nahi hota.

10. IN / OUT Instructions (I/O Port Data Transfer)

Example:

 IN 01H → Input from port 01H to A

 OUT 02H → A to output port 02H

5 Key Points:

1. IN instruction I/O port se data ko A me load karta hai.

2. OUT instruction A ka data I/O port pe bhejta hai.

3. 2-byte instructions hoti hain.

4. Port address 8-bit hota hai.

5. Flags ko a ect nahi karti.

Summary Table:

Instruction Operation Instruction Size Flag Impact

MOV Copy between registers/memory 1 Byte No

MVI Load immediate data 2 Byte No

LDA Load A from memory (direct) 3 Byte No

STA Store A to memory (direct) 3 Byte No

LHLD Load HL from memory 3 Byte No

SHLD Store HL to memory 3 Byte No

LDAX Load A from memory (indirect) 1 Byte No

STAX Store A to memory (indirect) 1 Byte No

XCHG Exchange HL ↔ DE 1 Byte No

IN / OUT I/O data transfer 2 Byte No

various Arithmetic Instructions of the 8085 microprocessor

1. ADD Instruction

Example: ADD B → A = A + B

5 Key Points:

1. Accumulator (A) ke saath kisi register ya memory ka data add karta hai.

2. Result hamesha accumulator me store hota hai.

3. Format: ADD R ya ADD M

4. Ye 1-byte instruction hai.

5. All flags (Zero, Sign, Carry, Auxiliary Carry, Parity) update hote hain.

2. ADI Instruction (Add Immediate)

Example: ADI 32H → A = A + 32H

5 Key Points:

1. Accumulator me immediate 8-bit value add karta hai.

2. Format: ADI data

3. Ye 2-byte instruction hoti hai.

4. Result hamesha A me store hota hai.

5. All flags a ected.

3. SUB Instruction

Example: SUB C → A = A – C
5 Key Points:

1. Accumulator se kisi register/memory ka data subtract karta hai.

2. Result accumulator me store hota hai.

3. Format: SUB R ya SUB M

4. Ye 1-byte instruction hai.

5. All flags are updated based on result.

4. SUI Instruction (Subtract Immediate)

Example: SUI 2FH → A = A – 2FH

5 Key Points:

1. Accumulator se immediate value subtract karta hai.

2. Format: SUI data

3. Ye 2-byte instruction hai.

4. Result A me aata hai, not in any other register.

5. A ects all flags.

5. INR Instruction (Increment Register)

Example: INR B → B = B + 1

5 Key Points:

1. Kisi bhi register ya memory location ka content 1 se increase karta hai.

2. Format: INR R ya INR M

3. Result wahi register/memory me rehta hai.

4. Flags (except Carry) update hote hain.

5. Useful in loops and counters.

6. DCR Instruction (Decrement Register)

Example: DCR D → D = D – 1
5 Key Points:

1. Register/memory ka data 1 se decrease karta hai.

2. Format: DCR R ya DCR M

3. Ye 1-byte instruction hai.

4. Flags update hote hain (except Carry).

5. Loop control me helpful hota hai.

7. DAD Instruction (Double Add)

Example: DAD H → HL = HL + HL

5 Key Points:

1. HL pair me kisi register pair ka 16-bit addition karta hai.

2. Result HL me store hota hai.

3. Format: DAD rp (rp = B, D, H, SP)

4. Sirf Carry flag a ect hota hai.

5. Ye 1-byte instruction hai.

8. INX Instruction (Increment Register Pair)

Example: INX D → DE = DE + 1

5 Key Points:

1. Register pair (BC, DE, HL, SP) ko 1 se increment karta hai.

2. Format: INX rp

3. Ye 1-byte instruction hai.

4. No flags a ected.

5. Used for pointer/address management.

9. DCX Instruction (Decrement Register Pair)

Example: DCX H → HL = HL - 1
 5 Key Points:

1. Register pair ko 1 se decrease karta hai.

2. Format: DCX rp

3. No flags are a ected.

4. Useful in stack and memory operations.

5. Ye bhi 1-byte instruction hai.

10. CMP Instruction (Compare)

Example: CMP B → Compare A with B

5 Key Points:

1. Accumulator ka value kisi register/memory se compare karta hai.

2. Subtraction jaisa hota hai, but result discard hota hai.

3. Sirf flags set hote hain (especially Zero and Carry).

4. Format: CMP R ya CMP M

5. Useful for decision making (like conditional jumps).

Summary Table:

Instruction Operation Flags A ected Bytes Example

ADD A = A + R/M All flags 1 ADD B

ADI A = A + Immediate All flags 2 ADI 25H

SUB A = A – R/M All flags 1 SUB C

SUI A = A – Immediate All flags 2 SUI 10H

INR R=R+1 All except Carry 1 INR D

DCR R=R-1 All except Carry 1 DCR E

DAD HL = HL + RP Carry only 1 DAD B

INX RP = RP + 1 None 1 INX D

DCX RP = RP - 1 None 1 DCX H

CMP Compare A with R/M All (Result Discard) 1 CMP L

various logical instructions of the 8085 microprocessor.

1. ANA Instruction (Logical AND)

Example: ANA B → A = A AND B

5 Key Points:

1. A register ka content kisi dusre register (e.g., B) ya memory location se AND hota
hai.

2. Result accumulator (A) me store hota hai.

3. Flags a ected: Zero, Sign, Parity, and Auxiliary Carry flags are updated.

4. Carry flag unchanged rehta hai.

5. Instruction format: ANA R or ANA M (M = memory at HL address).

2. ANI Instruction (AND Immediate)

Example: ANI 32H → A = A AND 32H

5 Key Points:

1. Immediate 8-bit data ko A register ke saath AND operation me use karta hai.

2. Result accumulator me store hota hai.

3. Flags a ected: Zero, Sign, Parity, and Auxiliary Carry flags updated.

4. Carry flag una ected rehta hai.

5. Instruction format: ANI data (where data is 8-bit).

3. ORA Instruction (Logical OR)

Example: ORA C → A = A OR C

5 Key Points:

1. A register ka content kisi dusre register (C) ya memory ke saath OR hota hai.
2. Result accumulator me store hota hai.

3. Flags a ected: Zero, Sign, Parity, and Auxiliary Carry flags updated.

4. Carry flag unchanged rehta hai.

5. Instruction format: ORA R or ORA M.

4. ORI Instruction (OR Immediate)

Example: ORI 45H → A = A OR 45H

5 Key Points:

1. Immediate 8-bit data ko A register ke saath OR operation me use karta hai.

2. Result accumulator me store hota hai.

3. Flags a ected: Zero, Sign, Parity, and Auxiliary Carry flags updated.

4. Carry flag una ected rehta hai.

5. Instruction format: ORI data (data is 8-bit).

5. XRA Instruction (Logical XOR)

Example: XRA D → A = A XOR D

5 Key Points:

1. A register ka content kisi dusre register (D) ya memory ke saath XOR hota hai.

2. Result accumulator me store hota hai.

3. Flags a ected: Zero, Sign, Parity, and Auxiliary Carry flags updated.

4. Carry flag una ected rehta hai.

5. Instruction format: XRA R or XRA M.

6. XRI Instruction (XOR Immediate)

Example: XRI 25H → A = A XOR 25H

5 Key Points:

1. Immediate 8-bit data ko A register ke saath XOR operation me use karta hai.
2. Result accumulator me store hota hai.

3. Flags a ected: Zero, Sign, Parity, and Auxiliary Carry flags updated.

4. Carry flag una ected rehta hai.

5. Instruction format: XRI data (where data is 8-bit).

7. CMA Instruction (Complement Accumulator)

Example: CMA → A = NOT A

5 Key Points:

1. Accumulator me jo value hoti hai, uska one’s complement liya jata hai.

2. Result accumulator me store hota hai.

3. Flags update nahi hote.

4. Simple operation for negating the value.

5. Instruction format: CMA (No operand).

8. CMC Instruction (Complement Carry)

Example: CMC → Complement the carry flag

5 Key Points:

1. Carry flag ko complement karta hai (i.e., agar carry hai to no carry, and vice
versa).

2. Flags: Carry flag change hota hai, baaki flags una ected rehte hain.

3. Instruction format: CMC (No operand).

4. Important for changing carry state without performing addition or subtraction.

5. No data transfer or computation, only flag manipulation.

9. RLC Instruction (Rotate Left Circular)

Example: RLC → Rotate A left, carry is shifted into bit 0

5 Key Points:
1. Accumulator ka content left shift hota hai, aur carry flag ko bit 0 me shift kiya
jata hai.

2. Bit 7, jo shift hota hai, woh carry flag me move hota hai.

3. Flags a ected: Carry flag updated.

4. Instruction format: RLC (No operand).

5. This instruction is used in rotating data for serial data transfer.

10. RRC Instruction (Rotate Right Circular)

Example: RRC → Rotate A right, carry is shifted into bit 7

5 Key Points:

1. Accumulator ka content right shift hota hai, aur carry flag ko bit 7 me shift kiya
jata hai.

2. Bit 0, jo shift hota hai, woh carry flag me move hota hai.

3. Flags a ected: Carry flag updated.

4. Instruction format: RRC (No operand).

5. Used for serial data reception and transmission.

11. RAL Instruction (Rotate Accumulator Left through Carry)

Example: RAL → Rotate A left through Carry (bit 7 to carry)

5 Key Points:

1. Accumulator ka content left shift hota hai, carry flag bit 0 me move hota hai.

2. Carry flag ka content bit 7 me shift hota hai.

3. Flags a ected: Carry flag updated.

4. Instruction format: RAL (No operand).

5. Useful for shifting and rotating bits in data manipulation.

12. RAR Instruction (Rotate Accumulator Right through Carry)

Example: RAR → Rotate A right through Carry (bit 0 to carry)

 5 Key Points:

1. Accumulator ka content right shift hota hai, aur carry flag bit 7 me move hota
hai.

2. Carry flag ka content bit 0 me shift hota hai.

3. Flags a ected: Carry flag updated.

4. Instruction format: RAR (No operand).

5. Used for data manipulation and serial communication.

Summary Table for Logical Instructions:

Instruction Operation Flags A ected Instruction Example

Size

ANA A = A AND R/M Zero, Sign, Parity, 1 byte ANA B

AC

ANI A = A AND Immediate Zero, Sign, Parity, 2 byte ANI 30H

AC

ORA A = A OR R/M Zero, Sign, Parity, 1 byte ORA C

AC

ORI A = A OR Immediate Zero, Sign, Parity, 2 byte ORI 50H

AC

XRA A = A XOR R/M Zero, Sign, Parity, 1 byte XRA D

AC

XRI A = A XOR Immediate Zero, Sign, Parity, 2 byte XRI 60H

AC

CMA A = NOT A None 1 byte CMA

CMC Complement Carry flag Carry flag 1 byte CMC

RLC Rotate A left through Carry flag 1 byte RLC

Carry

RRC Rotate A right through Carry flag 1 byte RRC

Carry

RAL Rotate A left through Carry flag 1 byte RAL

Carry
RAR Rotate A right through Carry flag 1 byte RAR
Carry

branching instructions in the 8085 microprocessor

1. JMP (Jump)

Example: JMP 2000H

Explanation:

 Ye instruction program counter ko ek new memory location pe set karta hai, jo

ek direct address hota hai.

 Program flow ko change karta hai bina kisi condition ke.

 2-byte instruction hoti hai.

 Ye instruction always jump karta hai, matlab koi condition nahi.

2. JC (Jump if Carry)

Example: JC 4000H

Explanation:

 Ye instruction carry flag ke state pe depend karta hai.

 Agar carry flag set hai (1), to jump hota hai specified address pe.

 Agar carry flag reset hai (0), to program normal flow me rehta hai.

 2-byte instruction hoti hai.

 Conditional jump hai, jo carry flag pe based hota hai.

3. JNC (Jump if No Carry)

Example: JNC 5000H

Explanation:

 Ye instruction carry flag ke reset hone pe jump karta hai.

 Agar carry flag reset hai (0), to jump hota hai specified address pe.
 Agar carry flag set hai (1), to program flow change nahi hota.

 2-byte instruction hoti hai.

 Ye bhi conditional jump hai, jo carry flag pe based hota hai.

4. JZ (Jump if Zero)

Example: JZ 6000H

Explanation:

 Ye instruction zero flag pe depend karta hai.

 Agar zero flag set hai (1), to jump hota hai specified address pe.

 Agar zero flag reset hai (0), to program flow continue karta hai.

 2-byte instruction hoti hai.

 Ye bhi conditional jump hai, jo zero flag ke value pe based hota hai.

5. JNZ (Jump if Not Zero)

Example: JNZ 7000H

Explanation:

 Ye instruction zero flag ke reset hone pe jump karta hai.

 Agar zero flag reset hai (0), to jump hota hai specified address pe.

 Agar zero flag set hai (1), to program flow continue karta hai.

 2-byte instruction hoti hai.

 Ye conditional jump hai, jo zero flag pe based hota hai.

6. CALL (Call Subroutine)

Example: CALL 8000H

Explanation:

 Ye instruction ek subroutine call karta hai, jisme program specified address pe

jump karta hai.
 Program counter ko stack me save karte hain taaki return address ko retrieve
kiya ja sake.

 Subroutine execute karne ke baad program wapas return hota hai.

 3-byte instruction hoti hai.

 Unconditional call hai, jo specified address pe jump karta hai.

7. CC (Call if Carry)

Example: CC 9000H

Explanation:

 Ye instruction carry flag ke set hone par subroutine call karta hai.

 Agar carry flag set hai (1), to jump hota hai aur subroutine call hoti hai.

 Agar carry flag reset hai (0), to subroutine call nahi hoti.

 3-byte instruction hoti hai.

 Ye conditional call hai, jo carry flag ke state pe based hota hai.

8. CNC (Call if No Carry)

Example: CNC A000H

Explanation:

 Ye instruction carry flag ke reset hone pe subroutine call karta hai.

 Agar carry flag reset hai (0), to subroutine call hoti hai.

 Agar carry flag set hai (1), to subroutine call nahi hoti.

 3-byte instruction hoti hai.

 Ye conditional call hai, jo carry flag pe based hota hai.

9. CZ (Call if Zero)

Example: CZ B000H

Explanation:

 Ye instruction zero flag ke set hone par subroutine call karta hai.
 Agar zero flag set hai (1), to subroutine call hoti hai.

 Agar zero flag reset hai (0), to subroutine call nahi hoti.

 3-byte instruction hoti hai.

 Ye conditional call hai, jo zero flag ke state pe based hota hai.

10. CNZ (Call if Not Zero)

Example: CNZ C000H

Explanation:

 Ye instruction zero flag ke reset hone pe subroutine call karta hai.

 Agar zero flag reset hai (0), to subroutine call hoti hai.

 Agar zero flag set hai (1), to subroutine call nahi hoti.

 3-byte instruction hoti hai.

 Ye conditional call hai, jo zero flag ke state pe based hota hai.

11. RET (Return from Subroutine)

Example: RET

Explanation:

 Ye instruction subroutine ke execution ke baad return address ko retrieve karta

hai aur program counter ko next instruction pe set karta hai.

 Program jo instruction execute kar raha tha, wahan se continue hota hai.

 2-byte instruction hoti hai.

 Unconditional return hota hai, subroutine ka execution complete hone par.

12. RC (Return if Carry)

Example: RC

Explanation:

 Ye instruction carry flag ke set hone par return karta hai.

 Agar carry flag set hai (1), to subroutine se return hota hai.
 Agar carry flag reset hai (0), to return nahi hota.

 2-byte instruction hoti hai.

 Ye conditional return hai, jo carry flag ke state pe based hota hai.

13. RNC (Return if No Carry)

Example: RNC

Explanation:

 Ye instruction carry flag ke reset hone par return karta hai.

 Agar carry flag reset hai (0), to return hota hai.

 Agar carry flag set hai (1), to return nahi hota.

 2-byte instruction hoti hai.

 Ye conditional return hai, jo carry flag pe based hota hai.

14. RZ (Return if Zero)

Example: RZ

Explanation:

 Ye instruction zero flag ke set hone par return karta hai.

 Agar zero flag set hai (1), to return hota hai.

 Agar zero flag reset hai (0), to return nahi hota.

 2-byte instruction hoti hai.

 Ye conditional return hai, jo zero flag pe based hota hai.

15. RNZ (Return if Not Zero)

Example: RNZ

Explanation:

 Ye instruction zero flag ke reset hone par return karta hai.

 Agar zero flag reset hai (0), to return hota hai.

  Agar zero flag set hai (1), to return nahi hota.

 2-byte instruction hoti hai.

 Ye conditional return hai, jo zero flag pe based hota hai.

Summary Table for Branching Instructions:

Instruction Operation Condition Bytes Example

JMP Jump to specified None 2 JMP 2000H

address (unconditional)

JC Jump if carry set Carry flag = 1 2 JC 4000H

JNC Jump if carry not set Carry flag = 0 2 JNC 5000H

JZ Jump if zero flag set Zero flag = 1 2 JZ 6000H

JNZ Jump if zero flag not set Zero flag = 0 2 JNZ 7000H

CALL Call subroutine at None 3 CALL

address (unconditional) 8000H

CC Call if carry set Carry flag = 1 3 CC 9000H

CNC Call if carry not set Carry flag = 0 3 CNC A000H

CZ Call if zero flag set Zero flag = 1 3 CZ B000H

CNZ Call if zero flag not set Zero flag = 0 3 CNZ C000H

RET Return from subroutine None 2 RET

(unconditional)

RC Return if carry set Carry flag = 1 2 RC

RNC Return if carry not set Carry flag = 0 2 RNC

RZ Return if zero flag set Zero flag = 1 2 RZ

RNZ Return if zero flag not set Zero flag = 0 2 RNZ

machine control instructions of the 8085 microprocessor:

1. NOP (No Operation)

Example: NOP

Explanation:

 Ye instruction kuch bhi nahi karta (no operation).

 Program execution ko delay karne ke liye use hota hai.

 Machine cycle complete hoti hai, lekin program counter ya koi bhi flag change
nahi hota.

 Ye instruction debugging ya timing purposes ke liye use hota hai.

 1-byte instruction hoti hai.

2. HALT

Example: HALT

Explanation:

 Ye instruction microprocessor ko stop kar deta hai.

 Jab HALT execute hota hai, to microprocessor execution ko rokh leta hai aur
further instructions execute nahi hoti.

 Machine control instruction hai jo program execution ko completely stop karta

hai.

 Program counter ke next address pe jump nahi hota.

 Ye instruction kisi interrupt ke baad bhi use ho sakta hai, jisse program ko end
karna hota hai.

3. SIM (Set Interrupt Mask)

Example: SIM

Explanation:

 Ye instruction interrupts ko mask karne ke liye use hota hai.

 SIM instruction interrupt system ko control karta hai, jaise RIM ka use input
data ko read karne ke liye hota hai.

 Isme serial output data ko set kiya jata hai aur maskable interrupt ko enable ya
disable kiya jata hai.
 Interrupt enable/disable karne ke liye maskable interrupts ko use karta hai.

 1-byte instruction hoti hai.

4. RIM (Read Interrupt Mask)

Example: RIM

Explanation:

 Ye instruction interrupts ko read karta hai.

 RIM instruction interrupts ke mask state ko check karta hai aur serial data
input ko read karta hai.

 Isse interrupt system ke status ke baare me information milti hai.

 Ye instruction 1-byte hoti hai.

 Iska use system me interrupt handling ko manage karne ke liye hota hai.

5. DI (Disable Interrupts)

Example: DI

Explanation:

 Ye instruction interrupts ko disable karta hai.

 Jab DI execute hota hai, to maskable interrupts temporarily disable ho jate

hain.

 Ye instruction interrupts ko ignore karne ke liye use hota hai jab program ko
uninterrupted execute karna hota hai.

 System ko critical section me protect karne ke liye use hota hai.

 1-byte instruction hoti hai.

6. EI (Enable Interrupts)

Example: EI

Explanation:

 Ye instruction interrupts ko enable karta hai.

 Jab EI execute hota hai, to maskable interrupts ko enable kar diya jata hai.

 Isse interrupts ko allow kiya jata hai, jo microprocessor ke operation ko

interrupt kar sakte hain.

 Critical operations ke baad interrupt ko re-enable karne ke liye use hota hai.

 1-byte instruction hoti hai.

7. INX (Increment Register Pair)

Example: INX H

Explanation:

 Ye instruction register pair ko increment karta hai.

 Agar HL pair diya jata hai, to HL register pair ko increment karke next address
set hota hai.

 HL, DE, BC register pairs ke liye use hota hai.

 Increment operation 2 bytes me hoti hai.

 Program flow me address pointer ko move karne ke liye use hota hai.

8. DCX (Decrement Register Pair)

Example: DCX D

Explanation:

 Ye instruction register pair ko decrement karta hai.

 Agar HL pair diya jata hai, to HL register pair ko decrement karke previous
address set hota hai.

 Ye instruction 2-byte hoti hai.

 Program counter ya kisi address pointer ko backward move karne ke liye use
hota hai.

 HL, DE, BC register pairs me use hota hai.

9. RST (Restart)

Example: RST 0
 Explanation:

 Ye instruction specific subroutine ko restart karta hai.

 RST 0 se lekar RST 7 tak total 8 restart instructions hain, jo fixed memory
addresses pe jump karti hain.

 Har ek RST instruction ek fixed memory address pe jump karta hai, jahan
subroutine execute hota hai.

 1-byte instruction hoti hai.

 Iska use specific subroutine ko execute karne ke liye hota hai.

Summary of Machine Control Instructions:

Instruction Operation Description Bytes Example

NOP No operation Koi action nahi hota 1 NOP

HALT Stop execution Program execution stop 1 HALT

hota hai

SIM Set interrupt mask Interrupts ko control karta 1 SIM

hai

RIM Read interrupt mask Interrupts status ko read 1 RIM

karta hai

DI Disable interrupts Maskable interrupts 1 DI

disable karta hai

EI Enable interrupts Maskable interrupts 1 EI

enable karta hai

INX Increment register pair Register pair ko increment 1 INX H

karta hai

DCX Decrement register pair Register pair ko 1 DCX D

decrement karta hai

RST Restart to specific Specific subroutine ko 1 RST 0

memory address restart karta hai

Conclusion:
Machine control instructions in 8085 are crucial for controlling the execution flow and
managing interrupts. These instructions help in managing operations like halting
execution, enabling/disabling interrupts, and performing operations like no operation
(NOP), restart (RST), and more. These instructions are primarily used for system-level
control and debugging.

Assembly Language Programming

1. Low-Level Language
Assembly language ek low-level language hoti hai jo machine language ke bilkul
kareeb hoti hai. Ye CPU instructions ke liye likhi jaati hai.

2. Mnemonic Codes ka Use

Assembly mein instructions likhne ke liye short forms (mnemonics) ka use hota
hai, jaise MOV, ADD, SUB, JMP etc.

3. Machine Specific Hoti Hai

Assembly code sirf ek specific processor (jaise Intel ya ARM) ke liye likha jaata
hai – ye portable nahi hota.

4. Registers ka Use
CPU ke internal storage (registers) jaise AX, BX, CX, DX ka use data ko temporarily
store karne ke liye kiya jaata hai.

5. Hardware Control Zyada Hota Hai

Assembly language programmer ko hardware pe full control deta hai – ports,
memory locations, bits tak access possible hai.

6. Fast and E icient

Ye language CPU ke instructions ko directly control karti hai, isliye performance
bahut high hota hai.

7. Di icult to Learn
High-level language (C, Python) ke comparison mein assembly zyada complex
hoti hai – instructions zyada hoti hain, aur debugging tough hota hai.

8. Assembler ki Zarurat Hoti Hai

Assembly code ko machine code mein convert karne ke liye ek special software
(assembler) chahiye hota hai.

9. Used in Embedded Systems and OS Development

Assembly ka use low-level hardware programming, microcontroller coding,
BIOS, and Operating Systems mein hota hai.
 10. Comment Support
Assembly code mein comments likh ke code samjhaya ja sakta hai – comments
usually ; se start hote hain.

EXAMPLES…

 Address: Instruction ki memory location (assume ki gayi hai)

 Mnemonic: Instruction ka short form (MOV, ADD, etc.)

 Operands: Data ya registers jinpe instruction ka e ect hota hai

 Comments: Explain karta hai ki instruction kya kar raha hai

Assembly Code Example with Address, Mnemonics, and Comments

Address Mnemonics Operands Comments

0100H MOV AX, 0005H ; AX register mein 5 store karo

0103H MOV BX, 0003H ; BX register mein 3 store karo

0106H ADD AX, BX ; AX = AX + BX (5 + 3 = 8)

0108H MOV [2000H], AX ; AX ka result memory 2000H mein store karo

010CH HLT ; Program ko stop karo

Explanation in Hinglish:

 0100H: Pehli instruction start hoti hai. AX mein 0005H (yaani 5) rakha gaya.

 0103H: BX mein 0003H (yaani 3) rakha gaya.

 0106H: AX = AX + BX → ab AX = 8

 0108H: AX ka result (8) ko memory location 2000H mein store kiya gaya.

 010CH: HLT se program terminate ho jaata hai.

Why Assembly Language is Used to Program

Microprocessor
1. Direct Hardware Control
Assembly se aap CPU ke registers, memory, I/O ports ko directly control kar
sakte ho — jo microprocessor programming mein zaroori hota hai.
2. Speed and E iciency
Assembly programs fast hote hain, kyunki instructions directly processor ke
samajhne layak format mein hote hain. Har instruction CPU ke liye optimized
hota hai.

3. Small Code Size

Microcontrollers aur microprocessors mein memory limited hoti hai. Assembly
language se compact (chhoti) aur optimized code likhna possible hota hai.

4. Precise Timing Control

Real-time systems (jaise washing machines, robots) mein exact timing important
hoti hai. Assembly mein har instruction ka clock cycle known hota hai.

5. Instruction-Level Programming
Microprocessor ke specific instructions ko use karne ke liye assembly zaroori
hoti hai (jaise: interrupts, I/O, flags, etc.).

6. Boot Code / BIOS Development

BIOS, bootloaders, aur embedded systems ke startup code assembly mein likhe
jaate hain, kyunki woh hardware ke bilkul first level pe kaam karte hain.

Advantages of Assembly Language

1. High Speed Execution – Code directly CPU instructions mein hota hai.

2. Hardware-Level Access – Ports, memory, registers ko access karna possible

hota hai.

3. Small and Optimized Code – Low memory usage, suitable for embedded
systems.

4. Real-Time Control – Predictable timing behavior, ideal for real-time

applications.

5. No Dependency on OS – OS ke bina bhi assembly programs run kar sakte hain.

Disadvantages of Assembly Language

1. Di icult to Learn – Har microprocessor ka alag instruction set hota hai, aur
syntax complex hota hai.

2. Non-Portable – Ek processor ka assembly code doosre processor pe nahi

chalega.
 3. Time-Consuming Development – Code likhna aur debug karna bohot slow aur
detailed process hota hai.

4. Hard to Maintain – Assembly code ko samajhna ya update karna mushkil hota

hai, especially bade projects mein.

5. Limited Use – General-purpose applications ke liye assembly suitable nahi hai.

8085 ke har addressing mode

1. Immediate Addressing Mode

 Kya hota hai?

Is mode mein data instruction ke andar hi diya hota hai. Operand (data) ko
directly instruction mein mention kiya jaata hai.

 Example:
MVI A, 32H
→ Iska matlab: A register mein 32H store karo.

 Explanation:
Yahaan MVI ek instruction hai jo register ko koi immediate (turant diya gaya)
value assign karta hai. "32H" ek constant value hai jo A register mein direct copy
hoti hai.

 Use:
Jab aapko koi fixed value kisi register mein directly dalni ho.

2. Register Addressing Mode

 Kya hota hai?

Is mode mein data do registers ke beech transfer hota hai. Dono operands
registers hi hote hain.

 Example:
MOV B, C
→ Iska matlab: C register ka data B register mein copy karo.

 Explanation:
Yahaan MOV ek instruction hai jo ek register se dusre register mein data transfer
karta hai — bina kisi memory access ke. Isse execution fast hota hai.

 Use:
Jab aapko registers ke beech data shift karna ho.
 3. Direct Addressing Mode

 Kya hota hai?

Instruction ke andar memory ka exact address diya hota hai jahan se data lena
ya store karna hota hai.

 Example:
LDA 2050H
→ Iska matlab: Memory location 2050H se data A register mein laana.

 Explanation:
Yahaan LDA instruction ka use kiya gaya hai jo ek fixed memory address se data
uthakar A register mein daalta hai.

 Use:
Jab aapko specific memory address se kaam karna ho, jaise sensor data,
bu er, etc.

4. Register Indirect Addressing Mode

 Kya hota hai?

Memory ka address kisi register pair (jaise HL) mein hota hai. Instruction us
address pe jaakar data read/write karta hai.

 Example:

 LXI H, 2050H

 MOV A, M

→ Iska matlab: HL register pair = 2050H; us location se data A mein load karo.

 Explanation:
M ka matlab hota hai: memory at address pointed by HL. Isse hum dynamic
memory access kar sakte hain — jisme address change ho sakta hai during
execution.

 Use:
Jab aapko memory ka flexible/dynamic access chahiye ho.

5. Implicit (Implied) Addressing Mode

 Kya hota hai?

Is mode mein operand specify nahi kiya jaata, kyunki instruction predefined
register ya flag pe kaam karta hai.
  Example:
CMA
→ Iska matlab: A register ka complement (NOT operation) karo.

 Explanation:
CMA instruction ko koi operand nahi chahiye — yeh hamesha A register pe hi
kaam karta hai. Aise instructions internally defined registers ya flags pe operate
karte hain.

 Use:
Jab aapko simple predefined operations perform karne ho.

UNIT 03

Features of 8086 Microprocessor

1. 16-bit Microprocessor:
8086 ek 16-bit microprocessor hai, iska matlab hai ki ye ek baar mein 16-bit data
process kar sakta hai.

2. 20-bit Address Bus:

Ye 20-bit address bus use karta hai, jisse ye 2^20 = 1 MB tak memory ko address
kar sakta hai.

3. Segmented Memory:
Iska memory system segmented hota hai (Code, Data, Stack, Extra segments) –
jisse memory management e icient hoti hai.

4. Clock Speed:
8086 ki clock speed 5 MHz se 10 MHz tak ho sakti hai.

5. Instruction Queue (Pipelining):

6-byte instruction queue hoti hai – jiska matlab ye hai ki ye fetch aur execute
operations ko simultaneously perform karta hai. (Simple words mein: speed
zyada hoti hai).

6. Minimum & Maximum Modes:

Ye do mode mein kaam kar sakta hai – Minimum Mode (single processor
environment) aur Maximum Mode (multiprocessor environment).

7. General Purpose Registers:

Isme 8 general purpose registers hote hain jaise AX, BX, CX, DX – har ek ko 16-bit
ya 8-bit mein use kiya ja sakta hai.
 Di erence Between 8085 and 8086 Microprocessors (Hinglish mein):

Feature 8085 8086

Data Bus Width 8-bit 16-bit

Address Bus 16-bit (64 KB memory) 20-bit (1 MB memory)

Clock Speed 3 MHz 5–10 MHz

Instruction Nahin hoti (No 6-byte queue (pipelining available)

Queue pipelining)

Architecture Monolithic Segmented (Code, Data, Stack...)

Multiprocessing Support nahin karta Maximum mode mein support karta

hai

Year of Release 1976 1978

Programming Relatively Simple Thoda complex due to segmentation

8086 Microprocessor Pin Diagram

Pin Explanation:

1. AD0 - AD15 (Address/Data Bus):

Ye pins data aur address dono carry karte hain. Jab microprocessor external
memory se data fetch karta hai, to ye pins address ko transmit karte hain aur jab
data ko transmit karna ho to ye data ko transmit karte hain.

2. A16 - A19 (Address Bus):

Ye pins high-order address ko carry karte hain. Inse microprocessor memory ke
higher address locations ko select karta hai.

3. BHE/S7 (Bus High Enable / Status Pin):

Ye pin data bus ke upper byte ko enable karta hai. Agar ye pin high hota hai, to
microprocessor upper byte ko access karega.

4. M/IO (Memory/Input-Output):
Ye pin ye decide karta hai ki operation memory se related hai ya input/output se.
Agar ye high hota hai, to input/output operation ho raha hota hai.

5. RD (Read):
Ye pin memory ya I/O port se data read karne ke liye use hota hai. Agar RD low
hota hai, to data read kiya jata hai.
6. WR (Write):
Ye pin memory ya I/O port pe data write karne ke liye use hota hai. Agar WR low
hota hai, to data write kiya jata hai.

7. ALE (Address Latch Enable):

Ye pin address latch ko enable karta hai. Jab address pins pe address present
hota hai, to ALE high hota hai aur address register ko latch kar leta hai.

8. INTA (Interrupt Acknowledge):

Jab microprocessor interrupt acknowledge karta hai, to ye pin low hota hai.

9. HLDA (Hold Acknowledge):

Ye pin indicate karta hai ki microprocessor bus ko release kar raha hai. Agar
microprocessor kisi aur device ko bus hold dena chahta hai, to ye pin high hota
hai.

10. HLDR (Hold):

Ye pin microprocessor ko signal karta hai ki kisi external device ko bus hold dene
ki permission di gayi hai.

11. DEN (Data Enable):

Ye pin data transfer ke liye use hota hai. Jab DEN low hota hai, tab data transfer
hota hai.

12. DT/R (Data Transmit/Receive):

Ye pin data transfer direction ko decide karta hai. Agar ye pin high hota hai, to
data transmit kiya jata hai, aur agar low hota hai, to data receive hota hai.

13. RESET:
Ye pin microprocessor ko reset karta hai. Jab ye pin active hota hai, to
microprocessor apne initial state pe chala jata hai.

14. CLK (Clock):

Ye pin clock signal ko supply karta hai. Microprocessor ki working ko synchronize
karta hai.

15. VCC:
Ye power supply pin hai. Microprocessor ko operate karne ke liye isse 5V supply
deni hoti hai.

16. GND:
Ye ground pin hai, jo circuit ki grounding ke liye use hota hai.

17. S2, S1, S0 (Status Pins):

Ye pins microprocessor ke current status ko indicate karte hain. Inse pata chalta
hai ki microprocessor kis mode mein hai (memory read, write, etc.).
 18. READY:
Ye pin indicate karta hai ki external device microprocessor ke liye ready hai ya
nahi. Agar external device ready hai, to ye pin high hota hai.

19. INT (Interrupt):

Ye pin interrupt request ke liye hota hai. Jab kisi external device ko interrupt
chahiye hota hai, to ye pin use hota hai.

20. TEST:
Ye pin microprocessor ko test mode mein daalne ke liye use hota hai.

8086 Microprocessor Architecture Overview

The 8086 microprocessor architecture consists of two main functional units: BIU (Bus
Interface Unit) and EU (Execution Unit). Let’s understand both of these units in detail.

1. Bus Interface Unit (BIU)

The BIU handles all operations related to the external communication with memory and
I/O devices. It is responsible for fetching instructions and data.

Here are 10 key points about the BIU:

 1. Address Bus Control:
BIU generates the address for memory and I/O devices. It controls the
multiplexed address/data bus (AD0-AD15, A16-A19).

2. Fetching Instructions:
It fetches instructions from memory. The instruction queue is stored in BIU
before they are passed to the Execution Unit (EU).

3. Memory Address Generation:

BIU generates the e ective address in memory using the segment registers (CS,
DS, SS, ES). It also handles the segment and o set combination.

4. Data Bus:
The BIU controls the 16-bit data bus (D0 to D15) used for data transfer between
the microprocessor and memory or I/O devices.

5. Instruction Queue:
BIU has a 6-byte instruction queue. It fetches instructions in advance and
stores them in the queue to speed up instruction execution in EU.

6. Segment Register Handling:

BIU contains four segment registers (CS, DS, SS, ES) that hold the base
addresses of the di erent segments in memory.

7. Bus Control Signals:

BIU generates control signals like RD, WR, M/IO, ALE, etc., which manage data
flow to and from memory or I/O devices.

8. Opcode Fetch:
BIU handles fetching the opcode of instructions from the memory, which is then
passed to the Execution Unit.

9. Holds Bus during Execution:

While the EU performs its operation, BIU holds the bus for memory read or write
operations, ensuring that the data is properly transferred.

10. Interrupt Handling:

BIU handles the interrupt signal and generates the appropriate signals for
interrupt processing (like INTA) when required.

2. Execution Unit (EU)

The EU is responsible for executing instructions. It processes the instructions fetched

by the BIU and performs logical and arithmetic operations.

Here are 10 key points about the EU:

1. Execution of Instructions:
EU is the part that performs the actual execution of instructions like ADD, SUB,
MOV, etc.

2. ALU (Arithmetic Logic Unit):

EU contains the ALU, which performs arithmetic and logical operations like
addition, subtraction, AND, OR, etc.

3. Registers:
The Execution Unit works with a set of internal registers like AX, BX, CX, DX (16-
bit), and the flags register (AF, CF, SF, ZF, etc.).

4. Flag Register:
EU updates the status of flags (like Zero, Carry, Sign, Parity, etc.) in the flag
register after each operation, which is crucial for decision-making in conditional
operations.

5. Control Signals:
The EU generates control signals for controlling the execution of instructions,
such as OPCODE decode, and coordinates with BIU to manage memory access.

6. Stack Operations:
EU handles stack operations (push, pop) through the stack pointer (SP) and
base pointer (BP) registers. It manages procedure calls and returns.

7. Direct Data Manipulation:

It directly manipulates data stored in the registers, performing operations as per
the opcode fetched by BIU.

8. Conditional Branching:
The Execution Unit makes decisions based on the status of flags in the Flag
Register, determining whether to branch or jump in the program execution.

9. Addressing Modes:
The EU supports various addressing modes like direct, indirect, register, and
indexed to access operands in memory or registers.

10. Program Control:

EU controls the flow of the program by executing jump, loop, and conditional
instructions that modify the program counter (PC).
Di erence between BIU and EU:
 BIU focuses on communication between the processor and memory or I/O,
while EU focuses on executing the fetched instructions.

 BIU handles memory addressing, instruction fetching, and bus control, while EU
does arithmetic/logical operations and controls the execution flow.

Both units work simultaneously, improving the e iciency and speed of the 8086
microprocessor.

8086 Microprocessor Register Organization

The 8086 microprocessor ka register organization kaafi important hai kyunki yeh
processor ki functionality ko control karta hai. 8086 mein kai tarah ke registers hote hain
jaise General Purpose Registers, Segment Registers, Pointer and Index Registers,
aur Flag Register. Chaliye, in sabko detail mein samajhte hain.

1. Flag Register of 8086 (Bitwise)

Flag Register ek 16-bit ka register hota hai, jo processor ki current state ko indicate
karta hai. Isme flags hote hain jo result of operations jaise arithmetic, logical, aur
control operations ke baare mein batate hain. Yeh flags program control ke liye use hote
hain, jaise jumps or interrupts.

Flag Register ka Bitwise Structure:

| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |

| OF | DF | IF | TF | SF | ZF | 0 | AF | PF | CF | |

Key Points of Flag Register (8086):

1. OF (Overflow Flag) - Bit 15:

Agar arithmetic operation mein overflow hota hai, toh yeh flag set ho jata hai.
Matlab, jab result register ki capacity se zyada ho jata hai.

2. DF (Direction Flag) - Bit 14:

Yeh flag string operations ke liye use hota hai. Agar DF = 0 hai, toh string
operations left to right hote hain. Agar DF = 1 hai, toh right to left hote hain.

3. IF (Interrupt Flag) - Bit 13:

Agar IF = 1, toh interrupts enable ho jate hain, aur agar IF = 0 hai, toh interrupts
disable ho jate hain.

4. TF (Trap Flag) - Bit 12:

Yeh flag processor ko single-step mode mein le aata hai, jo debugging ke liye
useful hai. Matlab, ek instruction ko step-by-step execute karna.

5. SF (Sign Flag) - Bit 11:

Yeh flag result ke sign ko indicate karta hai. Agar result negative hai, toh SF = 1
hoga, aur agar result positive ya zero hai, toh SF = 0 hoga.

6. ZF (Zero Flag) - Bit 10:

Agar operation ka result zero hota hai, toh yeh flag set hota hai (ZF = 1). Agar
result non-zero hai, toh yeh flag cleared ho jata hai (ZF = 0).

2. General Purpose Registers

General Purpose Registers ka use data manipulation, storage, aur temporary results
ke liye hota hai. Yeh 16-bit hote hain, lekin inhe 8-bit bytes mein bhi access kiya ja sakta
hai.

Key Points about General Purpose Registers:

1. AX (Accumulator Register):

o Main register for arithmetic operations. Most arithmetic operations in

the 8086 happen using AX.
 o AL (Low byte) aur AH (High byte) ko individually bhi access kiya ja sakta
hai for 8-bit operations.

2. BX (Base Register):

o Data storage ke liye use hota hai. Yeh register indirect addressing ke liye
bhi use hota hai.

3. CX (Count Register):

o Looping aur string operations ke liye use hota hai. Yeh register
automatic count track karta hai jab loops ya string operations hote hain.

4. DX (Data Register):

o I/O operations ke liye use hota hai. Yeh register AX ke saath

multiplication aur division operations mein use hota hai.

5. 8-bit Sub-Registers:
Har general-purpose register ko 8-bit sub-registers mein divide kiya ja sakta hai
(e.g., AL, AH, BL, BH, etc.), jo byte-level operations ke liye kaafi useful hai.

6. Temporary Storage:
Yeh registers temporary results ko store karte hain, jisse program ke beech mein
data ko e iciently handle kiya ja sakta hai bina memory access kiye.

3. Segment Registers

Segment Registers ka use memory ko segments mein divide karne ke liye hota hai. Iska
fayda yeh hai ki 8086 processor ko 1MB tak ki memory access karne ki ability milti hai by
combining segment address with o set address.

Key Points about Segment Registers:

1. CS (Code Segment Register):

o Code segment ka base address hold karta hai. Isme program code
stored hota hai.

2. DS (Data Segment Register):

o Data segment ka base address hold karta hai. Yaha par variables aur
constants stored hote hain.

3. SS (Stack Segment Register):

o Stack segment ka base address hold karta hai, jo function calls, local
variables, aur interrupts ke liye use hota hai.
 4. ES (Extra Segment Register):

o Extra segment ko hold karta hai, jo string operations ke liye use hota hai.

5. Segment Addressing:
Har segment register ek 16-bit address hold karta hai, jisse o set ke saath
physical address milta hai.

6. Memory Segmentation:
Yeh registers memory ko segments mein divide karte hain, jo 8086 ko zyada
memory e iciently access karne mein madad karte hain.

4. Pointer and Index Registers

Pointer and Index Registers ka use memory ko address karne ke liye hota hai. Yeh
mainly stack operations aur string processing mein kaam aate hain.

Key Points about Pointer and Index Registers:

1. SP (Stack Pointer):

o Stack segment ka o set hold karta hai. Yeh stack ke top ko point karta
hai aur push aur pop operations mein use hota hai.

2. BP (Base Pointer):

o Stack frames ko access karne ke liye use hota hai. Yeh register function
parameters aur local variables ko reference karta hai.

3. SI (Source Index):

o Source index for string operations. Yeh register string instructions mein
source operand ko point karta hai.

4. DI (Destination Index):

o Destination index for string operations. Yeh register destination

operand ko point karta hai.

5. Stack Operations:
SP aur BP ka use function call aur return values ko handle karne ke liye hota hai.

6. String Operations:
SI aur DI registers mainly string manipulations mein use hote hain, jaise data ko
move karna ya compare karna.

Summary Table of 8086 Registers

 Type Register Description
Name

General AX Accumulator, arithmetic operations ke liye use hota

Purpose hai.

BX Base register, indirect memory addressing ke liye.

CX Count register, loop aur string operations ke liye.

DX Data register, I/O operations ke liye.

Segment CS Code Segment, program code ke liye base address

Registers hold karta hai.

DS Data Segment, data variables ke liye base address

hold karta hai.

SS Stack Segment, stack ke operations ke liye.

ES Extra Segment, string operations ke liye base

address.

Pointer & Index SP Stack Pointer, stack segment ka o set hold karta
hai.

BP Base Pointer, stack frames aur function parameters

ke liye use hota hai.

SI Source Index, string operations ke liye source ko

point karta hai.

DI Destination Index, string operations ke liye

destination ko point karta hai.

Flag Register Flags Overflow, Carry, Zero, Sign, Parity, aur baaki flags for
controlling operations.

Yeh 8086 microprocessor ke registers ka organization hai, jo processor ki e iciency

aur functionality ko control karta hai, jisse complex operations ko e iciently handle kiya
ja sake.

Memory Addressing in 8086 with Linear & Segmented

Addressing
Memory Addressing ka matlab hota hai ki microprocessor memory ke kis location se
data ko read/write karega. 8086 microprocessor Segmented Addressing ka use karta
hai, jabki modern processors Linear Addressing ka use karte hain.
1. Linear Addressing (Simple Explanation):

 Definition: Linear addressing mein pura memory ek single continuous block hoti
hai, jisme har byte ka unique address hota hai (jaise flat memory model).

 No Segments: Ismein segmentation nahi hoti. Address = O set directly.

 Simple: Programming ke liye easy hota hai kyunki direct memory location access
hoti hai.

 Modern Processors: Mostly modern CPUs (jaise 32-bit ya 64-bit systems) linear
memory addressing use karte hain.

 Example: Memory address 0050H ka matlab wahi hai — koi segment calculation
nahi hoti.

 Drawback: Memory limit fixed hoti hai unless paging ya virtual memory ka use
ho.

2. Segmented Addressing (Used in 8086):

 Definition: Memory ko alag-alag segments (Code, Data, Stack, Extra) mein

divide kiya jata hai.

 Physical Address: Segment address * 16 + O set = Physical address (20-bit

address banta hai).

 Advantage: Allows 8086 (16-bit processor) to access 1MB memory despite 16-
bit registers.

 Registers Involved: Segment Registers (CS, DS, SS, ES) + O set (like IP, SP, BP,
etc.)

 Example: CS = 2000H, IP = 0010H → Physical Address = 20000H + 0010H =

20010H

 Complexity: Programmer ko segment + o set ko manage karna padta hai, which

adds complexity.

Conclusion:

 Linear Addressing: Easy to understand and program, but limited flexibility in old
architectures.

 Segmented Addressing: Powerful in 8086 for accessing more memory but thoda
complex.
 8086 microprocessor uses Segmented Memory Addressing to overcome 16-bit
register limitation and access up to 1MB of memory.

Advantages (फायदे ):

1. 1 MB Memory Access:

o 8086 ke paas 16-bit address lines hone ke baad bhi, segment+o set
combination se 1 MB memory access kar sakta hai.

2. Modular Program Structure:

o Program, data, aur stack ko alag segments mein rakhne se code modular
aur maintainable hota hai.

3. Memory Reusability:

o Ek hi physical memory ko alag segments ke through access kiya ja sakta

hai — jise overlapping kehte hain.

4. E icient Memory Use:

o Program ke alag parts (functions, arrays, variables) ko di erent segments

mein assign karke memory ko e iciently manage kiya jata hai.

5. Parallel Development:

o Segment-wise code likhne se alag-alag developers simultaneously alag

segments par kaam kar sakte hain.

6. Security & Protection (Limited):

o Di erent segments allow basic separation; a wrong memory access (like

writing to code segment) can be minimized.

Disadvantages (नुकसान):

1. Address Calculation Complex:

o Physical address = Segment × 10H + O set

Yeh calculation programmer ke liye confusing ho sakta hai.

2. Segment Limit = 64KB:

o Har segment sirf 64 KB ka ho sakta hai. Large data ya code ke liye yeh
limit restrictive ho sakti hai.

3. Manual Segment Management:

 o Programmer ko manually segment registers (CS, DS, SS, ES) handle karne
padte hain.

4. Code Portability Di icult:

o Segment-based code dusre flat memory model wale systems par easily
port nahi hota.

5. Overlapping Issues:

o Segment overlapping flexibility ke sath bugs ka bhi risk hota hai agar
segment management sahi na ho.

6. Extra Instruction Overhead:

o Segment change karne ke liye extra instructions lagte hain, jo program ko

slow bana sakta hai.

Concept of Pipelining in 8086 Microprocessor

Pipelining ek technique hai jisse microprocessor instructions ko fast execute karta hai
by overlapping fetch aur execute stages. 8086 microprocessor mein 2-stage pipelining
ka use hota hai — ek stage instruction fetch karta hai (BIU), aur doosra stage instruction
execute karta hai (EU).

Pipelining in 8086 – Key Points in Hinglish:

1. Two Independent Units:

o 8086 mein do major units hote hain:

1. Bus Interface Unit (BIU)

2. Execution Unit (EU)

2. BIU ka Kaam – Instruction Fetch:

o BIU continuously memory se instructions fetch karta rehta hai aur unhe 6-
byte instruction queue mein store karta hai.

3. EU ka Kaam – Instruction Execution:

o EU queue se instructions ko leta hai aur execute karta hai without waiting
for fetching.

4. Parallel Operation:
 o Jab EU ek instruction execute karta hai, tab BIU simultaneously agla
instruction fetch karta hai.

o Yeh hi pipelining hai — overlap between fetch and execute.

5. Instruction Queue:

o 8086 mein ek 6-byte queue hoti hai jisme instructions temporarily store
hote hain.

o Isse CPU ke idle time kam ho jaate hain.

6. Faster Execution:

o Pipelining ki wajah se har instruction ke execution mein lagne wala

average time kam ho jata hai. Isse throughput badhta hai.

7. Improves CPU E iciency:

o Instructions back-to-back execute hote hain bina fetch delay ke. Isse
processor ki e iciency increase hoti hai.

8. Flush Queue on Jump/Branch:

o Agar koi branch, jump, call ya interrupt aata hai, toh queue ko clear
(flush) karna padta hai kyunki naye address se instructions fetch karne
hote hain.

9. No True Parallelism:

o 8086 pipelining mein real multi-instruction execution ek saath nahi hota,

but overlapping hota hai — isse instruction-level parallelism kehte hain.

10. Limitation:

 Queue overflow, branch instructions, aur interrupt ke time pe pipelining

ine icient ho sakti hai. Fir bhi, 8086 ke liye yeh ek e icient design tha uske
samay mein.

Conclusion:

8086 microprocessor ka pipelining mechanism performance ko significantly improve

karta hai by overlapping fetch and execute phases. Yeh technique later processors ke
liye foundation bana.

Interrupt Kya Hota Hai?

Interrupt ek signal ya request hoti hai jo microprocessor ko batata hai ki:

"Jo kaam abhi kar rahe ho, use turant roko, pehle ek urgent task complete karo, fir
wapas apna kaam continue karo."

Ye CPU ka attention divert karta hai towards more important or time-critical task.

Jaise mobile use karte waqt ek call aaye — aap turant kaam rokte ho, baat karte ho
(interrupt service routine), aur fir wapas kaam par laut jaate ho.
Same concept CPU ke saath hota hai.

Why Are Interrupts Important in Microprocessors?

1. CPU ke time ko e iciently use karne ke liye.

2. Real-time hardware devices jaise keyboards, mouse, timers, printers ko handle

karne ke liye.

3. Errors ya exceptional conditions (overflow, divide by zero, etc.) handle karne ke

liye.

4. Multitasking possible banata hai.

How Interrupt Works in 8086 Microprocessor

Jab 8086 microprocessor apna normal kaam kar raha hota hai, tabhi koi important
signal aata hai — jaise keyboard se key press hua, ya koi error jaise divide by zero hua.
Is signal ko interrupt kehte hain.

Ab microprocessor pehle apna current instruction poora karta hai, uske baad hi
interrupt ko accept karta hai.

Jaise hi interrupt accept hota hai, processor sabse pehle apni flags (status) ko stack
mein store karta hai — taaki baad mein wapas se wahi condition mil sake.

Uske baad, processor ka jo program chal raha tha uska address (CS aur IP) bhi stack
mein save karta hai. Matlab — "main yahan tak kaam kar chuka hoon".

Phir processor ek special memory location se dekhta hai ki Interrupt Service Routine
(ISR) kahan stored hai. Ye location usse batati hai ki ab usse kya kaam karna hai — jaise
key read karni hai ya error handle karna hai.

Processor ab ISR ko execute karta hai. Ye chhota sa program hota hai jo interrupt ke
according response deta hai.

Jab ye ISR apna kaam complete kar leta hai, toh ek instruction hota hai IRET — iska
matlab hota hai “interrupt return”.
IRET use karke processor stack se wapas CS, IP aur FLAGS uthata hai, taaki wapas
wahi kaam continue kar sake jahan pehle chod diya tha.

Is tarah se interrupt aata hai, handle hota hai, aur CPU fir se normal kaam pe laut aata
hai — bina kuch bhule.

Ye process ek pause and resume ki tarah hai — jaise koi kaam karte waqt phone aaya,
baat ki, aur wapas wahi kaam continue kiya. Simple!

1. Hardware Interrupts:
 Hardware interrupts external hardware devices se generate hote hain.

 Ye interrupts processor ke normal execution ko interrupt karte hain jab koi

external device CPU ke attention ko zaroori samajhta hai (jaise keyboard press ya
timer overflow).

 Types of hardware interrupts:

o INTR (Interrupt Request): Maskable interrupt hai, jo kisi bhi external

device se aata hai. CPU ko interrupt signal bhejne ke liye device ko enable
karna padta hai.

o INTA (Interrupt Acknowledge): Ye signal 8086 ko inform karta hai ki

interrupt acknowledge ho gaya hai.

2. Divide by Zero Interrupt (Interrupt 0):

 Jab 8086 me kisi division operation me denominator zero ho, tab Divide by Zero
Interrupt occur hota hai.

 Ye ek special type ka interrupt hai jo error conditions ko handle karta hai.

 Agar division operation me zero ki value aayi, to CPU automatically interrupt

generate karega, jisse program execution control ko handle kar sake.

Single Step Interrupt (Interrupt 1)

1. Definition: Single Step Interrupt (INT 1) ek software interrupt hai jo debugging ke

liye use hota hai.

2. Purpose: Iska primary purpose debugging me hota hai, jahan aap apne program
ko ek ek instruction ke step-by-step run karne ke liye pause karte ho.

3. Usage: Jab aap apne program ke har instruction ko check karna chahte hain, to
aap Single Step Interrupt ka use karte hain.
 4. Trigger Mechanism: Ye interrupt CPU ke dwara trigger hota hai, jab INT 1
instruction program me execute hota hai.

5. Debugger Tools: Ye interrupt debuggers (jaise GDB) ke saath use hota hai, jahan
har instruction execute hone par CPU pause ho jata hai.

6. Execution Control: Jab INT 1 hota hai, CPU instruction ko execute karke
execution ko stop kar deta hai, taaki aap state ko inspect kar sakein.

7. Instruction Inspection: Ye debugging me madad karta hai, jaise variables ki

values, registers, aur memory ko inspect karna.

8. Step Execution: Aap manually next instruction execute kar sakte hain jab aap
ready ho.

9. Improved Debugging: Yeh developers ko ek ek step dekh kar program me bugs

ko trace karne me madad karta hai.

10. Interrupt Handler: INT 1 ke trigger hone par ek interrupt handler execute hota
hai, jo program execution ko control karta hai.

Software Interrupts (e.g., Interrupt 21H in DOS)

1. Definition: Software interrupts wo interrupts hote hain jo CPU ke dwara

programmatically generate kiye jaate hain.

2. Mechanism: Ye interrupts INT instruction ke through trigger kiye jaate hain.

3. Purpose: Software interrupts ka main purpose system-level functions ko call

karna hota hai, jaise file operations, memory management, etc.

4. Example (INT 21H): INT 21H ek software interrupt hai jo DOS operating system
ke functions ko call karta hai, jaise keyboard input, file operations, etc.

5. Control Flow: Jab INT instruction execute hota hai, CPU interrupt vector table
me defined address pe jump karta hai, jahan system call handler hota hai.

6. System Calls: Ye system calls ko handle karta hai, jaise DOS functions,
input/output operations, file handling, etc.

7. Usage in DOS: Example ke liye, agar aapko ek character ko output karna hai, to
INT 21H ko function code ke sath call kiya jata hai.

8. Interrupt Vector Table: Har software interrupt ka ek fixed location hota hai
interrupt vector table me, jahan se CPU control ko transfer karta hai.

9. Maskable: Software interrupts maskable hote hain, jise enable/disable kiya ja

sakta hai.
 10. Common Use: Ye interrupts system services ke liye use hote hain, jaise file
open/close, screen display, keyboard input, etc.

Key Di erences Between Single Step Interrupt and Software Interrupts:

 Single Step Interrupt (INT 1) debugging ke liye use hota hai, jabki software
interrupts system-level functions ko trigger karte hain.

 Single Step Interrupt ko program ke har instruction ke baad execute karte hain,
jabki software interrupts ko system services ke liye manually call kiya jata hai.

 Single Step Interrupt debuggers ke saath specific hota hai, jabki software
interrupts operating system functions ya hardware communication ke liye use
hote hain.

In summary, Single Step Interrupt debugging tools ko facilitate karta hai, jabki
Software Interrupts program ko system calls aur hardware services se interact karne ki
facility dete hain.

5. Non-Maskable Interrupts (NMI):

 Non-Maskable Interrupt (NMI) ek special type ka interrupt hai jo mask nahi kiya
ja sakta.

 Ye interrupts critical errors ko handle karte hain, jaise hardware failures ya power
failure.

 NMI ko interrupt vector table me reserved address milta hai, aur CPU isse ignore
nahi kar sakta, chahe interrupt flag set ho ya nahi.

6. Maskable Interrupts:

 Maskable Interrupts wo interrupts hote hain jinhe mask (disable) kiya ja sakta
hai.

 Jab CPU me interrupts enable karte hain, to maskable interrupts ko interrupt flag
ke through disable ya enable kiya ja sakta hai.

 INTR is maskable interrupt ka example hai. Agar CPU me interrupt flag clear ho,
to CPU is interrupt ko ignore kar sakta hai.

8086 Instruction Format – Introduction

1. 8086 ka instruction ek specific structure follow karta hai jise instruction format
kehte hain.
 2. Har instruction multiple parts (fields) mein divided hoti hai – jaise ki opcode,
register info, memory info, displacement, immediate data, etc.

3. Yeh format processor ko batata hai ki kaunsa operation karna hai aur kahan se
data lena hai ya bhejna hai.

4. Instruction ka size variable hota hai – 1 byte se leke 6 bytes tak.

5. Complex instructions ke liye zyada fields aur bytes use hote hain.

Thank you! As you requested, yeh raha minimum 8–8 points har section ke liye —
instruction types and special bits — sab kuch Hinglish mein and point-wise.

A. Types of Instructions in 8086

1. One-Byte Instruction

1. Sirf ek byte hota hai instruction mein.

2. Opcode ke alawa koi operand ya extra data nahi hota.

3. Simple processor control ya flag control operations ke liye hota hai.

4. Execution fast hoti hai kyunki instruction chhota hota hai.

5. Instruction fetch stage mein hi pura instruction aajata hai.

6. Koi MOD-REG-R/M field nahi hoti ismein.

7. No memory access or displacement involved.

8. Mostly processor ke internal state par e ect hota hai.

2. Register to Register Instruction

1. Dono operands registers hote hain.

2. MOD field ka value 11 hota hai (binary mein).

3. Fastest data transfer ya operation perform karta hai.

4. Sirf CPU ke andar kaam hota hai – no memory access.

5. Opcode ke baad REG aur R/M fields use ki jaati hain.

6. Koi displacement ya o set nahi hota.

7. E ective address calculation ki zarurat nahi hoti.

8. Instruction length usually 2 bytes hoti hai.

3. Register to/From Memory (No Displacement)

1. Ek operand register hota hai, dusra memory location.

2. MOD field ka value 00 hota hai (no displacement).

3. E ective address register combination se banta hai.

4. Memory address fixed nahi hota, register se indirect hota hai.

5. BIU memory operand ko access karta hai.

6. Instruction execution thoda slow hota hai memory access ke wajah se.

7. Displacement field ki zarurat nahi hoti.

8. Instruction size 2 ya 3 bytes ho sakti hai.

4. Register to/From Memory (With Displacement)

1. Operand memory location se hota hai with displacement.

2. MOD field 01 (8-bit displacement) ya 10 (16-bit displacement) hota hai.

3. Memory address = Base register + displacement.

4. O set ya address modify karne ke liye displacement diya jaata hai.

5. Used for accessing array, table, structure, etc.

6. Execution mein extra memory read/write involve hoti hai.

7. Instruction size zyada hoti hai due to displacement bytes.

8. Instruction ke andar displacement field clearly mention hoti hai.

5. Immediate Operand to Register

1. Operand directly instruction ke andar diya jaata hai.

2. Register ko koi fixed value assign ki jaati hai.

3. Opcode ke saath register ka code combine hota hai.

4. W aur S bits yahan important role play karti hain.

 5. Execution fast hoti hai kyunki value already instruction mein hoti hai.

6. Memory access ki zarurat nahi padti.

7. Instruction length fixed nahi hoti — operand ke size par depend karta hai.

8. Mostly initialization ke liye use hota hai.

B. Special Bits in 8086 Instruction Format

(Har bit ke 8–8 point)

1. W Bit (Word/Byte Bit)

1. Batata hai ki operation 8-bit ka hai ya 16-bit ka.

2. W = 0 → Byte (8-bit), W = 1 → Word (16-bit).

3. Register ya memory operand ka size control karta hai.

4. Instruction size par bhi impact karta hai.

5. Opcode ke part ke roop mein hota hai.

6. Mostly arithmetic, logic aur data transfer instructions mein use hota hai.

7. Processor W bit ke according internal data path activate karta hai.

8. W bit ka incorrect use wrong result produce kar sakta hai.

2. D Bit (Direction Bit)

1. Data flow ka direction batata hai.

2. D = 0 → REG field is source, D = 1 → REG field is destination.

3. Sirf register-memory ya memory-register instructions mein relevant hota hai.

4. Opcode ke baad REG aur R/M ke role D bit ke through define hote hain.

5. Bidirectional instructions ke liye zaroori hota hai.

6. Reverse direction ke liye bas D bit ko flip karte hain.

7. Memory access control is bit ke through indirectly hota hai.

8. Galat D bit data ko ulta copy kar sakti hai.

3. S Bit (Sign Extension Bit)

1. Jab immediate operand diya ho aur W = 1 ho, tab S bit use hoti hai.

2. S = 1 → 8-bit immediate ko sign-extend karke 16-bit banaata hai.

3. S = 0 → Full 16-bit immediate operand diya hota hai.

4. Instruction size ko optimize karne ke liye use hota hai.

5. Negative numbers ke liye sign extension zaroori hota hai.

6. Mainly data transfer aur arithmetic instructions mein use hota hai.

7. Performance aur memory e iciency dono par e ect padta hai.

8. S bit ka use only immediate operands ke case mein hota hai.

4. V Bit (Variable Shift Count Bit)

1. Shift ya rotate instructions mein use hota hai.

2. V = 0 → Operation fixed 1 bit tak hota hai.

3. V = 1 → Operation CL register ke value ke according hota hai.

4. Zyada flexible shift operation possible hota hai isse.

5. V bit se controlled shifting e icient hoti hai.

6. Useful in loop-based bit manipulations.

7. Instruction size par koi major e ect nahi padta.

8. CL register ka content dynamic shift control karta hai.

5. Z Bit (Zero Flag Control Bit for Repeat)

1. String instructions (REP, REPE, REPNE) ke saath use hota hai.

2. Z bit execution ke repetition condition decide karta hai.

3. Z = 1 → Repeat till Zero Flag is 1.

4. Z = 0 → Repeat till Zero Flag is 0.

5. Compare or scan operations ke liye use hota hai.

6. E icient looping ke liye control mechanism deta hai.

7. Memory string operations mein performance improve karta hai.

 8. Loop terminate hone ki condition Z bit + Zero Flag se banayi jaati hai.

Bilkul! Neeche main 8086 microprocessor ke Addressing Modes ko Hinglish mein

point-wise aur heading ke saath explain kar raha hoon — jaise aapne kaha:

Addressing Modes in 8086 Microprocessor

8086 microprocessor mein addressing mode decide karta hai ki operand (data) kahan
se fetch hoga ya kahan store hoga — memory se ya register se.

Har instruction kisi na kisi addressing mode ka use karti hai data ko access karne ke
liye.

1. Immediate Addressing Mode

1. Operand directly instruction ke andar diya hota hai.

2. Data processor ke andar instruction ke saath hi aata hai.

3. Koi memory ya register read nahi kiya jaata operand ke liye.

4. Instruction ka size zyada ho sakta hai kyunki operand included hota hai.

5. Mostly initialization ya constant value dene ke liye use hota hai.

6. Fast execution hoti hai — koi memory read/write nahi.

7. Opcode ke saath direct data attach hota hai.

8. W aur S bits ka kaafi important role hota hai is mode mein.

2. Register Addressing Mode

1. Operand CPU ke kisi register mein hota hai.

2. Instruction REG field ke through register specify karta hai.

3. MOD field ka value 11 hota hai (register-to-register).

4. Memory access nahi hoti, sirf CPU ke andar ka kaam hota hai.

5. Execution bahut fast hoti hai.

6. Instruction size usually 2 bytes hoti hai.

7. Data transfer ya ALU operations ke liye mostly use hota hai.

8. Register ka naam instruction ke format se pata chalta hai.

3. Direct Addressing Mode

1. Memory location ka exact address instruction mein diya hota hai.

2. Operand memory ke us specific address par store hota hai.

3. Displacement field 16-bit ka hota hai jo memory location define karta hai.

4. Instruction CPU ko exact address batata hai jahan se data lena ya bhejna hai.

5. Memory access time thoda zyada lagta hai.

6. E ective address calculation simple hoti hai.

7. CS:IP ya DS:o set ke through memory access hota hai.

8. Used for accessing fixed memory location.

4. Register Indirect Addressing Mode

1. Memory address kisi register (like BX, SI, DI, BP) ke andar hota hai.

2. Instruction mein memory address directly nahi diya hota.

3. MOD field 00 hoti hai, R/M field se register ka pata chalta hai.

4. Operand indirect memory se accessed hota hai via register.

5. E ective address = content of register.

6. Memory access dynamic hota hai (as register value change hoti hai).

7. Zyada flexible addressing ke liye use hota hai.

8. Mostly loop ya array data ko access karne mein helpful.

5. Based Addressing Mode

1. Operand ka memory address base register (BX ya BP) ke through define hota hai.

2. E ective address = content of base register.

3. BP use hota hai stack ke liye, BX data ke liye.

4. MOD = 00, 01 ya 10 ho sakta hai depending on displacement.

5. Memory ke structured access ke liye useful hai.

6. Stack frame ya parameter passing ke liye BP commonly use hota hai.

7. Memory address register ke value se indirectly milta hai.

8. Displacement optional hota hai.

6. Indexed Addressing Mode

1. Operand ka address index register (SI ya DI) ke through hota hai.

2. E ective address = content of index register.

3. Mostly string ya array operations ke liye use hota hai.

4. MOD field + R/M field se pata chalta hai register kaun sa hai.

5. Displacement use kiya ja sakta hai for o setting.

6. SI (Source Index) and DI (Destination Index) ka role specific hota hai.

7. Dynamic memory access enable karta hai.

8. E icient array processing ke liye ideal hai.

7. Based-Indexed Addressing Mode

1. E ective address = base register (BX/BP) + index register (SI/DI).

2. Dono register values add karke memory location calculate hota hai.

3. MOD field = 00 hoti hai agar displacement nahi hai.

4. Data structures jahan row-column type access ho uske liye useful hai.

5. BP ke saath hamesha SS segment use hota hai.

6. BX ke saath DS segment default hota hai.

7. Memory address dynamically generate hota hai.

8. Instruction flexible but thodi complex hoti hai.

8. Based-Indexed with Displacement Addressing Mode

1. E ective address = base register + index register + displacement.

2. MOD field = 01 (8-bit displacement) ya 10 (16-bit displacement).

3. Most powerful and flexible addressing mode hai.

4. Structured data access, multi-dimensional arrays ke liye perfect hai.

5. Displacement field instruction mein hoti hai (1 ya 2 bytes).

6. Used for accessing data in nested structures.

7. Execution thoda slow ho sakta hai due to address calculation.

8. Memory ka dynamic aur relative access allow karta hai.

Introduction: Data Transfer Instructions – 8086

1. Data transfer instructions ka kaam hota hai data ko ek jagah se doosri jagah
transfer karna.

2. Ye instructions registers, memory aur I/O ports ke beech data movement allow
karte hain.

3. Data transfer ke time par original data destroy nahi hota, sirf copy hoti hai.

4. Inka use mostly initialization, backup, restore ya I/O communication ke liye hota
hai.

5. Data transfer ke time operand size (byte/word) ka match hona zaroori hota hai.

1. MOV (Move)

1. Data ko ek register ya memory se doosri register ya memory mein move karta hai.

2. Source operand ka data destination mein copy hota hai.

3. Operand size same hona chahiye.

4. Flags par koi e ect nahi hota.

5. Immediate, direct, register, ya memory addressing modes support karta hai.

2. PUSH

1. Data ko stack mein push karta hai (store karta hai).

2. Stack pointer (SP) 2 se decrement hota hai.

3. Only register ya memory ka data push kiya ja sakta hai.

4. BP, SP, segment registers bhi push ho sakte hain.

5. Flags a ect nahi hote.

3. POP

1. Stack se data ko nikaal ke register/memory mein daalta hai.

2. Stack pointer (SP) 2 se increment hota hai.

3. Stack ke top ka data destination mein chala jaata hai.

4. Stack mein jo last push hua tha, wahi pehle pop hota hai (LIFO).

5. Flags par koi e ect nahi.

4. PUSHA (Push All Registers)

1. Sabhi general-purpose registers ko stack mein push karta hai.

2. Order: AX, CX, DX, BX, SP, BP, SI, DI.

3. SP ka original value bhi push hota hai.

4. Instruction size fixed hoti hai.

5. Mostly subroutine entry pe use hota hai.

5. POPA (Pop All Registers)

1. Stack se sabhi general-purpose registers ko restore karta hai.

2. Order: DI, SI, BP, skip SP, BX, DX, CX, AX.

3. SP restore nahi hota (skip hota hai).

4. Subroutine ke end mein use hota hai.

5. Instruction size fixed hoti hai.

6. XCHG (Exchange)

1. Do operands ke beech data exchange karta hai.

2. Operand same size ke hone chahiye.

3. Memory ke saath exchange possible hai, par dono memory operands nahi ho
sakte.

4. Flags a ect nahi hote.

5. Useful in sorting, swapping operations.

7. XLAT (Translate Byte)

1. AL register ke content ko use karke memory table se value fetch karta hai.

2. BX register base address provide karta hai.

3. E ective address = BX + AL.

4. Result phir se AL mein store hota hai.

5. Mostly table lookup ke liye use hota hai.

8. IN (Input from Port)

1. I/O port se data input karta hai accumulator mein.

2. Port number fixed ho sakta hai (immediate) ya DX register mein ho sakta hai.

3. AL (for 8-bit) ya AX (for 16-bit) mein data aata hai.

4. Only IN instruction memory ko access nahi karta.

5. Used for reading data from external devices.

9. OUT (Output to Port)

1. Accumulator ka data kisi I/O port pe bhejta hai.

2. Port number immediate ho sakta hai ya DX mein.

3. AL/AX ka content port par chala jaata hai.

4. External hardware se communication ke liye use hota hai.

5. Memory involved nahi hoti.

10. LEA (Load E ective Address)

1. Kisi memory operand ka e ective address kisi register mein load karta hai.
2. Data nahi, sirf address transfer hota hai.

3. Mostly pointer initialization ke liye use hota hai.

4. Flags a ect nahi hote.

5. Register ke through address calculation hota hai.

11. LDS (Load Pointer using DS)

1. Memory se 32-bit pointer (o set + segment) ko load karta hai.

2. O set kisi register mein, aur segment DS register mein load hota hai.

3. Instruction size fixed hoti hai.

4. Useful in pointer-based memory access.

5. Memory operand 4 bytes ka hona chahiye.

12. LES (Load Pointer using ES)

1. LDS jaise hi hota hai, par segment part ES register mein load hota hai.

2. E ective address + extra segment ka pointer banaata hai.

3. Mostly string ya external memory access ke liye use hota hai.

4. Memory operand 4 bytes ka hona chahiye.

5. O set kisi general-purpose register mein jaata hai.

13. LAHF (Load AH with Flags)

1. Flag register ke high byte ko AH register mein copy karta hai.

2. Flags: SF, ZF, AF, PF, CF — inka status AH mein chala jaata hai.

3. Mostly flag testing ke liye use hota hai.

4. Instruction short aur fast hoti hai.

5. Lower flags ko access karne mein helpful hai.

14. SAHF (Store AH into Flags)

1. AH register ke content ko flag register ke lower byte mein copy karta hai.
2. Same 5 flags (SF, ZF, AF, PF, CF) update hote hain.

3. Reverse of LAHF hai.

4. Flag restoration ke liye use hota hai.

5. AH ki value flag ke status set karti hai.

15. PUSHF (Push Flags)

1. Entire flag register ko stack mein push karta hai.

2. SP register 2 se decrement hota hai.

3. Used before critical section or interrupt.

4. Program ke flow ke state ko preserve karta hai.

5. POPF se flags restore kiye ja sakte hain.

16. POPF (Pop Flags)

1. Stack se flags pop karke flag register mein restore karta hai.

2. SP register 2 se increment hota hai.

3. Interrupts aur branching ke baad flag status restore karta hai.

4. LAHF/SAHF ke mukable poora flag register handle karta hai.

5. Instruction ke baad flags ka exact previous state mil jaata hai.

Introduction: Arithmetic Instructions – 8086

1. Arithmetic instructions ka kaam hota hai mathematical operations perform
karna jaise addition, subtraction, increment, decrement, etc.

2. Ye instructions registers ya memory operands ke saath kaam karte hain.

3. Operands ka size same hona chahiye (byte ya word).

4. In instructions ka e ect mostly flags register par hota hai.

5. Multiplication aur division instructions ke liye accumulator ka use hota hai (AL,
AX).
1. ADD (Add)

1. Do operands ka addition karta hai (register, memory, immediate).

2. Result destination operand mein store hota hai.

3. All arithmetic flags (CF, ZF, SF, OF, AF, PF) update hote hain.

4. Operand size byte ya word ho sakta hai.

5. Memory-to-memory addition allowed nahi hota.

2. ADC (Add with Carry)

1. ADD ke jaise hi hota hai, par isme carry flag bhi include hota hai.

2. Multi-byte addition ke liye use hota hai.

3. Carry flag ka value bhi add kiya jaata hai.

4. Flags register update hota hai.

5. Useful in large number (16/32-bit) calculations.

3. INC (Increment)

1. Operand ko 1 se increase karta hai.

2. Operand memory ya register ho sakta hai.

3. Carry flag (CF) a ect nahi hota.

4. Baaki arithmetic flags update hote hain.

5. Mostly counter ke liye use hota hai.

4. AAA (ASCII Adjust after Addition)

1. BCD (Binary Coded Decimal) addition ke baad AL register ko adjust karta hai.

2. Only AL register par kaam karta hai.

3. Auxiliary Carry (AF) aur Carry Flag (CF) ko set/reset karta hai.

4. Result AL ke lower nibble mein valid BCD deta hai.

5. Sirf decimal arithmetic ke liye use hota hai.

5. DAA (Decimal Adjust after Addition)

1. Normal addition ke baad result ko valid BCD banata hai.

2. AL register ke content adjust karta hai.

3. AF aur CF flags par e ect hota hai.

4. ASCII operation ke bina bhi BCD result milta hai.

5. Decimal calculations ke liye helpful hai.

6. SUB (Subtract)

1. Do operands ka subtraction karta hai.

2. Result destination operand mein store hota hai.

3. All arithmetic flags a ect hote hain.

4. Memory-to-memory subtraction allowed nahi.

5. Operand same size ke hone chahiye.

7. SBB (Subtract with Borrow)

1. SUB instruction ke jaisa hai par carry (borrow) bhi subtract karta hai.

2. Large size data subtraction ke liye use hota hai.

3. CF flag ka value bhi include hota hai.

4. Multi-byte subtraction me useful hai.

5. Flags ka update hota hai.

8. DEC (Decrement)

1. Operand ka value 1 se decrease karta hai.

2. CF flag una ected rehta hai.

3. ZF, SF, OF, AF, PF flags a ect hote hain.

4. Mostly loop counter ke liye use hota hai.

5. Register ya memory operand par apply hota hai.

9. NEG (Negate)

1. Operand ka 2’s complement nikalta hai (i.e., sign change).

2. Result destination mein hi store hota hai.

3. All arithmetic flags a ect hote hain.

4. Operand ka sign flip hota hai (+ve to -ve or vice versa).

5. Useful in subtraction logic.

10. CMP (Compare)

1. SUB jaisa operation perform karta hai par result discard karta hai.

2. Sirf flags ko set karta hai comparison ke basis par.

3. Operands ka value equal, less ya greater hone ka pata chalta hai.

4. ZF, SF, CF, OF flags use hote hain.

5. Conditional jumps ke liye commonly use hota hai.

11. AAS (ASCII Adjust after Subtraction)

1. ASCII subtraction ke baad AL register ko adjust karta hai valid BCD banane ke
liye.

2. AL ka lower nibble valid BCD ban jaata hai.

3. CF aur AF flags set/reset hote hain.

4. Sirf AL register ke liye kaam karta hai.

5. ASCII coded subtraction mein use hota hai.

12. DAS (Decimal Adjust after Subtraction)

1. SUB ke baad result ko valid BCD mein convert karta hai.

2. AL register ke value ko adjust karta hai.

3. Auxiliary Carry aur Carry Flag par e ect hota hai.

4. Decimal arithmetic ke liye useful hai.

5. AL ke value ko valid BCD banata hai.

13. AAM (ASCII Adjust after Multiplication)

1. Multiplication ke baad AL register ko adjust karta hai.

2. AL ko 2 nibbles mein convert karta hai: AH = high nibble, AL = low nibble.

3. Base 10 ke hisaab se adjust karta hai (default base = 10).

4. Decimal multiplication ke baad use hota hai.

5. Flags par partial e ect hota hai.

14. CBW (Convert Byte to Word)

1. AL register ke sign bit ko AH mein extend karta hai.

2. AL ko sign-extended 16-bit number bana deta hai AX ke form mein.

3. Useful in signed arithmetic (signed division).

4. Sign extension operation karta hai.

5. Flags par koi e ect nahi hota.

15. CWD (Convert Word to Double Word)

1. AX register ka sign bit DX mein extend karta hai.

2. AX ko 32-bit signed number bana deta hai (DX:AX).

3. Signed division/multiplication mein useful hai.

4. Sign extension ka kaam karta hai.

5. Flags update nahi hote.

Multiplication & Division Instructions (Unsigned/Signed)

16. MUL (Multiply – Unsigned)

1. Unsigned multiplication perform karta hai.

2. Operand ko AL/AX ke saath multiply karta hai.

3. Result AX (8-bit × 8-bit) ya DX:AX (16-bit × 16-bit) mein hota hai.

4. OF and CF flags set hote hain agar result higher part non-zero ho.

5. Operand implicit hota hai (AL/AX use hota hai).

17. IMUL (Multiply – Signed)

1. Signed multiplication perform karta hai.

2. Sign ka bhi dhyan rakhta hai during result calculation.

3. Result AX (byte) ya DX:AX (word) mein hota hai.

4. OF and CF flags result overflow par set hote hain.

5. Same implicit register use hota hai jaise MUL.

18. DIV (Divide – Unsigned)

1. Unsigned division perform karta hai.

2. Dividend AL/AX/DX:AX mein hota hai depending on size.

3. Result quotient AL/AX mein, remainder AH/DX mein store hota hai.

4. Divide by zero error se system halt ho sakta hai.

5. Operand implicit hota hai.

19. IDIV (Divide – Signed)

1. Signed division perform karta hai.

2. Dividend signed hoke AX ya DX:AX mein hota hai.

3. Result: Quotient AL/AX mein, Remainder AH/DX mein.

4. Divide by zero ya overflow se interrupt ho sakta hai.

5. Operand signed hone ki wajah se sign extension zaroori hota hai (CBW/CWD).

Introduction: Branch Instructions – 8086

 1. Branch instructions ka kaam hota hai program flow ko control karna.

2. Ye instructions program execution ko kisi specific address pe jump karne ko

bolte hain.

3. Branching do types ki hoti hai: Unconditional aur Conditional.

4. Mostly ye instructions looping, decision making ya subroutine call/return ke liye

use hote hain.

5. Flags (like ZF, CF, SF, OF) ka use conditional branching mein hota hai.

1. Unconditional Branching (Nirnay-Rahit Branching)

Ye branching bina kisi shart ke hoti hai. Program ka flow direct kisi doosre address ya
part pe chala jaata hai.

Key Concepts:

1. Program ka control ek naye location par seedha transfer ho jaata hai.

2. Koi bhi condition ya flags check nahi kiye jaate.

3. Mostly use kiya jaata hai subroutine call karne ke liye, ya ek fixed address pe
jump karne ke liye.

4. Is type ki branching loop banana ya repeated operations ke liye kaafi useful hoti
hai.

5. Software interrupt ya return ka kaam bhi isi type mein aata hai.

Examples (Concept Based):

 Agar program ek START naam ke section pe jump kare bina kisi condition ke.

 Ek chhoti routine PRINT_MESSAGE ko call karke firse wapas aaye.

 Jab system kisi DOS service ko call karta hai, to uska use bhi unconditional hota
hai.

 Jab subroutine se wapas aana hota hai, bina condition ke.

 Jab kisi interrupt ke baad normal execution wapas start hota hai.

2. Conditional Branching (Shart-Rahit Branching)

Ye branching tab hoti hai jab koi specific condition ya flags ka status match karta hai.
Agar condition true hai to jump hota hai, warna agla instruction continue hota hai.

Key Concepts:

1. Isme flags register ka status (jaise Zero, Carry, Sign, Overflow) check kiya jaata
hai.

2. Decision making aur branching data ke comparison ke base par hoti hai.

3. Program sirf tabhi naye location pe jump karta hai jab condition satisfy ho.

4. Ye branching loops, conditions aur error checking ke liye use hoti hai.

5. Har condition ka apna specific flag hota hai (jaise equal hone pe zero flag,
negative hone pe sign flag).

Examples (Concept Based):

 Jab do numbers barabar ho, to program kisi label pe jump kare.

 Agar kisi subtraction ka result zero nahi ho, to next set of instructions execute
kare.

 Jab carry produce ho, to program ek alternate path follow kare.

 Agar result negative aaye, to kisi doosre section pe jump kare.

 Jab overflow condition ho, tab jump karke error handle kare.

 Agar ek number doosre se bada ho (unsigned), to ek alag path execute ho.

 Agar signed value choti ho, to control flow kisi lower path pe chala jaaye.

Summary in Simple Words (Without Commands)

Branch Type Description Based Example Thought

On

Unconditional Direct jump without None Jump to START point

Branch checking any condition unconditionally

Used to call or return Call PRINT routine, then

from subroutines return

Used in system Call a system service

interrupts
 Conditional Jump based on result of Flags If result is zero, jump to
Branch previous operations status EQUAL section

Uses conditions like ZF, CF, If result is negative, go to

zero, carry, sign, SF, OF ERROR_HANDLER
overflow

UNIT 04
Function of Program Structure in Microprocessor
Program structure ka main function instructions ko logically organize karna hota hai,
taaki microprocessor e iciently kaam kare. Isme initialization, data handling,
processing, control flow, aur resource management ka important role hota hai.
Yahan har function ko 5 key points me explain kar rahe hain:

Here are the functions of program structure related to Initialization, Data Handling,
Processing, Control Flow, and Resource Management, explained in Hinglish:

Initialization
1. Memory segments (data, code, stack) ko setup karta hai, jisse program sahi se
execute ho sake.

2. Stack pointer ko initialize karta hai taaki stack operations (push/pop) properly ho
sake.

3. Registers ko clear ya initialize karta hai taaki koi unwanted data na ho.

4. System flags aur interrupts ko configure karta hai, jisse smooth execution ho
sake.

5. Variables aur constants ke liye memory allocate karta hai, taaki wo program me
use ho sake.
Data Handling
1. Data ko appropriate memory segments (data segment) me store karta hai taaki
easy access ho sake.

2. External devices se input (jaise keyboard ya sensors) ko handle karke store karta
hai.

3. External devices (jaise display ya printer) me data output karta hai.

4. Data pe operations (jaise arithmetic ya logical) perform karta hai, calculation ke

liye.

5. Data ko sahi format aur location me store/retrieve karke integrity ensure karta
hai.

Processing
1. Arithmetic operations (add, subtract, multiply, divide) perform karta hai data pe
as required.

2. Logical operations (AND, OR, NOT) execute karta hai, taaki conditions ko
evaluate kiya ja sake.

3. Comparisons karta hai values ke beech, jisse program flow ya actions decide ho
sake.

4. Subroutines ko call karta hai specific tasks perform karne ke liye aur complex
problems ko break karta hai.

5. Operations ke result ke basis par flags (jaise zero ya carry flags) update karta hai.

Control Flow
1. Program ke execution path ko conditions ke basis pe control karta hai
(conditional branching).

2. Loops use karta hai taaki kuch instructions ko repeatedly execute kiya ja sake jab
tak condition true ho.

3. Subroutines ko call aur return karta hai, taaki tasks modular ho aur code reuse
ho sake.

4. Interrupts ko handle karta hai, jisse current flow temporarily suspend ho jaata
hai jab high-priority tasks aate hain.
 5. Program termination ko manage karta hai, jisse execution end ho jaata hai aur
control operating system ko return ho jaata hai.

Resource Management
1. Memory ko e iciently allocate karta hai, taaki overflow ya wasted space na ho.

2. Registers ko manage karta hai taaki temporary results aur intermediate data
properly store ho sake.

3. External I/O devices (keyboard, monitor, disk) ko manage karta hai, taaki program
unke saath interact kar sake.

4. System interrupts ko handle karta hai, taaki program pause ho sake jab external
events occur karte hain, aur task priority manage ho sake.

5. CPU aur other hardware resources ko optimize karta hai, taaki program smoothly
aur quickly execute ho bina kisi bottleneck ke.

characteristics of program structure for

microprocessors
Sequential Execution

1. Microprocessor instructions ek fixed order me execute hoti hain, bina kisi

interruption ke.

2. Instructions top-to-bottom sequence me execute hoti hain, jisme pehle likhi gayi
instruction pehle execute hoti hai.

3. Program ka flow ek simple, linear path follow karta hai, jo easy to understand aur
debug hota hai.

4. Agar koi instruction agle instruction ke result pe depend karti hai, toh sequential
execution ensure karta hai ki woh properly handle ho.

5. Simple programs jo sequential tasks perform karte hain, unke liye sequential
execution ideal hota hai, jaise basic calculations.

Modularity

1. Microprocessor programs ko chote, independent modules me divide kiya jata

hai, jo individual tasks ko perform karte hain.
 2. Har module apni specific functionality ko handle karta hai, aur ye modular
structure code ko readable aur maintainable banata hai.

3. Modularity se code reuse hota hai, aur naye features easily add kiye ja sakte hain
bina puri program ko modify kiye.

4. Har module ko alag se test aur debug kiya ja sakta hai, jo program ke
development aur maintenance ko asaan banata hai.

5. Modular programs flexibility provide karte hain, jisme specific modules ko

update ya replace kiya ja sakta hai bina overall program pe impact kiye.

Interruptibility

1. Microprocessor systems ko interrupt kiya ja sakta hai jab koi external event ya
condition occur ho, jo immediate attention ki demand karti hai.

2. Interrupts ke through, CPU apne current task ko temporarily stop karke high-
priority tasks ko handle karta hai.

3. Is feature ki wajah se, microprocessors real-time events ko e iciently manage

karte hain.

4. Interruptibility ensures ki program timely response de sake, especially in multi-

tasking environments.

5. Interrupt-driven architecture microprocessor ko more responsive aur e icient

banata hai, jisme system quickly external events ko process karta hai.

Scalability

1. Microprocessor systems ko aise design kiya jata hai ki jaise-jaise demand badhti
hai, system ko easily upgrade kiya ja sake.

2. Scalability ensures ki system ka size aur processing capability e iciently badhayi

ja sakti hai.

3. Larger data sets, multiple users, ya increased processing power handle karne ke
liye, system ko scale kiya ja sakta hai.

4. Microprocessor programs ko scalable banane se unhe future requirements ke

hisaab se adjust kiya ja sakta hai.

5. Scalability ka feature microprocessor programs ko flexible aur adaptable banata

hai, jisme future demands ko easily accommodate kiya ja sakta hai.
Real-Time Processing

1. Real-time processing me, microprocessor ko time-sensitive tasks ko process

karna padta hai, jisme quick response zaroori hota hai.

2. Microprocessor systems time-bound operations ko handle karte hain, jaise

sensor data ko turant process karna aur immediate action lena.

3. Real-time systems me delay tolerance bahut kam hoti hai, aur response time
critical hota hai.

4. Such systems ko design karte waqt, performance aur time constraints ko dhyaan
me rakha jata hai.

5. Real-time processing ensure karta hai ki microprocessor tasks accurately aur

timely execute kare, jaise industrial automation ya robotics applications me.

What is a Flowchart
Flowcharts ek graphical representation hote hain data, algorithms, ya processes
ke, jo code ko samajhne ka ek visual tareeka provide karte hain.

Flowcharts step-by-step solution dikhate hain kisi problem ka, isiliye yeh beginner
programmers ke liye kaafi useful hote hain.
Flowcharts debugging aur troubleshooting me bhi help karte hain jab koi issue hota hai.
Flowchart me process flow ko dikhane ke liye boxes ko sequentially arrange kiya jata
hai.
Kyuki yeh kisi algorithm ya workflow ko visually represent karta hai, isliye ise samajhna
easy hota hai.
Lekin ek e ective flowchart banane ke liye kuch standard rules follow karna zaroori hota
hai, taaki clarity aur consistency bani rahe worldwide professionals ke beech.

Purpose of a Flowchart

1. A flowchart gives a clear visual representation of the logical steps of a program

or system.

2. It helps the programmer to understand the control flow before writing actual
code.

3. Flowcharts allow easy identification of errors or logical mistakes early in the

design phase.

4. They improve communication and collaboration among developers and teams.

 5. A flowchart acts as a reference or documentation during debugging, upgrading,
or maintaining the program.

SYMBOLES QUANTAM SE ….

SERIES PARALLEL CONTROL READ ON BOOK

Sure! Here's the description of Monitor and User Program in Hinglish, with 8 points
each:

Monitor (System Program)

1. Monitor ek system software hota hai jo computer ke saare operations ko control
karta hai.

2. Ye user programs ke execution ko manage karta hai.

3. Monitor CPU time, memory aur input/output devices ka allocation karta hai.

4. Ye errors ya interruptions ko detect karke handle karta hai.

5. Monitor scheduling karta hai — kis program ko kab run karna hai.

6. Direct hardware access sirf monitor ke paas hota hai, user ke paas nahi.

7. Ye system ke resources ka e icient use ensure karta hai.

8. Operating system ka kernel part often monitor jaisa kaam karta hai.

User Program (Application Program)

1. User program wo hota hai jo user specific task perform karne ke liye likhta hai.

2. Ye monitor ya OS ke control mein run hota hai.

3. User program input leta hai, processing karta hai, aur output deta hai.

4. Isme direct hardware access allowed nahi hota — system calls ke through kaam
hota hai.

5. Examples: Calculator app, C/C++ program, games, etc.

6. Ye limited resources use karta hai jo monitor allocate karta hai.

7. Agar error hota hai to user program monitor se help leta hai.

8. User program mostly high-level language mein likha jaata hai.

Great question! Here's a clear explanation of the di erence between memory space
allocation for a Monitor and a User Program in a microprocessor system, especially
in systems like 8085 or 8086:

Di erence Between Monitor and User Program Memory Allocation

Aspect Monitor Program User Program

Purpose Controls system and manages Executes user-defined

hardware tasks

Location in Memory Fixed, usually in ROM or lower Loaded into RAM or higher
memory (e.g., 0000H) memory (e.g., 2000H)

Memory Type ROM (Read Only Memory) or RAM (Random Access

EEPROM Memory)

Accessibility Always present, non-volatile Temporary, erased when

(data is not lost on power-o ) power is o

Modification Not usually modified by user Can be edited or rewritten

by the user

Execution Control Starts automatically or during Controlled by monitor or

system boot user command

Security/Protection Protected memory space to Less protected; errors can

prevent overwrite corrupt data

Examples of 8085 system – Monitor at 0000H User program from 2000H

Location to 1FFFH onwards

Summary in Hinglish:

 Monitor Program memory mostly ROM mein hoti hai — yeh system start hote hi
load ho jaati hai.

 User Program memory RAM mein hoti hai, jahan user apne programs ko
load/run karta hai.

 Monitor ka memory space fixed aur protected hota hai, jabki user program ka
memory space changeable aur temporary hota hai.
various steps involved in writing an Assembly Language
Program (ALP)

Steps to Write an Assembly Language Program

1. Understand the Problem

 Clearly define what the program is supposed to do (e.g., add two numbers, copy
data, count numbers).

 Know the input, processing, and expected output.

2. Write the Algorithm

 Create a step-by-step plan for solving the problem using simple English
instructions.

 Example:

o Load the first number

o Load the second number

o Add the two numbers

o Store the result

3. Draw a Flowchart (optional)

 Draw the logical flow of the program using symbols like arrows, decision boxes,
and processes.

 This helps visualize the program structure.

4. Identify Registers and Memory Locations

 Decide which registers (like A, B, H, L) will be used for data storage or

processing.

 Assign memory addresses for input and output if needed.

5. Write the Assembly Language Instructions

 Use assembly mnemonics like MOV, MVI, ADD, SUB, STA, etc.

 Follow correct syntax and operand usage.

 Write code line by line based on the algorithm.

6. Assign Memory Addresses

  Assign starting memory address (e.g., 8000H) and continue for each instruction.

 Helps in organizing the program in memory.

7. Convert to Machine Code (Optional)

 If needed, convert each assembly instruction to its equivalent hexadecimal

opcode manually or using an assembler.

8. Enter the Program into the System

 Use a microprocessor trainer kit, emulator, or software simulator to enter the

program.

 Input program at the defined memory locations.

9. Execute the Program

 Use the RUN command or equivalent to execute the program.

 Observe output or memory changes.

10. Debug and Test the Program

 If the program does not work correctly, find errors (debugging).

 Correct the logic or syntax and re-test the program until it gives the correct
output.

Summary:

1. Understand the problem

2. Write the algorithm

3. Draw the flowchart (optional)

4. Select registers and memory

5. Write assembly code

6. Assign memory addresses

7. (Optional) Convert to machine code

8. Enter the program

9. Execute it

10. Debug and test

 What is DEBUG?

DEBUG is a command-line utility provided in DOS (Disk Operating System) that allows:

 Writing and testing small assembly language programs.

 Viewing and modifying memory contents.

 Setting breakpoints and debugging machine code.

It is useful for learning and testing 8086 assembly language programs directly on x86-
based systems.

Features of DEBUG:

 Direct entry of machine code or assembly instructions.

 Memory inspection and modification.

 Register view and editing.

 Program execution control.

 Step-by-step execution (tracing).

Steps to Write an Assembly Language Program Using DEBUG

1. Open DEBUG Tool

 Start the DEBUG tool on your system.

2. Specify the Starting Memory Address

 Decide where you want your program to begin in memory.

3. Enter Assembly Instructions

 Write the assembly code line by line in DEBUG’s input area.

4. Review the Program

 After writing, you can view your program’s machine code and assembly
instructions.

5. Execute the Program

 Run the program to see how it executes in memory.

6. Inspect Registers

 After execution, check the contents of the processor registers to verify the result.
7. Modify Memory or Registers (If Necessary)

 If the program needs adjustment, modify memory locations or registers.

8. Exit DEBUG

 Once your program is finished, exit DEBUG.

OR………………………………………………………………………………………………….

1. Open the DEBUG tool.

2. Specify the starting memory address where your program will begin.

3. Enter the assembly instructions one by one.

4. Review the assembly code and its corresponding machine code.

5. Execute the program to check the output.

6. Inspect the contents of the processor registers after execution.

7. If necessary, modify the memory or registers for corrections.

8. Exit DEBUG once you are done with your program.

Here’s the comparison between MASM and DEBUG in table form:

Feature MASM (Microsoft Macro DEBUG

Assembler)

Purpose Assembly code ko machine Program ko debug karne ke liye

code (binary) mein convert karta use hota hai.
hai.

Functionality Code likhna, compile karna aur Code ko step-by-step execute

machine code generate karna. karna aur errors ko find karna.

Usage Code likhna aur executable ya Code ko test aur troubleshoot

object files banana. karna, memory aur registers
inspect karna.

Output Object file (.obj) ya executable Koi output file nahi generate hota,
file (.exe) generate hota hai. debugging information deta hai.

Complexity Code likhne mein thoda Code ko step-by-step run karna,

complex hota hai, low-level debugging easy banata hai.
programming.
 Example Assembly code likhna (e.g., Program ko run karte waqt step-
message display program). by-step execution aur memory
inspection.

In short:

 MASM helps you write and compile assembly code into machine-readable files.

 DEBUG helps you run and debug the program, allowing you to inspect and
modify the running code.

Yeh hai MASM aur Assembly Language Programming ka point-wise explanation in

Hinglish:

1. MASM Kya Hai?

 MASM (Microsoft Macro Assembler) ek assembler tool hai jo assembly

language code ko machine code mein convert karta hai, taaki CPU usko samajh
sake aur execute kar sake.

 Yeh specially Intel x86 processors ke liye design kiya gaya hai, aur Windows
environments mein use hota hai.

 MASM mein macros bhi hote hain, jo repetitive code ko simplify karne mein
madad karte hain.

2. Assembly Language Kya Hai?

 Assembly language ek low-level programming language hai, jo machine code ke

bahut kareeb hoti hai.

 Isme mnemonics ka use hota hai, jo machine-level instructions ko symbolic

form mein likha jata hai. Matlab, aap directly hardware ke saath kaam karte ho.

 Assembly language har processor architecture ke liye specific hoti hai. Agar aap
ek architecture ke liye code likhte ho, toh wo doosre architecture pe nahi chalega
bina changes ke.

3. MASM Ke Features

 Assembler: MASM assembly code ko machine-readable instructions mein

convert karta hai jo CPU samajh sake.

 Macros: MASM mein macros ka support hota hai, jo code ko reusable aur
e icient banate hain, aur complex programs ko handle karna easy banate hain.

 Linker Support: MASM linkers ke saath integrate hota hai taaki object files ko
combine karke executable programs banaye ja sake.
  Debugging Tools: MASM debugging ke liye bhi tools provide karta hai, jo program
ko execute karte waqt errors ko find karne mein madad karte hain.

4. MASM Program Ki Structure

 MASM programs ko typically code, data, aur stack segments mein divide kiya
jata hai.

 Data segment mein variables aur constants declare kiye jate hain, code
segment mein actual instructions hoti hain, aur stack segment function calls
aur temporary data storage ke liye use hota hai.

 MASM program ko ek structured manner mein compile kiya jata hai, jahan har
part ka apna specific role hota hai.

5. Registers aur Memory in MASM

 Registers: MASM aapko CPU ke registers tak direct access deta hai, jo data ko
temporarily store karte hain execution ke dauran. Yeh operations ko fast banane
mein madad karte hain.

 Memory Segments: MASM aapko memory locations ko manage karne ki suvidha

deta hai through di erent segments, jaise data segment, stack segment, aur
code segment.

6. Arithmetic aur Logical Operations

 MASM mein aap various arithmetic (addition, subtraction, multiplication,

division) aur logical (AND, OR, NOT) operations perform kar sakte hain, jo directly
CPU ke through hoti hain.

 Yeh operations registers ya memory mein stored data pe perform kiye ja sakte
hain.

7. Control Flow aur Branching

 Assembly language MASM mein aap program ke flow ko control kar sakte hain,
jaise branching aur looping.

 Conditional branches (e.g., agar condition true ho toh kuch karo) aur loops
create karna possible hota hai, jisse program decisions le sakta hai aur
operations repeat kar sakta hai.

8. Error Handling aur Debugging

 MASM debugging support deta hai, jisme aap code ko step-by-step execute kar
sakte hain, registers aur memory ko inspect kar sakte hain, aur program
execution ko track kar sakte hain.
  Debugging se aap issues identify kar sakte ho, jaise galat data values, logic
errors, ya registers ka improper use.

9. MASM aur Assembly Language Ke Fayeede

 E iciency: Assembly language direct hardware access provide karti hai, jo

programs ko fast run karne aur kam memory use karne mein madad karti hai.

 Control: Yeh aapko machine ke resources pe full control deti hai, jo

performance-critical applications ke liye ideal hota hai.

 Learning Tool: Assembly language likhna aapko computer architecture

samajhne mein madad karta hai, jaise ki CPU kaise instructions execute karta
hai aur memory kaise manage hoti hai.

10. MASM aur Assembly Language Ke Nuksan

 Complexity: Assembly language likhna aur maintain karna thoda di icult ho

sakta hai, especially agar aap higher-level languages jaise C, Python, ya Java se
compare karein.

 Portability: Assembly code usually architecture-specific hota hai, isliye ek

processor ke liye likha gaya code doosre processor pe nahi chalega bina
changes ke.

 Development Time: Assembly code likhna aur debug karna zyada time-
consuming ho sakta hai compared to higher-level programming languages.

11. MASM aur Assembly Language Ke Applications

 Embedded Systems: MASM ko embedded systems mein use kiya jata hai, jahan
hardware control aur optimized performance zaroori hote hain.

 Operating Systems aur Drivers: Low-level system programs, jaise operating

systems aur hardware drivers, mein assembly language ka use hota hai.

 Performance-Critical Applications: Jab aapko maximum performance chahiye

hota hai, jaise gaming engines, real-time systems, ya cryptographic algorithms
mein, assembly language help karti hai.

Summary: MASM ek powerful tool hai assembly programs likhne ke liye, jo aapko
hardware aur memory pe fine control deta hai. Assembly language specially low-level
programming aur performance-critical tasks ke liye useful hoti hai. Lekin, iski
complexity aur development time zyada hoti hai, aur yeh architecture-specific hoti hai.
UNIT 05
Programmed I/O (PIO) aur Memory-Mapped I/O (MMIO) dono I/O (Input/Output)
techniques hain, jo computer systems mein data transfer ke liye use hoti hain. Yeh dono
methods CPU aur peripheral devices ke beech communication establish karte hain,
lekin inke operations alag hote hain.

Programmed I/O (PIO)

1. Manual Control by CPU:

o In Programmed I/O, CPU directly peripheral devices se data transfer karta

hai. CPU har step ko manually control karta hai, jaise read/write
operations ko initiate karna.

2. CPU Overhead:

o Is method mein CPU ko har ek data transfer operation ke liye responsible

hona padta hai, jo CPU ki processing power ko consume karta hai, aur
system ki performance reduce ho sakti hai.

3. Simplicity:

o PIO implementation relatively simple hota hai kyunki yeh direct I/O
operations karne ka basic method hai. CPU ko direct commands bhejni
padti hain peripheral device ko.

4. Slower Data Transfer:

o Data transfer slow ho sakta hai kyunki CPU ko har data byte ke liye
manual intervention karna padta hai, jo ine icient hota hai, especially jab
high-speed data transfer ki zarurat ho.

5. Polling:

o PIO mein CPU ko devices ki status ko continuously poll karna padta hai,
jisse CPU ko continuously device ke status ka check rakhna padta hai
(jaise whether device ready hai ya nahi).

Memory-Mapped I/O (MMIO)

1. Memory Address Space:

o Memory-Mapped I/O mein, peripheral devices ko ek specific memory

address space assign kiya jata hai, jahan se data directly read ya write
kiya jata hai, bilkul normal memory ke jaise.

2. No CPU Involvement in Every Transfer:

 o CPU har I/O operation ko manually handle nahi karta. Instead, CPU
simply memory addresses ko access karta hai, jo devices se connected
hoti hain, jisse CPU ki involvement kam hoti hai.

3. Faster Data Transfer:

o MMIO ka data transfer relatively faster hota hai kyunki data ko memory ke
through transfer kiya jata hai, aur direct memory access (DMA) ka support
bhi hota hai, jo high-speed operations ko enable karta hai.

4. Complex Implementation:

o MMIO ko implement karna thoda complex hota hai, kyunki special

hardware configurations ki zarurat hoti hai jisme devices ko memory
space assign kiya jata hai aur unki addresses manage kiye jate hain.

5. Uses System Memory:

o Is technique mein system memory ka use hota hai jo devices ke data ko

store karta hai. Agar memory space limited ho, toh MMIO ka use
problematic ho sakta hai, kyunki peripheral devices ko system memory ke
part ke roop mein treat kiya jata hai.

Summary

 PIO: CPU ko har ek I/O operation pe control hota hai, jo slow aur ine icient ho
sakta hai, lekin implementation simple hoti hai.

 MMIO: Memory space ko use karke devices ke saath communication hota hai,
jisme CPU ki involvement kam hoti hai, aur data transfer faster hota hai, lekin
implementation thoda complex hoti hai.

In short, PIO simple aur direct method hai, jabki MMIO high-speed aur e icient method
hai, lekin implementation complex hota hai.

Programmed I/O (PIO) and Memory-Mapped I/O (MMIO):

Feature Programmed I/O (PIO) Memory-Mapped I/O (MMIO)

1. Control CPU directly controls the I/O devices are treated like
data transfer. memory locations.

2. CPU CPU is involved in each data CPU has minimal involvement

Involvement transfer operation. once the memory addresses are
set.

3. Data Transfer Slower due to CPU handling Faster, as it uses memory for data
Speed each transfer and polling. transfer, and DMA may be used.
 4. Complexity Simple to implement and More complex to implement due
understand. to the need for memory address
management.

5. CPU Overhead High, as CPU must actively Low, as CPU just accesses
manage I/O operations. memory and devices are treated
as memory regions.

6. Polling Requires continuous polling No polling needed as the device

by the CPU to check device is mapped to memory addresses.
status.

7. Memory Usage Does not use system Uses system memory to map I/O
memory; I/O operations are devices, sharing address space.
separate.

8. Interrupt Often requires interrupts or Typically uses memory-mapped

Handling polling to check device addresses and can be combined
readiness. with interrupts.

9. E iciency Less e icient for large data More e icient, especially for
transfers or frequent I/O. high-speed data transfer.

10. Hardware Simple hardware Requires specialized hardware

Requirements configuration needed for support to map devices to
I/O. memory space.

This list highlights key di erences between PIO and MMIO based on aspects like CPU
involvement, data transfer speed, complexity, and hardware requirements.

Interrupt-Driven I/O:
1. Interrupt Notification: I/O devices interrupt karte hain CPU ko jab unhe data
transfer ya attention ki zarurat hoti hai, isse polling ki zarurat nahi padti.

2. CPU E iciency: CPU tab tak apne dusre tasks ko execute karta rehta hai jab tak
interrupt ka signal nahi aata, isse system resources ka e icient use hota hai.

3. Interrupt Service Routine (ISR): Jab interrupt aata hai, CPU apne current task ko
temporarily stop karke ek ISR (Interrupt Service Routine) execute karta hai jo
I/O operation handle karta hai.

4. Asynchronous Operation: Interrupt-driven I/O asynchronous hota hai, iska

matlab hai ki CPU I/O device ke ready hone ka wait nahi karta aur apne tasks
continue karta hai.
 5. Reduces CPU Overhead: CPU ko har waqt device ke status ko check nahi karna
padta (jaise PIO mein hota hai), isliye CPU ka overhead kam hota hai.

6. Interrupt Latency: Interrupt latency wo time hota hai jo CPU ko interrupt

respond karne mein lagta hai. Isko minimize karna zaroori hota hai for better
system performance.

7. Interrupt Prioritization: Multiple interrupts ko priority ke basis pe handle kiya

jata hai. Zaroori interrupts (jaise hard drive ke read/write operations) pehle
handle kiye jate hain.

8. Complexity: Interrupt-driven I/O implement karna complex hota hai kyunki

multiple devices ke interrupts ko manage karna padta hai aur unke sequences
properly handle karne hote hain.

Yeh points interrupt-driven I/O ke key features ko explain karte hain jo system ki
e iciency ko improve karte hain.

DMA (Direct Memory Access) I/O Interface

DMA (Direct Memory Access) ek technique hai jo CPU ko bypass karke data transfer
operations ko memory aur I/O devices ke beech direct transfer karne ki suvidha deti
hai. Iska use karne se data ko e iciently transfer kiya ja sakta hai, bina CPU ko involved
kiye, jisse CPU ka load kam hota hai aur overall system performance improve hoti hai.

1. DMA CPU ko bypass karke directly memory aur I/O device ke beech data transfer
karne ki suvidha deta hai, jisse CPU ka load kam hota hai.

2. DMA mein DMA controller ek hardware component hota hai jo data transfer ko
manage karta hai, aur yeh memory se I/O device tak data directly transfer karta
hai.

3. CPU sirf DMA transfer ko initiate karta hai, baaki ka kaam DMA controller karta
hai, jisse CPU apne baaki tasks pe focus kar sakta hai.

4. DMA ka use high-speed data transfer operations mein hota hai, jaise hard drives,
network cards, aur sound cards mein, jahan large data transfer ki zarurat hoti
hai.

5. DMA controller system bus ka arbitration karta hai, iska matlab hai ki CPU aur
DMA controller ko system bus access karne ke liye compete karna padta hai.

6. DMA ke 4 types hote hain: Burst Transfer, Cycle Stealing, Block Transfer, aur
Demand Transfer, jo di erent situations mein use kiye jate hain.

7. DMA transfer complete hone ke baad, DMA controller CPU ko interrupt send
karta hai, taaki CPU ko pata chal sake ki transfer complete ho gaya hai.
 8. DMA system mein CPU ko direct polling ya data handling ka kaam nahi karna
padta, isse CPU ka overhead kam hota hai aur system ki e iciency badhti hai.

9. Bus contention ka issue ho sakta hai, jab CPU aur DMA controller same system
bus share karte hain, lekin is problem ko manage kiya jata hai.

10. DMA data transfer ko bahut tezi se handle karta hai, specially jab continuous aur
large data transfer ki zarurat ho, jisse system performance optimize hoti hai.

Sure! Let's elaborate both Serial Communication and Parallel Communication in

detail and in Hinglish:

1. Serial Communication (Series Communication) – Detailed Explanation:

Serial communication ek aisa method hai jisme data ek time pe ek bit transmit kiya
jata hai. Iska matlab hai ki agar aapke paas 8-bit ka data hai, toh wo ek line se bit by bit
transmit hoga—pehle bit 1, phir bit 2, and so on, jab tak poora data transmit na ho jaye.

➤ Important Features and Explanation:

 Data Line Kam Lagti Hai: Isme data sirf ek line ya thodi si lines ke through
transfer hota hai, jaise TX (transmit) aur RX (receive), isliye wiring kaafi simple
hoti hai.

 Long Distance Communication: Serial communication long-distance data

transmission ke liye suitable hai, kyunki isme interference aur noise kam hoti hai,
aur synchronisation easy hota hai.

 Speed: Halanki speed parallel ke comparison mein thodi kam hoti hai, lekin iska
reliability aur cost-e ectiveness use zyada popular banata hai.

 Synchronous vs Asynchronous:

o Synchronous serial communication mein clock signal bhi use hota hai,
jisse sender aur receiver sync mein rehte hain.

o Asynchronous communication mein koi clock signal nahi hota, par start
and stop bits use ki jaati hain data framing ke liye.

 Examples: USB (Universal Serial Bus), UART (Universal Asynchronous Receiver

Transmitter), SPI, I²C, RS-232 — yeh sab serial communication ke protocols hain.

➤ Real Life Use:

Mobile chargers, keyboards, GPS modules, sensors — in sab mein serial

communication ka use hota hai because wiring kam lagti hai aur e iciency high hoti hai.
 2. Parallel Communication – Detailed Explanation:

Parallel communication ek aisa method hai jisme multiple bits simultaneously

transmit kiye jaate hain. Yani agar 8-bit data transmit karna hai toh 8 separate wires use
hoti hain, aur saare bits ek saath ek hi time pe transfer ho jaate hain.

➤ Important Features and Explanation:

 Multiple Data Lines: Har bit ke liye ek alag wire hoti hai. Agar 8-bit data bhejna
hai toh 8 wires + control lines lagengi. Isse transmission bohot fast hota hai.

 High Speed over Short Distance: Kyunki saare bits ek saath jate hain, speed
high hoti hai. Lekin yeh method sirf short distances ke liye practical hai, kyunki
long wires mein signal delay aur mismatch hone ka risk hota hai.

 Costly and Complex: Isme wiring zyada hoti hai, connectors bhi complex hote
hain, isliye iski cost high hoti hai aur system bulky ban jata hai.

 Examples: Printers ke old ports (Parallel Port – LPT), microprocessors ke data

buses, RAM access, CPU to memory communication — sabme parallel
communication use hoti thi ya hoti hai.

 Synchronization: Parallel communication mein har bit ka timing match hona

chahiye, warna data corrupt ho sakta hai. Isliye short distance ke liye hi better
hota hai.

➤ Real Life Use:

Computers ke andar jo processor aur RAM ke beech data transfer hota hai, wo mostly
parallel communication ke through hota hai for speed. Printer ports bhi ek common
example hain.

Here is a 10-point di erence between Serial Communication and Parallel

Communication in table form:

[Link]. Serial Communication Parallel Communication

1 Data 1 bit at a time transfer hota hai Data multiple bits at a time transfer
hote hain

2 Single/two wires lagti hain Multiple wires lagti hain (e.g., 8, 16,
32 lines)
 3 Speed relatively kam hoti hai Speed generally zyada hoti hai (short
distance)

4 Long distance communication ke Sirf short distance communication ke

liye better hai liye suitable

5 Wiring simple hoti hai Wiring complex hoti hai

6 Cost kam hoti hai Cost zyada hoti hai due to more
hardware

7 Synchronization easy hoti hai Synchronization di icult hoti hai

(timing issue)

8 Interference and noise kam hota hai Interference and noise zyada hota hai

9 Example: USB, UART, SPI, I²C Example: LPT port, data bus, RAM
access

10 Use hota hai external devices ke Use hota hai internal components ke
saath saath

What is DMA?
Sure! Here's an elaborated introduction of DMA (Direct Memory Access) in Hinglish,
in a clear and student-friendly way:

DMA (Direct Memory Access) ek aisa technique hai jiska use computer systems me
hota hai taaki data directly memory aur peripheral devices (jaise ki hard disk, graphics
card, sound card, network card, etc.) ke beech transfer kiya ja sake — bina CPU ko baar-
baar involve kiye.

Normally, jab koi peripheral device (jaise keyboard ya hard disk) data bhejta ya leta hai,
to CPU har ek byte ka transfer handle karta hai. Lekin agar data kaafi zyada ho, to CPU
pe load badh jata hai aur system slow ho sakta hai. DMA is problem ka solution deta
hai.

DMA controller ek alag hardware component hota hai jo data transfer ka pura process
handle karta hai. Jab ek device ko data transfer karna hota hai, to wo DMA controller ko
request bhejta hai. DMA controller CPU se bus ka control temporarily le leta hai, data
transfer karta hai, aur phir control wapas CPU ko de deta hai. Is process me CPU free
rehta hai aur dusre kaam kar sakta hai.
Is tarah DMA use karke system e icient banta hai, multitasking me fast response milta
hai, aur high-speed data transfer possible hota hai — especially jab large files ya
continuous streaming data ho.

Features
 CPU ke bina data transfer karta hai, jisse CPU dusre kaam kar sakta hai.

 Fast data transfer possible hota hai, especially large data ke liye.

 Peripheral aur memory ke beech directly data transfer hota hai.

 System performance improve hoti hai, especially multitasking me.

 Isme DRQ (DMA Request) aur DACK (DMA Acknowledge) signals ka use hota hai.

 Multiple DMA channels support karta hai (jaise 8237 me 4 channels hote hain).

 Fixed ya rotating priority ke through multiple devices manage karta hai.

 Alag-alag transfer modes support karta hai: Single, Block, Demand, Cascade.

 Memory refresh operations bhi DMA ke through kiye ja sakte hain.

 CPU ko bus chhodni padti hai jab DMA transfer hota hai (HOLD & HLDA signals
use hote hain).

Sure! Here's a detailed explanation of the 8237 DMA Controller architecture along
with all the major blocks and internal registers, written in a clear, student-friendly way
with each section explained in 6 points under proper headings — as you requested.

Architecture of 8237 DMA Controller

The Intel 8237 DMA controller transfers data directly between I/O devices and memory
without CPU intervention. It has four DMA channels and consists of several functional
blocks:

Main Blocks in Architecture:

1. Timing and Control Block

2. Program Command Control Block

3. Address & Count Registers

4. Data Bus Bu er
5. Priority Resolver

6. Internal Registers (multiple types)

1. Timing and Control Block (6 points)

1. Is block ka kaam DMA transfer ke liye timing aur control signals generate karna
hota hai.

2. It synchronizes the DMA with CPU using HOLD and HLDA signals.

3. It generates signals like MEMR (Memory Read), MEMW (Memory Write), IOR
(I/O Read), and IOW (I/O Write).

4. It also handles DREQ (DMA Request) and DACK (DMA Acknowledge) signals for
each channel.

5. It ensures that data is transferred only when the bus is available.

6. DMA transfer ke start aur end ke signals bhi yahin se aate hain.

2. Program Command Control Block (6 points)

1. Is block ke through CPU 8237 DMA controller ko program karta hai.

2. It contains control logic for executing DMA commands.

3. It manages the Command Register and interprets control instructions from the
CPU.

4. It activates the correct channel and transfer mode based on programmed data.

5. It ensures valid control signal sequencing during DMA operations.

6. It interfaces with other blocks like mode, request, and status registers.

3. Internal Registers & Their Types (Address and Count)

A. Current Address Register (6 points)

1. Har DMA channel ka apna current address register hota hai.

2. Ye register memory ka present address store karta hai jahan se data read/write
ho raha hota hai.
3. Is register ki value har transfer ke baad increment/decrement hoti hai.

4. Ye register automatically update hota hai DMA operation ke time.

5. Iska initial value base address se liya jata hai.

6. Jab DMA complete hota hai, value reset nahi hoti until reprogrammed.

B. Current Word Count Register (6 points)

1. Ye register ye batata hai ki total kitne bytes transfer hone hain.

2. Har DMA transfer ke baad iska value decrement hota hai.

3. Jab ye zero hota hai, DMA operation complete maana jata hai.

4. Ye bhi har channel ke liye alag hota hai.

5. Iska initial value base word count se liya jata hai.

6. Is register ko CPU ke through set kiya jata hai during initialization.

C. Base Address and Base Count Register (6 points)

1. Base address aur count registers DMA transfer ke starting values store karte
hain.

2. Jab bhi current registers reset hote hain, inhi base values se reset hote hain.

3. Base registers CPU ke through set kiye jaate hain.

4. Ye help karte hain in auto-initialization after a transfer.

5. Base Address = transfer start ka memory address hota hai.

6. Base Count = total number of words/bytes to be transferred.

4. Command Register (6 points)

1. Command register se CPU DMA controller ko control karta hai.

2. Ye DMA enable/disable, memory-to-memory transfer allow karne ka kaam karta

hai.

3. Is register me various control bits hote hain for modes and operation.

4. Ye controller ke overall behavior ko set karta hai.

5. CPU is register ko write karta hai during initialization.

6. Ye bit set karta hai for priority, compression enable, rotation, etc.

5. Mode Register (6 points)

1. Is register me bataya jata hai ki DMA kis transfer mode me kaam karega.

2. Modes: Read, Write, Verify, and transfer types like Block, Demand, etc.

3. Har DMA channel ke liye mode register alag hota hai.

4. Isme auto-initialization aur address increment/decrement ka setting hota hai.

5. CPU is register ko write karta hai during configuration.

6. Ye decide karta hai ki kis channel ke liye kaunsa mode use hoga.

6. Request Register (6 points)

1. Ye register software-based DMA request generate karne ke liye hota hai.

2. Har channel ke liye ek bit hoti hai jo set karke request bheja jata hai.

3. Ye hardware request (DREQ) ka alternative hai.

4. Jab bit set hoti hai, DMA operation initiate hota hai.

5. CPU is register ko manually set/reset karta hai.

6. Iska use test and manual DMA start ke liye hota hai.

7. Mask Register (6 points)

1. Is register se DMA channels ko enable/disable kiya jata hai.

2. Agar mask bit set hai to us channel ka DMA request ignore hoga.

3. Har channel ke liye ek bit hoti hai.

4. Ye controller ke channel-wise control ke liye use hota hai.

5. CPU is register me write karke channels ko selectively activate karta hai.

6. Useful for system protection and task isolation.

8. Temporary Register (6 points)

1. Iska use data ko temporarily store karne ke liye hota hai during transfer.

2. Jab ek read complete hota hai, data pehle temporary register me store hota hai.

3. Fir write operation me ye data memory ya I/O me bheja jata hai.

4. Ye register controller ke andar hi hota hai.

5. Ye fast and synchronized data movement ke liye helpful hai.

6. Ye CPU ke control me nahi hota, DMA hardware hi manage karta hai.

9. Status Register (6 points)

1. Is register se pata chalta hai ki kis DMA channel ka transfer complete hua.

2. Har channel ke liye ek status bit hoti hai.

3. Ye batata hai whether terminal count reached or not.

4. CPU is register ko read karke DMA operation ka status check karta hai.

5. Ye error checking aur debugging me bhi help karta hai.

6. DMA ke completion ke baad ye register automatically update hota hai.

 8237 DMA Controller – 40 Pin Configuration
1. Address & Data Pins (Pins 6–13, 21–28)

A0 – A7 (Pin 6–13)

 Ye internal registers ko select karne ke liye hote hain jab CPU DMA ko program
karta hai.

 Ye memory address nahi dete; sirf control purpose ke liye hote hain.

D0 – D7 (Pin 21–28)

 Bi-directional data bus hai.

 CPU aur DMA controller ke beech data, command, aur status transfer ke liye use
hoti hai.

 DMA data inhi pins ke through send/receive karta hai.

2. DMA Channel Request/Acknowledge (Pins 12–19, 14–17)

DREQ0–DREQ3 (Pin 16–19)

 Ye DMA request input pins hain.

 Jab koi peripheral (jaise hard disk ya ADC) DMA request karta hai, to ye pin high
hoti hai.

DACK0̅–DACK3̅ (Pin 12–15)

 Ye DMA acknowledge output pins hain.

 Jab DMA controller kisi channel ka request accept karta hai, to respective DACK
pin low karke device ko batata hai ki ab data bhejo/lo.

3. CPU Interface Control Signals (Pins 29–36)

CS̅ (Pin 30) – Chip Select

 Jab CPU DMA controller ke saath communication karta hai, to is pin ko low kiya
jata hai.

 Ye DMA ko activate karta hai.

RD̅ (Pin 31) – Read

 Jab CPU DMA se data/status read karta hai, tab ye signal active hota hai.

WR̅ (Pin 29) – Write

 Jab CPU DMA ko koi command/data write karta hai, to ye pin low hoti hai.

HRQ (Pin 33) – Hold Request

 DMA controller CPU se bus ka control maangta hai is pin ke through.

HLDA (Pin 32) – Hold Acknowledge

 Jab CPU bus chhod deta hai DMA ke liye, to ye signal high karta hai.

READY (Pin 36)

 Agar memory/peripheral slow ho, to ye pin low karke DMA ko wait karwata hai
(wait state generate karta hai).

CLK (Pin 35)

 DMA controller ka clock input. System clock se connect hota hai.

RESET (Pin 34)

 DMA controller ke sabhi internal registers ko reset karta hai.

4. Memory & I/O Control Signals (Pins 22–25)

MEMR̅ (Pin 22) – Memory Read

 Jab DMA memory se data read karta hai, to ye signal active hota hai.

MEMW̅ (Pin 23) – Memory Write

 Jab DMA memory me data write karta hai, to ye signal low hota hai.

IOR̅ (Pin 24) – I/O Read

 Jab DMA kisi I/O device se data read karta hai.

IOW̅ (Pin 25) – I/O Write

 Jab DMA kisi I/O device me data write karta hai.

5. Address Output Pins (Pins 1–5, 38–40)

A8 – A15 (Pins 1–5, 38–40)

 Ye memory ke higher order address bits generate karte hain (16-bit address).
 controller in pins ke through memory ka exact location specify karta hai.

6. Other Important Pins (Pins 20, 26, 27, 37)

EOP̅ (Pin 20) – End of Process

 Jab DMA transfer complete hota hai, to ye signal active hota hai (low).

 Ye signal CPU ko ya device ko end-of-transfer indicate karta hai.

MARK (Pin 37)

 Ye signal tab active hota hai jab Terminal Count ya specific data block boundary
reach hoti hai.

 Iska use floppy controllers jaise devices ke saath hota hai.

GND (Pin 26)

 Ground connection.

Vcc (Pin 27)

 +5V power supply input.

Working Summary (Simple Flow – Hinglish)

1. Peripheral device DREQ ke through request bhejta hai.

2. DMA controller CPU se bus control ke liye HRQ signal bhejta hai.

3. CPU HLDA signal ke through permission deta hai.

4. DMA controller respective channel ka DACK signal low karta hai.

5. Memory aur I/O ke beech data transfer hota hai using MEMR̅, MEMW̅, IOR̅, IOW̅.

6. Jab data transfer complete hota hai, EOP̅ signal active hota hai, aur control
wapas CPU ko milta hai.
8255 PPI ke features
1. 24 I/O lines hoti hain jo 3 ports me divided hoti hain – Port A, Port B, aur Port C (8-
bit each).

2. Har port ko alag-alag input ya output ke roop me configure kiya ja sakta hai.

3. 3 operating modes milte hain – Mode 0 (simple I/O), Mode 1 (handshaking I/O),
aur Mode 2 (bidirectional data transfer sirf Port A ke liye).

4. Port C ke individual bits ko set ya reset kiya ja sakta hai bina doosre bits ko e ect
kiye.

5. Control word register diya gaya hota hai jo ports ke mode, direction aur
configuration ko set karta hai.

6. I/O mode aur Bit Set/Reset (BSR) mode dono supported hote hain.

7. Intel 8085 aur 8086 microprocessors ke saath compatible hota hai aur asani se
interface hota hai.

8. Parallel data transfer ke liye design kiya gaya hai jisme ek sath 8-bit data
send/receive hota hai.

9. Flexible configuration allow karta hai jisme har port ka role user ke requirement
ke according change kiya ja sakta hai.

10. Widely use hota hai embedded systems, displays, keyboard interface,
automation systems, ADC/DAC control, etc. me.

Yahan main aapko 8255 Programmable Peripheral Interface (PPI) ka internal

architecture Hinglish mein point-wise aur clear explanation ke saath samjha raha
hoon, jisme ye blocks cover honge:

 Data Bus Bu er

 Read/Write Control Logic

 Group A Control

 Group B Control

 Port A, Port B, Port C

8255 Internal Architecture

1. Data Bus Bu er

1. Ye block 8255 ko microprocessor se connect karta hai through data bus (D0–
D7).

2. Ye 8-bit bi-directional bu er hota hai — data dono direction me flow karta hai
(read/write).

3. Jab CPU koi data ya control word 8255 me bhejta hai, wo is bu er ke through jata
hai.

4. Jab CPU status ya port data read karta hai, to data is bu er ke through wapas
aata hai.

5. Bu er me tri-state logic hota hai jo bus ko share karne me help karta hai.

6. Ye bu er 8255 ko isolate karta hai baaki system bus se jab needed na ho.

2. Read/Write Control Logic

1. Ye logic CPU se aane wale control signals handle karta hai (RD̅, WR̅, CS̅, A0, A1).

2. Is logic ke through decide hota hai ki CPU read karega ya write karega 8255 ke kis
register se.

3. A0 aur A1 address lines decide karti hain ki Port A, Port B, Port C ya Control
Register access hoga.

4. Jab CS̅ low hoti hai, tabhi 8255 enable hota hai — warna inactive rehta hai.

5. WR̅ low hone par CPU 8255 me data write karta hai, aur RD̅ low hone par data
read karta hai.

6. Ye control logic internal signal generate karta hai for internal blocks (port/control
access ke liye).

3. Group A Control

1. Group A me Port A (PA0–PA7) aur Port C ke upper bits (PC4–PC7) included hote
hain.

2. Is group ke liye ek control block hota hai jo Group A ke mode aur direction set
karta hai.

3. Group A ko Mode 0, Mode 1, ya Mode 2 me operate kiya ja sakta hai.

4. Mode 2 sirf Port A ke liye available hai (bidirectional transfer).

 5. Group A ka control CPU set karta hai control word register ke through.

6. Group A handshaking signals generate karta hai jab Mode 1 ya 2 me kaam karta
hai.

4. Group B Control

1. Group B me Port B (PB0–PB7) aur Port C ke lower bits (PC0–PC3) included hote
hain.

2. Is group ke liye bhi alag control logic hota hai jo mode aur direction control karta
hai.

3. Group B sirf Mode 0 ya Mode 1 me operate hota hai (Mode 2 nahi).

4. Port B input ya output ho sakta hai, based on control word.

5. Group B bhi handshaking support karta hai Mode 1 me.

6. Group B independent hota hai Group A se — dono alag mode me kaam kar sakte
hain.

Port A, Port B, Port C

➤ Port A:

1. Ye 8-bit port hai (PA0–PA7) — data input ya output ke liye use hota hai.

2. Is port ko Mode 0, 1, aur 2 me operate kiya ja sakta hai.

3. Mode 2 me ye bidirectional transfer support karta hai.

4. Handshaking signals PC4–PC7 ke through milte hain.

➤ Port B:

1. Ye bhi 8-bit port hai (PB0–PB7).

2. Iska use simple input/output ya handshaking ke liye hota hai (Mode 0 & 1 only).

3. PC0–PC2 ke signals handshaking ke liye use hote hain.

➤ Port C:

1. Port C ko 2 parts me divide kiya ja sakta hai:

o PC0–PC3 (lower nibble)

o PC4–PC7 (upper nibble)

 2. Dono halves alag group ke saath associated hote hain (PC0–PC3 with Group B,
PC4–PC7 with Group A).

3. Iska use handshaking signals aur bit set/reset (BSR) ke liye hota hai.

4. PC ke individual bits ko BSR mode me control kiya ja sakta hai.

8255 PPI – 40 Pin Configuration (with Explanation)

Total Pins: 40

8255 IC ke paas total 40 pins hoti hain, jisme alag-alag pins ka use data transfer,
address decoding, control signals, ports, and power supply ke liye hota hai.

Pin 1–8: Port A (PA0 – PA7)

1. Ye 8-bit bidirectional I/O port hota hai.

2. In pins ka use data input ya output ke liye hota hai, depending on mode and
direction.

3. Mode 0, Mode 1, aur Mode 2 (bidirectional) support karta hai.

4. CPU control word ke zariye is port ka direction set karta hai.

5. Large data transfer ya communication ke liye useful hota hai.

6. Mode 2 sirf Port A ke liye hi available hota hai.

7. Iska data bu er internally connect hota hai data bus se.

8. Port A signals handshaking ke liye bhi use hote hain (Mode 1 & 2).

Pin 9–16: Port B (PB0 – PB7)

1. Ye bhi 8-bit bidirectional I/O port hai.

2. Mode 0 aur Mode 1 me operate karta hai (Mode 2 nahi).

3. Input ya output direction control word ke through set hoti hai.

4. General purpose data transfer ke liye use hota hai.

5. PB0–PB7 ke through bhi peripheral se data exchange hota hai.

6. Iske handshaking signals Port C ke lower bits se milte hain.

7. Data bus ke through CPU ke saath connected hota hai.

8. Iska use devices ke control ya read/write ke liye hota hai.

Pin 18–25: Port C (PC0 – PC7)

1. Is port ko 2 nibbles me divide kiya ja sakta hai:

o PC0–PC3 (lower nibble – Group B control)

o PC4–PC7 (upper nibble – Group A control)

2. Ye port input/output ke saath-saath control signals aur handshaking ke liye bhi

use hota hai.

3. PC ke bits ko individually set/reset kiya ja sakta hai (BSR mode).

4. Mode 1 & 2 me handshake/control lines provide karta hai.

5. Iska use interrupts, ready signals ya external signals ke liye hota hai.

6. Flexible use ke liye design kiya gaya hai – data + control dono.

Pin 17: GND (Ground)

1. Ye IC ka ground pin hai.

2. Power supply ka negative terminal yahaan connect hota hai.

3. Circuit ko reference voltage provide karta hai.

4. Stable operation ke liye essential hai.

5. Vcc ke saath proper biasing karta hai.

6. Har IC ke liye GND pin zaruri hoti hai.

Pin 26–33: Data Bus (D0 – D7)

1. Ye 8-bit bidirectional data bus hai.

2. Iske through CPU aur 8255 ke beech data ya control word transfer hota hai.

3. CPU is bus ke through ports me data write ya read karta hai.

4. Control word bhi isi bus se write hota hai.

5. Tri-state bu er logic use karta hai bus sharing ke liye.

6. Dono direction me kaam karta hai – input and output.

Pin 34–35: A1 and A0 (Address Lines)

1. Ye register select lines hoti hain.

2. 8255 ke internal registers (Port A, B, C, Control Word) ko select karne ke liye use
hoti hain.

3. Address decoding me important role play karti hain.

4. Combination of A1-A0:

o 00 → Port A

o 01 → Port B

o 10 → Port C

o 11 → Control Register

5. CPU jab access karta hai to in pins ka use hota hai.

6. Ye inputs hote hain jo CPU se aate hain.

Pin 36: CS̅ (Chip Select)

1. Ye pin 8255 ko activate ya deactivate karti hai.

2. Jab CS̅ low hoti hai (0), tabhi 8255 active hota hai.

3. Jab CS̅ high hoti hai (1), IC disable ho jata hai.

4. Generally address decoder ke output se connect hoti hai.

5. Multiple devices ke case me enable signal ke liye use hoti hai.

6. Power saving aur resource sharing ke liye useful hai.

Pin 37: RD̅ (Read)

1. Jab CPU 8255 se data read karta hai to RD̅ low hoti hai.

2. Is pin se data 8255 se CPU tak jata hai.

3. Active low signal hai – kaam tab karta hai jab 0 hota hai.

4. Port A, B, C ya status read karne ke liye use hota hai.

5. Data bus bu er activate hota hai is signal ke saath.

6. CPU ke control signals me se ek important line hai.

Pin 38: WR̅ (Write)

1. Jab CPU 8255 me data ya control word write karta hai to WR̅ low hoti hai.

2. Iske through CPU koi data ya instruction send karta hai.

3. Port data ya control word register write karne ke liye use hota hai.

4. Active low signal hota hai.

5. Control logic is signal ka use karta hai register activate karne ke liye.

6. Synchronization ke liye bhi use hoti hai.

Pin 39: RESET

1. Is pin se 8255 ko reset kiya ja sakta hai (initial condition me le jata hai).

2. Jab reset signal diya jata hai, saare ports input mode me chale jate hain.

3. Control register clear ho jata hai.

 4. System startup ya power-on ke baad ye pin use hoti hai.

5. Default state restore karta hai.

6. Automatic ya manual reset dono me use hota hai.

Pin 40: Vcc (Power Supply)

1. Ye IC ka positive power supply pin hai (usually +5V).

2. IC ke internal circuits ko power provide karta hai.

3. Without Vcc, IC function nahi karega.

4. Standard TTL compatible ICs ke liye +5V diya jata hai.

5. Is pin ke saath GND ka connection stable operation ke liye zaruri hota hai.

6. Short circuit ya reverse polarity se bachana chahiye.

DIFFERENT MODE OPERATIONS OF 8255 PPI

Mode 0 – Simple Input/Output Mode

1. Mode 0 mein Port A, Port B aur Port C ko simple input/output ke roop mein
configure kiya jata hai bina kisi handshaking ke.

2. Mode 0 mein har port ya to input ho sakta hai ya output, dono ek saath nahi ho
sakte.

3. Input port mein data directly read hota hai aur output port mein data latched
hota hai jab tak naye data se overwrite na ho.
4. Mode 0 mein handshaking signals required nahi hote, isliye yeh mode simple aur
fast communication ke liye best hota hai.

5. Port C ke bits ko Mode 0 mein group control ke liye ya independently bit I/O ke
roop mein use kiya ja sakta hai.

6. Is mode ka use LED display, switches, aur simple sensors se data lene mein kiya
jata hai.

Mode 1 – Input/Output with Handshaking

7. Mode 1 mein Port A aur Port B ko input ya output mode ke saath handshaking
signals ke saath configure kiya jata hai.

8. Handshaking signals synchronization provide karte hain jaise STB̅ (strobe), IBF
(input bu er full), INTR (interrupt request), ACK̅ (acknowledge) etc.

9. Port C ke kuch bits Mode 1 mein control signals ke roop mein kaam karte hain
jaise PC3, PC4, PC5 for Port B; PC6, PC7 for Port A.

10. Mode 1 mein data transfer zyada secure hota hai kyunki control signals ensure
karte hain ki data properly send/receive ho raha hai.

11. Mode 1 mainly tab use hota hai jab peripheral devices synchronous operation
chahte hain jaise keyboard, ADC ya printer.

12. Mode 1 flexible aur reliable communication ke liye suitable hota hai.

Mode 2 – Bidirectional Data Transfer Mode

13. Mode 2 sirf Port A ke liye available hota hai aur isme bidirectional data transfer
hota hai, yaani same port input/output dono ka kaam karta hai.

14. Mode 2 mein bhi handshaking signals use hote hain jo Port C ke higher bits se
liye jaate hain jaise PC3–PC7.

15. Is mode mein bus driver aur receiver dono enable hote hain data transfer ke liye
aur direction dynamic hoti hai.

16. Mode 2 ka use full-duplex communication ke liye hota hai jahan data dono taraf
se ek hi port par exchange hota hai.

17. Mode 2 zyada complex devices ke liye suitable hota hai jaise serial
communication interfaces ya external memory modules.

18. Mode 2 mein interrupt-driven ya polling-based control bhi possible hota hai.
 BSR Mode – Bit Set/Reset Mode (for Port C only)

19. BSR (Bit Set/Reset) mode specifically Port C ke individual bits ko set ya reset
karne ke liye use hota hai bina ports ke mode ko e ect kiye.

20. BSR mode ka use control signals generate karne ke liye hota hai jaise relay, LEDs
ya control lines toggle karna.

21. Is mode mein sirf ek bit at a time control hota hai using a control word (D7 = 0).

22. Control word ke lower bits define karte hain kaunsa bit set ya reset hoga (bit
number + value).

23. BSR mode sirf Port C ke liye apply hota hai – Port A aur B is mode mein e ect
nahi hote.

24. BSR mode non-handshaking, simple control ke liye best hota hai jahan quick bit-
level control chahiye hota hai.

BIT Mode Set Control

1. Mode Set Control Word (D7 = 1)

Yeh control word use hota hai jab hum ports (Port A, B, C) ko mode 0, 1, ya 2 mein set
karte hain.

Yeh control word ka bit structure kuch is tarah hota hai:

 D7 bit: Agar yeh 1 hai, toh iska matlab hai hum mode set kar rahe hain.

 D6-D5 bits: Yeh bits bataate hain ki Port A ka direction kya hoga:

o D6 = 1 → Port A input hoga.

o D6 = 0 → Port A output hoga.

o D5 = 1 → Port C ka upper half (PC4–PC7) input hoga.

o D5 = 0 → Port C ka upper half (PC4–PC7) output hoga.

 D4-D3 bits: Yeh bits decide karte hain ki Mode kaunsa hoga:

o 00 → Mode 0 (Simple I/O).

o 01 → Mode 1 (Input/output with handshaking).

o 10 → Mode 2 (Bidirectional, only for Port A).

  D2 bit: Yeh bit decide karta hai ki Port B ka direction kya hoga:

o D2 = 1 → Port B input hoga.

o D2 = 0 → Port B output hoga.

 D1 bit: Yeh bit decide karta hai ki Port C ka lower half (PC0–PC3) ka direction
kya hoga:

o D1 = 1 → Port C ka lower half input hoga.

o D1 = 0 → Port C ka lower half output hoga.

 D0 bit: Yeh bit decide karta hai ki Group B ka mode kya hoga:

o D0 = 1 → Group B ko Mode 1 (with handshaking) mein set karega.

o D0 = 0 → Group B ko Mode 0 (simple I/O) mein set karega.

2. BSR Control Word (D7 = 0)

BSR mode mein hum Port C ke kisi bhi specific bit ko set ya reset kar sakte hain. Yeh
control word bit-level control provide karta hai.

Yeh control word ka bit structure kuch is tarah hota hai:

 D7 bit: Agar yeh 0 hai, toh iska matlab hai hum BSR mode mein hain.

 D6-D4 bits: Yeh bits generally unused hote hain aur hamesha 0 hote hain.

 D3-D1 bits: Yeh bits decide karte hain ki Port C ka kaunsa bit select karna hai:

o 000 → PC0 (Port C ka first bit).

o 001 → PC1.

o 010 → PC2.

o 011 → PC3.

o 100 → PC4.

o 101 → PC5.

o 110 → PC6.

o 111 → PC7.

 D0 bit: Yeh bit decide karta hai ki selected bit ko set ya reset karna hai:

o D0 = 1 → Selected bit ko set karega (1).

o D0 = 0 → Selected bit ko reset karega (0).

Example Control Words:

1. Mode Set Control Word Example:

 Control Word = 10011010

o D7 = 1 → Mode set kar rahe hain.

o D6 = 0 → Port A output hoga.

o D5 = 1 → Port C ka upper half (PC4–PC7) input hoga.

o D4-D3 = 01 → Group A mein Mode 1 (handshaking) hoga.

o D2 = 1 → Port B input hoga.

o D1 = 0 → Port C ka lower half (PC0–PC3) output hoga.

o D0 = 0 → Group B mein Mode 0 (simple I/O) hoga.

2. BSR Control Word Example:

 Control Word = 00000110

o D7 = 0 → BSR mode mein hain.

o D3–D1 = 011 → PC3 ko select kiya gaya.

o D0 = 0 → PC3 ko reset kiya gaya.

8259A Programmable Interrupt Controller (PIC)

1. Interrupt manage karta hai – 8259A PIC system ke alag-alag devices se aane
wale interrupt requests (IRQs) ko handle karta hai, aur CPU tak pahunchata hai.

2. 8 interrupts handle karta hai – Ek 8259A controller 8 interrupt lines (IRQ0 to

IRQ7) handle kar sakta hai. IRQ0 highest priority par hota hai, IRQ7 lowest.

3. Priority set karta hai – Agar ek saath multiple devices interrupt bhej rahe hain, to
8259A decide karta hai ki kis interrupt ka priority zyada hai aur usko pehle CPU
ko bhejta hai.

4. Interrupt vector bhejta hai – Jab CPU interrupt accept karta hai, to 8259A ek
interrupt vector bhejta hai jo batata hai kaunsa Interrupt Service Routine (ISR)
run karna hai.

5. Interrupt mask kar sakte hain – Interrupt Mask Register (IMR) ke through hum
decide kar sakte hain ki kaunsa interrupt allow hoga aur kaunsa ignore hoga
(disable temporarily).

6. Cascading support karta hai – Agar 8 se zyada interrupts chahiye, to multiple

8259A PICs ko cascade mode mein connect karke 64 interrupts tak handle kar
sakte hain.

7. EOI signal ka use hota hai – Jab CPU interrupt ko process kar leta hai, tab woh
8259A ko End Of Interrupt (EOI) signal bhejta hai, taaki PIC ready ho next
interrupt ke liye.

8. Teen main registers hote hain:

o IRR (Interrupt Request Register) – Jo batata hai ki kaunse interrupts abhi

pending hain.

o ISR (In-Service Register) – Jo track karta hai ki kaunsa interrupt abhi CPU
process kar raha hai.

o IMR (Interrupt Mask Register) – Jo batata hai ki kaunsa interrupt enable

hai aur kaunsa masked (disable) hai.

9. Do mode hote hain:

o Single mode – Ek hi 8259A use hota hai, sirf 8 interrupts ke liye.

o Cascaded mode – Multiple 8259A PICs connect karke 64 interrupts tak

support milta hai.

10. Important pins:

  INT – Ye pin CPU ko interrupt signal bhejti hai.

 IR0 to IR7 – Ye pins external devices se interrupt receive karte hain.

 CAS0–CAS2 – Ye cascading ke time use hote hain jab multiple PICs connected
hote hain.

8259A PIC Pin Description

1 to 8 – IR0 to IR7 (Interrupt Request lines)

 Ye 8 lines external devices se interrupt request receive karne ke liye hoti hain.

 Agar kisi device ko CPU se attention chahiye hota hai, toh wo IR0 se IR7 tak kisi
line ko activate karta hai.

 IR0 ka priority highest hota hai, IR7 ka lowest.

9 – INT (Interrupt Output)

 Jab PIC ko interrupt receive hota hai, toh ye pin CPU ko batata hai ki koi interrupt
pending hai.

 Ye signal CPU tak bhejta hai: “Interrupt aaya hai, handle karo!”

10 – INTA̅ (Interrupt Acknowledge)

 Jab CPU interrupt ko accept karta hai, toh ye pin low pulse bhejta hai PIC ko.

 Iska matlab hota hai: “OK, interrupt mila, batao kaunsa vector chahiye?”

11 – RD̅ (Read, Active Low)

 Jab CPU PIC se data read karna chahta hai (jaise status ya vector), toh is pin ko
low karta hai.

 PIC phir data bus par data bhejta hai.

12 – WR̅ (Write, Active Low)

 Jab CPU PIC me data likhna chahta hai (jaise control word ya command), toh is
pin ko low karta hai.

 Tab PIC command ya settings accept karta hai.

13 – CS̅ (Chip Select, Active Low)

 Jab ye pin low hoti hai, tabhi PIC CPU ke saath communicate karta hai.
  Agar ye high ho, toh PIC disable rahega (inactive).

14 – A0 (Address line)

 Ye pin select karti hai ki kaunsa register access ho raha hai.

o A0 = 0 ➤ IRR ya ISR

o A0 = 1 ➤ IMR ya command register

15 to 22 – D0 to D7 (Data bus lines)

 Ye 8-bit bidirectional data lines hain.

 CPU aur PIC ke beech command words, interrupt vectors ya status info
transfer karne ke liye use hoti hain.

23 to 25 – CAS0, CAS1, CAS2 (Cascade lines)

 Jab aap multiple PICs ko cascade (chain) karte ho (master-slave configuration),

toh in pins ka use hota hai.

 Master PIC batata hai kaunsa slave PIC active hai.

26 – SP/EN̅ (Slave Program / Enable bu er)

 Agar aap non-bu ered mode mein ho:

o SP = 1 ➤ Master mode

o SP = 0 ➤ Slave mode

 Bu ered mode mein ye bu er enable signal ki tarah kaam karta hai.

27 – VCC (Power Supply)

 Ye pin +5V power supply ke liye hoti hai (IC ko chalane ke liye zaroori).

28 – GND (Ground)

 Ye ground reference hoti hai (0V) – har IC ke liye ek base voltage hoti hai.

Short Summary (Easy Recap):

Pin Group Use

IR0–IR7 Devices se interrupt lena

INT CPU ko interrupt batana

Pin Group Use

INTA̅ CPU se acknowledge lena

RD̅ / WR̅ Read/write operation ke signals

CS̅ / A0 Register access control

D0–D7 Data transfer ke liye

CAS0–2 Cascading (master-slave setup)

SP/EN̅ Master/slave ya bu er mode ke liye

VCC / GND Power supply

8259A PIC architecture

1. IRR – Interrupt Request Register

1. IRR ek 8-bit register hai jo IR0 to IR7 lines se aayi interrupt requests ko store
karta hai.

2. Jab bhi koi device interrupt karta hai, us IR line ka bit IRR me automatically set
ho jaata hai.

3. Ye register temporary memory ki tarah kaam karta hai jab tak CPU interrupt
accept nahi karta.

4. IRR ke bits ko directly clear nahi kiya ja sakta – wo tab clear hota hai jab CPU
interrupt accept karta hai.

5. IRR + IMR dono milkar decide karte hain ki actual CPU tak kaunse interrupts
jaayenge.
6. IRR continuously monitored hota hai Priority Resolver ke through.

7. Ye ek important bu er hai jo multiple simultaneous interrupts ko handle karne

me help karta hai.

2. IMR – Interrupt Mask Register

1. IMR bhi ek 8-bit register hai jisme har bit ek IR line se linked hoti hai.

2. Agar kisi bit ko ‘1’ set kiya jaaye, toh us IR line ka interrupt block/mask ho jaata
hai.

3. Iska use user (CPU) karta hai to disable unwanted interrupts.

4. Only unmasked (bit = 0) interrupts hi CPU tak jaate hain.

5. IMR ki value software ke through set hoti hai (OCW1 command word se).

6. Masking temporary hoti hai – user kabhi bhi bit ko 0 karke enable kar sakta hai.

7. IMR help karta hai system ko selective interrupts allow karne me.

3. ISR – In-Service Register

1. ISR ek 8-bit register hai jo batata hai ki kaunse interrupts abhi servicing mein
hain.

2. Jab CPU kisi interrupt ko accept karta hai, toh us IR line ka bit ISR me set ho
jaata hai.

3. Ye register ensure karta hai ki same interrupt do baar trigger na ho jab tak
purana complete na ho.

4. Jab interrupt service complete hoti hai, toh EOI (End of Interrupt) command se
bit clear hota hai.

5. ISR proper interrupt tracking ke liye zaroori hai.

6. ISR ke bina system ko ye nahi pata hota ki kaunsa interrupt already execute ho
raha hai.

7. Ye re-entrant interrupt protection me bhi kaam karta hai.

4. Priority Resolver
1. Jab ek se zyada interrupts active hote hain, toh Priority Resolver decide karta hai
kaunsa pehle milega.

2. Ye IRR, IMR, aur ISR ko dekh kar highest priority active interrupt ko select karta
hai.

3. Default priority: IR0 > IR1 > … > IR7 (IR0 highest).

4. Aap rotating priority bhi set kar sakte ho – jisme har baar priority change hoti hai.

5. Ye block fair interrupt distribution ke liye kaafi useful hota hai.

6. Agar koi interrupt servicing me hai, toh lower priority waale wait karte hain.

7. Ye system ko fast aur reliable interrupt handling dene me help karta hai.

5. Interrupt Control Logic

1. Ye block manage karta hai interrupt signals aur CPU ke signals ke beech
interaction.

2. Jab highest priority interrupt milta hai, toh ye INT line raise karta hai CPU ke liye.

3. Jab CPU INTA̅ bhejta hai, toh ye block decide karta hai kaunsa vector CPU ko
dena hai.

4. Ye control karta hai EOI commands aur ISR bit clearing bhi.

5. Ye block 8259A ka core brain hota hai, jo pura coordination karta hai.

6. Iska kaam hardware aur software ke beech link create karna hota hai.

7. Ye ensure karta hai ki CPU only valid aur unmasked interrupts pe hi response
kare.

6. Data Bus Bu er

1. Ye 8-bit bidirectional bu er hai jo PIC aur CPU ke beech data exchange karta hai.

2. CPU jab command ya data bhejta hai → bu er write mode me hota hai.

3. Jab PIC CPU ko status ya vector bhejta hai → bu er read mode me hota hai.

4. Ye D0 to D7 data lines ke sath connected hota hai.

5. Is bu er ke through hi ICW (Initialization), OCW (Operation Control) bheje

jaate hain.
6. Data bu er handshaking signals ke base pe direction control karta hai (RD̅,
WR̅).

7. Iska role hai data flow safe aur conflict-free rakhna between CPU and PIC.

7. Read/Write Control Logic

1. Ye block control karta hai kaunsa operation perform ho raha hai – read ya
write.

2. Signals RD̅, WR̅, CS̅, aur A0 ko analyze karke operation decide karta hai.

3. Agar WR̅ low hai → PIC me data write hoga.

4. Agar RD̅ low hai → PIC CPU ko data read karake dega.

5. A0 pin decide karta hai kaunsa register access ho raha hai (IMR, ISR, etc).

6. Is logic ka kaam hai internal register selection aur enable control dena.

7. Ye ensure karta hai ki data corruption na ho aur sahi register access ho.

8. Cascade Bu er / Comparator

1. Jab aap multiple 8259 PICs use karte ho (ek master + slaves), tab ye block kaam
karta hai.

2. CAS0, CAS1, CAS2 lines ke through master PIC identify karta hai kaunsa slave
PIC interrupt bhej raha hai.

3. Comparator slave number match karta hai aur usi slave ko activate karta hai.

4. Ye block cascading setup me interrupt routing handle karta hai.

5. 8259A supports up to 8 slave PICs – 64 interrupt lines in total.

6. Cascade bu er ensure karta hai ki correct slave PIC CPU ke sath

communicate kare.

7. Ye structure large systems me expandable interrupt management dene ke liye

zaroori hai.
8259A PIC ke operation
1. CPU sabse pehle 8259A ko initialize karta hai Initialization Command Words
(ICWs) ke through.

2. Initialization mein interrupt vector address, mode (single ya cascade), aur

triggering method set hota hai.

3. External device interrupt karta hai toh wo IR0–IR7 lines me se kisi ek par signal
bhejta hai.

4. Ye interrupt request IRR (Interrupt Request Register) me store ho jaata hai.

5. PIC check karta hai ki IMR (Interrupt Mask Register) me wo interrupt masked hai
ya nahi.

6. Agar masked hai to ignore kiya jaata hai; agar masked nahi hai to aage process
hota hai.

7. Agar ek se zyada interrupts aate hain to priority resolver highest priority interrupt
ko choose karta hai.

8. Selected interrupt ke liye PIC INT line ko high karta hai, jisse CPU ko pata chalta
hai ki interrupt aaya hai.

9. CPU jab ready hota hai to INTA̅ (Interrupt Acknowledge) signal bhejta hai.

10. Pehli INTA̅ signal pe PIC ISR (In-Service Register) me bit set karta hai.

11. Doosri INTA̅ signal pe PIC CPU ko interrupt vector number bhejta hai.
 12. CPU interrupt vector ke according interrupt service routine (ISR) execute karta
hai.

13. Jab service complete ho jaati hai to CPU PIC ko End of Interrupt (EOI) command
bhejta hai.

14. EOI command pe PIC ISR se bit clear karta hai.

15. PIC phir se IRR check karta hai aur agar koi aur valid interrupt ho to usko process
karta hai.

16. Ye poora process bar-bar repeat hota hai jab bhi new interrupt aata hai.

INTERCONNECTION IN CASECADE MODE

Cascading process in 8259A mein, multiple 8259A PICs ko ek saath connect kiya jata
hai taaki zyada interrupt lines handle ki ja sakein. Yeh process tab zaroori hota hai jab
system ko 8 se zyada interrupt lines ki zarurat hoti hai. Is process mein, master PIC
poori system ko manage karta hai, aur slave PICs apne interrupt requests master ko
bhejte hain.

Cascading ka process kuch is tarah se kaam karta hai:

1. Cascading Lines (CAS0, CAS1, CAS2)

CAS0, CAS1, CAS2 woh cascade lines hain jo master aur slave PICs ke beech
communication ke liye use hoti hain.
In lines ki madad se master PIC ko yeh pata chal jata hai ki kis slave PIC se
interrupt request aa rahi hai.
Jab slave PIC interrupt generate karta hai, toh interrupt request master PIC ko
cascade lines ke through bheji jati hai.
Master PIC phir interrupt priority determine karta hai aur appropriate vector
number CPU ko bhejta hai.

2. Slave Interrupt Request Routing

Jab slave PIC interrupt generate karta hai (IR0-IR7), toh yeh request master PIC
ko cascade lines ke through route hoti hai.
Master PIC interrupt signal ko receive karta hai aur interrupt ki priority check
karta hai.
Agar koi higher-priority interrupt already service ho raha ho, toh master pehle
usse handle karta hai, aur agar nahi, toh slave ka interrupt service karta hai.

3. Handling Multiple Interrupts

Master PIC sabse pehle highest-priority interrupt handle karta hai. Yeh wo signal
CPU ko INT line ke through bhej kar karta hai.
Jab master PIC interrupts process kar raha hota hai, toh wo yeh bhi track karta
hai ki kaunsa interrupt kis slave ne generate kiya tha.
 Slave PICs apni interrupt requests bas master PIC ko pass karte hain, aur vector
number sirf master PIC bhejta hai CPU ko, jab woh sab requests evaluate kar leta
hai.

4. Interrupt Vector Calculation

Jab master PIC ek slave se interrupt receive karta hai, toh woh interrupt vector
number calculate karta hai.
Master PIC har interrupt request ko ek priority level assign karta hai. Sabse pehle
highest-priority interrupt service hota hai.
Phir master PIC yeh vector number CPU ko bhejta hai taaki CPU appropriate
interrupt service routine (ISR) ko jump kar sake.

5. Clearing and Managing Interrupts

Jab CPU interrupt ko handle kar leta hai, toh woh master PIC ko EOI (End of
Interrupt) signal bhejta hai.
Master PIC interrupt request ko ISR (In-Service Register) se clear kar deta hai.
Uske baad, master PIC yeh check karta hai ki koi aur interrupt pending hai kya,
aur agar hai toh uske priority ke according process karna start karta hai.

6. Expanding Interrupt Lines

Cascading ka use karne se interrupt lines ki handling capacity kaafi increase ho
jati hai.
Ek master PIC 8 slave PICs ko support kar sakta hai, jisme har slave 8 interrupts
handle karta hai, toh total 64 interrupt lines handle ki ja sakti hain.

Summary:
Cascading process mein, multiple slave PICs ko master PIC se connect kiya jata hai
taaki zyada interrupt lines handle ki ja sakein.
Master PIC sab interrupts ko manage karta hai, highest-priority interrupt ko determine
karta hai, aur interrupt vector ko CPU ko bhejta hai.
Slave PICs apni interrupt requests master PIC ko cascade lines (CAS0, CAS1, CAS2) ke
through bhejte hain, aur master PIC ensure karta hai ki sirf valid aur highest-priority
interrupts service hon.
Yeh process complex systems mein zyada interrupt devices handle karne ke liye kaafi
useful hai.

Key Features of 8253/8254 Programmable Timer/Counter

1. Three Independent Counters:

o Counters (Counter 0, 1, 2): 8253/8254 mein 3 independent counters

hote hain, jo alag-alag tasks ko simultaneously handle kar sakte hain. Har
counter ka apna time interval set kiya ja sakta hai aur har counter apne hi
clock aur mode pe operate kar sakta hai.
2. Programmable:

o Flexible Configuration: Timer/Counter ko di erent modes aur time

intervals ke liye program kiya ja sakta hai. Aap control word register ke
zariye device ke operation ko customize kar sakte hain. Is flexibility ki
wajah se, aapko specific requirements ke hisaab se counter ko configure
karne ki flexibility milti hai.

o Control Word Register (CWR): Yeh register device ke operation ko define

karta hai, jisme mode select karna, counter size set karna aur interrupt
enable/disable karna hota hai.

3. Clock Input:

o Clock Signal Requirement: 8253/8254 ko apna counting operation start

karne ke liye ek clock signal ki zarurat hoti hai. Clock frequency ko set
karke aap timer ke counting rate ko control kar sakte ho.

o Frequency Adjustment: Timer ki counting speed ko adjust karne ke liye

clock input ki frequency ko change kiya ja sakta hai, jisse precise time
delays aur frequency generation achieve kiya ja sake.

4. Control and Status Registers:

o Control Register: Iska use counter ke mode aur settings ko configure

karne ke liye hota hai. Aap is register me mode selection, counting
operation aur interrupt handling set karte hain.

o Status Register: Status register se aap current state of the counter, jaise
ki counter ka value aur interrupt status, ko read kar sakte hain.

5. Output Pin:

o Output Signal: Jab counter apne terminal count (0) par pahuchta hai, to
output pin (OUT) pe signal generate hota hai. Yeh signal ek interrupt
request ya external event ko notify karta hai.

o Pulse Generation: Depending on the mode, output pin pe pulse ya strobe

signal generate ho sakta hai, jo further systems ko synchronize karta hai.

6. Interrupt Capability:

o Interrupt Generation: Jab counter ka terminal count reach hota hai (ya
kisi mode mein), ek interrupt request generate hota hai, jo CPU ko notify
karta hai ki ek specific event ya time delay complete ho gaya hai.

o Interrupt Masking: Aap interrupt enable/disable kar sakte ho, jo counter

ke state ke hisaab se appropriate action leta hai.
 7. Wide Range of Modes:

o Multiple Modes: 8253/8254 mein kai modes available hote hain (Mode 0,
Mode 1, Mode 2, Mode 3, etc.), jo device ko alag-alag tasks ke liye
configure karne ki flexibility dete hain. Aap time delays, frequency
generation, event counting, etc., ke liye in modes ka use kar sakte ho.

8. Programmable Counting Mode:

o 16-bit Counting: 8253/8254 counters 16-bit size ke hote hain, jisme

maximum counting range 65535 tak hoti hai. Yeh large range time
intervals ko handle karne ki capability provide karta hai.

o Down Counting: Counter typically down counting mode mein kaam karta
hai, jo 0 tak count karte hue interrupt generate karta hai.

OR……………………………………………………………………………………………………………OR

8253/8254 Programmable Timer/Counter ek device hai jo time-related operations ko

control karta hai, jaise time delays, event counting, aur frequency generation.

Key Features:

 3 Counters: Counter 0, 1, aur 2, independent operations ke liye.

 Programmable: Time intervals aur modes ko program kar sakte ho.

 Clock Input: Counting operation ke liye clock signal ki zarurat hoti hai.

 Control Word Register: Counter ko configure karne ke liye use hota hai.

 Output: Jab counter terminal count reach karta hai, output signal generate hota
hai.

Modes:

1. Mode 0 (Interrupt on Terminal Count): Counter terminal count pe interrupt

generate karta hai.

2. Mode 1 (Hardware Retriggerable One-Shot): Trigger ke baad ek pulse generate

karta hai.

3. Mode 2 (Rate Generator): Continuous counting aur interrupt generation.

4. Mode 3 (Square Wave Generator): Square wave signal generate karta hai.

5. Mode 4 (Software Triggered Strobe): Strobe pulse generate karta hai.

Applications:

 Time Delays: Specific time ke baad action lena.

  Event Counting: External events ko count karna.

 Frequency Generation: Square wave ya frequency signals generate karna.

Conclusion:

8253/8254 time-sensitive tasks ko e iciently handle karta hai, jo microprocessor

systems mein zaroori hote hain.

What is 8253?
Intel 8253 ek programmable interval timer (PIT) chip hai. Yeh chip counting aur timing
functions perform karta hai microcomputers ke liye, 3 independent 16-bit counters ke
saath. Har counter ke do specific input pins aur ek output pin hoti hai. In counters ko
binary mode mein counting karne ke liye program kiya ja sakta hai. 8253 ke modes
determine karte hain ki counters kaise kaam karenge aur output pin ko bhi regulate
karte hain.

Advantages of 8253:

1. Versatility: Yeh chip 3 independent 16-bit counters o er karta hai jo wide range
of timing aur counting applications ke liye program kiye ja sakte hain.

2. Programmability: Yeh chip programmers ko flexibility deta hai har counter ka

operating mode independently set karne ki, jo various timing aur counting
operations ko generate karne mein madad karta hai.

Disadvantages of 8253:

1. Limited Resolution: 16-bit counters ka resolution modern timers ke comparison

mein limited hota hai, jo kuch applications mein precise timing ki requirement ko
meet nahi kar pata.

2. Complexity: Chips ko program karna complex ho sakta hai, especially un users

ke liye jo inke operation aur modes se familiar nahi hain.

3. Limited Features: Modern microcontroller timers ke comparison mein, 8253

mein advanced features jaise PWM (Pulse Width Modulation) generation aur
input capture nahi hote.

What is 8254 ?
8254 Programmable Timer. The system is particularly used for timing control
applications in di erent microcomputing systems. The timer has 3
independent counters capable of handling the clock inputs up to almost 10 MHz
with a 16-bit size for each counter. The timer can work with the +5V power supply
with 24-pin signals as well.
Advantages

Here are the advantages and disadvantages of 8254 mentioned below.

 Versatility : Both chips o er three independent 16-bit counters that can be

programmed for a wide range of timing and counting applications.

 Programmability : The chips allow programmers to set the operating mode of

each counter independently, providing flexibility in generating various timing and
counting operations.

 Limited Resolution : The 16-bit counters have a limited resolution compared to

modern timers, which may not be su icient for applications requiring very
precise timing.

Disadvantages

Here are the disadvantages mentioned below.

 Complexity : Programming the chips can be complex, especially for users

unfamiliar with their operation and various modes.

 Limited Features : Compared to modern timer peripherals integrated

into microcontrollers, the 8254 lack advanced features such as PWM (Pulse
Width Modulation) generation and input capture.

Applications

Here are the applications of 8254 mentioned below.

 Embedded systems for timing critical tasks

 Event scheduling

 Real-time clock (RTC) functions

 Industrial control systems for timing various processes

 Controlling machinery

 Synchronizing operations
di erence between 8253 and 8254 in table format:
Feature 8253 8254

Basic Function Programmable Interval Timer Enhanced Programmable

Interval Timer

Compatibility Older systems Backward compatible with

8253

Maximum Clock Up to 2.6 MHz Up to 10 MHz

Frequency

Speed Slower operation Faster operation due to

higher clock speed

Read/Write No read-back command Supports Read-back

Operations command

Counting Capability Basic counting More accurate and versatile

counting

Pin Configuration Same as 8254 (24 pins) Same as 8253 (24 pins)

Data Bus Width 8-bit data bus 8-bit data bus

Power Consumption Higher Lower (more e icient design)

 Used In Early microprocessor Modern systems (8086, PC-
systems (e.g., 8085) based systems)

Mode of Operation Modes 0 to 5 Same modes 0 to 5 with

added features

Availability Becoming obsolete Still used due to extended

capabilities

Summary:

 8254 is an improved version of 8253 with higher clock support and advanced
features like read-back command, while both are functionally similar and pin
compatible.

Would you like a downloadable table or diagram of this too?

8253/8254 Pin Configuration - Detailed Explanation

1. Pin 1: GND (Ground Pin)

 Function: This pin is the ground pin, which is essential for completing the
electrical circuit of the IC. All signals must be referenced to this ground.

 Connection: Connect this pin to the system ground (0V).

2. Pin 2: CLK (Clock Input)

 Function: This is the clock input for the timer. The clock frequency controls the
rate at which the timer counts.

 Operation: The timer counts up or down depending on the clock signal

frequency. A stable clock source must be supplied to this pin for proper timing.

 Connection: Typically, an external clock signal is fed here, or it is derived from

the system clock.

3. Pin 3: A0 (Address Line 0)

  Function: This is one of the address lines used for selecting which timer or
control register is being accessed. It helps the processor select the right timer or
register when programming the 8253/8254.

 Operation: A0 works with A1 to select one of the timers (Timer 0, Timer 1, or

Timer 2) and its associated control register.

4. Pin 4: /CS (Chip Select)

 Function: This is the chip select pin, used to enable or disable the chip. When
the /CS pin is low (0), the chip is selected, and the processor can communicate
with the 8253/8254.

 Operation: If /CS is high (1), the 8253/8254 is disabled, and it will not respond to
any read or write operations.

5. Pin 5: /WR (Write Control)

 Function: This is the write control pin, used to indicate that data is being written
to the 8253/8254.

 Operation: When low (0), this pin tells the 8253/8254 that the processor is
writing data to a control register or data register of the selected timer.

 Connection: When writing data to a register, the /WR pin is activated (pulled
low).

6. Pin 6: /RD (Read Control)

 Function: This is the read control pin, used to indicate that data is being read
from the 8253/8254.

 Operation: When low (0), this pin tells the 8253/8254 that the processor is
reading data from the control register or data register of the selected timer.

7. Pin 7: A1 (Address Line 1)

 Function: A1 is another address line, and it works in conjunction with A0 to

select which of the three timers (Timer 0, Timer 1, or Timer 2) is being accessed.

 Operation: This pin helps address the timer and its associated control or data
register by working together with A0.
8. Pins 8-15: D0 to D7 (Data Bus)

 Function: These are the 8-bit data lines used to transfer data between the
processor and the 8253/8254.

 Operation:

o Write: When the processor writes data to the selected timer or control
register, it sends data through these pins.

o Read: When the processor reads data from the selected timer or control
register, data is sent back through these pins.

 Connection: These are standard data bus pins for communication.

9. Pin 16: /OUT (Timer Output)

 Function: This is the output pin for the selected timer. When the timer counts
down to zero, the output is activated.

 Operation:

o In Mode 0, the pin generates a pulse to indicate the timer has expired.

o In Mode 3, the output is a square wave signal, depending on the timer's

settings.

 Usage: This pin can be used to trigger interrupts or external devices when the
timer reaches its terminal count.

10. Pin 17: GATE (Gate Control)

 Function: The GATE pin controls the operation of the timer. It enables or disables
the counting of the timer.

 Operation:

o When high (1), the timer operates normally, counting based on the clock
signal.

o When low (0), the timer stops counting, e ectively pausing the operation.

 Usage: The GATE pin can be used to control when the timer starts or stops,
typically with external signals like a trigger or interrupt.
11. Pin 18: /INT (Interrupt)

 Function: This pin generates an interrupt signal when the timer reaches zero,
indicating that the programmed time interval has elapsed.

 Operation: When the timer counts down to zero, and if interrupts are enabled,
the /INT pin goes low (0), signaling the processor to handle the interrupt.

 Usage: This pin can be connected to the interrupt system of the processor to
trigger interrupts when the timer completes its countdown.

12. Pin 19: CLK (Clock Input for Timer 2)

 Function: This is the clock input for Timer 2.

 Operation: Like the clock input for Timer 0 and Timer 1, this pin provides the
clock signal to Timer 2 for counting.

 Connection: An external clock signal is fed into this pin to drive Timer 2's
counting operation.

13-15. Pin 20-22: OUT (Timer Output)

 Function: These are the output pins for the three timers (Timer 0, Timer 1, Timer
2). Each timer has its own output pin to indicate when its count has completed.

 Operation:

o Timer 0: Pin 20

o Timer 1: Pin 21

o Timer 2: Pin 22

o In all modes, these pins generate pulses or square wave outputs

depending on the timer's mode.

16. Pin 23: Vcc (Supply Voltage)

 Function: This is the power supply pin for the 8253/8254.

 Connection: It is connected to a positive voltage (typically +5V) to power the IC.

Proper voltage must be supplied for the IC to function correctly.
17. Pin 24: RESET (Reset Pin)

 Function: This pin is used to reset the 8253/8254 timers.

 Operation: When a high signal is applied to the RESET pin, all the timers are
reset to their initial state, and their counts are cleared.

 Usage: This is used to restart the timer or initialize the 8253/8254 after a
malfunction or during the initial startup.

Summary

The 8253/8254 timer has a variety of pins to control and manage time-based operations
in a system. The key functionality revolves around clock signals (CLK), enabling or
disabling the timers via GATE, generating outputs (OUT), and generating interrupts (INT).
The chip allows external systems to be precisely controlled based on time intervals.