design

Edited by Bill Travis and Anne Watson Swager

ideas
Scheme cancels amplifier error
David Magliocco, CDPI, Scientrier, France
he circuit in Figure 1, using a low-

T offset amplifier, is a basic ohmmeter

circuit common in multime-
ters, except for the addition of the
Figure 1
5V

5V
two diode-connected transistors. A cur-
IM 1.21M
rent source supplies a selectable current 3 +
6 VOUT
ranging from 100 nA to 1 mA to RX. An 1.21M 2 OP97
1
A/D converter with a 400-mV reference
voltage reads the voltage drop across RX. 15V
RX
Manufacturers of handheld DMMs lim-
it IM to 1 mA to save battery power. So, 180k
to measure resistance lower than 40V
with 10-mV resolution, you need to am-
plify the voltage drop across RX by 10 BC847

times to fully use the ADC’s dynamic BC847

range. For high-precision measurements,
you need a low-offset, high-input-im-
pedance amplifier. The moderate-power 20k
OP97 from Analog Devices is a good
choice. Because the OP97’s inputs have
back-to-back diode protection, differen-
tial input voltages greater than 1V cause
current to flow through the diodes, caus- The addition of two diodes in the feedback loop prevents excessive input current in the OP97.
ing measurement errors. For example, er-
rors can occur when you try to
measure a high value of RX, say a Figure 2
few megohms, with a wrong value of IM.

Scheme cancels amplifier error................159

Serial port provides interrupts
for 8031 mC ..................................................160
ADC-to-PC interface transfers
data in nibbles..............................................162
Matched offsets put signals
into ADC’s range..........................................164
Amplifier compensates
piezoelectric-rate gyros ..............................166
Digital camera subs
as a scope camera ......................................168
MOSFET pair makes
simple SPDT switch ....................................168
Motor controller operates
without tachometer feedback ..................170
Without the diodes in Figure 1, the amplifier saturates, and current flows in the differential inputs.
[Link] December 9, 1999 | edn 159
design
ideas
Not all the measurement current goes to
RX, so the converted value is in-
accurate. Figure 3
Figure 2 shows VOUT and the current
that goes into the noninverting input of
the OP97 (without the diode-connected
transistors), configured for a gain of 10,
for input voltages as high as 2V. For VIN
greater than 1V, the leakage current be-
comes non-negligible in comparison
with the lowest values of IM. A simple way
to limit the leakage current is to limit the
gain of the amplifier for high input volt-
ages. To prevent the differential input
voltage from exceeding 1V, you can re-
duce the gain by limiting the voltage
across the feedback resistor. When that
voltage reaches approximately 0.8V, for
example for IMRXQ10 mV, the two
diode-connected transistors start to con-
duct and limit the gain. Transistors are
better than signal diodes because they The diodes in Figure 1 prevent the amplifier from saturating, so the input current remains negli-
have lower leakage current at low volt- gible with respect to IM.
ages. Low leakage current is critical in
avoiding additional errors when reading inverting input of the OP97 for input comparison with IM. (DI #2447)
the output of the OP97. Figure 3 shows voltages as high as 2V in the circuit of To Vote For This Design,
VOUT and the current that enters the non- Figure 1. The leakage remains low in Circle No. 301

Serial port provides interrupts for 8031 mC

N Kannan, Mediatronix Ltd, Trivandrum, India
ou can use the RxD pin of an 8031

Y mC for external interrupts

(Figure 1). You program the
serial port to receive in Mode 2 with a
1 1
Figure 1

IN
EDGE-TRIGGER
1
ONE-SHOT
2 74LS221
Q1 RxD
baud rate either /32 or /64 of the oscilla- T T'FIVE BIT PERIODS
tor frequency, depending on the SMOD
bit in the PCON register. In serial mode,
the start bit should be a zero, and the stop You can use the serial port of an 8031 mC to generate interrupts.
bit should be a one for a valid reception.
The mC generates the interrupt upon re- the 8031 enters serial-reception mode [Link] can use the rising edge
ception of a low start bit, nine data bits, and generates an interrupt after 10 bit pe- at Q1 to trigger a second one-shot and
and a high stop bit; the interrupt occurs riods. The only disadvantage of the then use the output of the second to clear
at the end of reception. The one-shot method is that at least 10 bit periods the first one-shot. This action forces Q1
multivibrator in Figure 1 provides a low should occur between interrupts. Also, to a high state for five to six bit periods to
pulse (the start bit) to the RxD input with you should use the mC’s ISR pin to reini- ensure a high stop bit. (DI #2441)
a width greater than one bit period; for tialize the controller for the next inter-
example, four periods. The bit period de- rupt. If you can’t guarantee the mini-
pends on the baud rate. Whenever an ex- mum period between interrupts, then To Vote For This Design,
ternal signal edge-triggers the one-shot, you can use a dual 74LS221 one-shot Circle No. 302

160 edn | December 9, 1999 [Link]

 design
ideas
ADC-to-PC interface transfers data in nibbles
DS Oberoi, Jammu, India
he circuit in Figure 1 uses a Cen- multiplexer address inputs, A0 through 1 byte of data. The circuit uses the fifth

T tronics printer port to interface an

eight-channel, 8-bit ADC to a PC.
The circuit cuts the cost of addressing
A2, for the channel selection. The level at
the INT pin of IC2 indicates the status of
the conversion process. A low level at INT
input bit, which is the D_Rdy signal, to
check the conversion status of IC2.
VREF1 and bypass capacitors C1 and C2
and decoder circuitry and saves one ex- indicates that conversion process is over connect to a 5V input supply, which re-
pansion slot for interfacing. The design and that the converted digital data is sults in a full 0-to-5V conversion. A 7805
uses three of the subport’s various signals available. The INT pin interfaces to the regulator (not shown) generates VCC.
as control signals for channel selection, port through the D_Rdy signal. The cor- The accompanying C program works
handshaking, and data transfer to the responding software repeatedly samples satisfactorily and can scan all the chan-
MAX158 ADC. These signals are pro- this line to check its status. When D_Rdy nels one after the other and print the
grammable by means of a bit position in is low, the PC reads the converted digital converted data on the screen. You can
the control word of the respective port. data through IC1. download the program from EDN’s Web
Two signals, P_Slct1 and P_Slct2, when Only five input lines to the printer port site, [Link]. Click on “Search
high and low, respectively, select the are available, so the 8-bit data transfer oc- Databases” and then enter the Software
MAX158 ADC. This arrangement over- curs in two nibbles from IC1. The higher Center to download the file for Design
comes any accidental-selection problem, or lower nibble is available when IC1’s Pin Idea #2448. (DI #2448)
which can happen when you use a single 1 or Pin 19 is low, respectively. Under the
select bit. A falling edge at the RD and CS control of the N_Slct signal, only one of
pins of the MAX158 initiates a conver- these pins is low at once. The software To Vote For This Design,
sion, and the read operation latches the then combines two nibbles to complete Circle No. 303

25
A0
6
24 IC2
A1 MAX158 CH1
5
Figure 1 23
A2
CH2
4
CH3
D0 3 19 3
2Y4 2G CH4 INPUT
D1 5 1 2 CHANNELS
2Y3 IC1 1G CH5
D2 7 1 ONE TO
P1 2Y2 74LS244
D3 9 17 8 CH6 EIGHT
2Y1 2A4 D0 28
D4 12 15 9 CH7
2A3 D1
1 A0 1Y4 13 10 27
D5 14 2A2 D2 CH8
14 A1 1Y3 11 11
D6 16 2A1 D3 VCC (5V)
1Y2 8
D7 18 19
1Y1 1A4 D4
D_Rdy 6 20 VDD 26
15 1A3 D5
3 P_S1ct1 4 21 C1
1A2 D6 + C2
A2 2 22 16 47 mF
16 1A1 D7 VREF+
16V 0.1 mF
DATA_LOW 13
INT
17 N_S1ct DATA_HIGH 12
74LS32 RD VREF2 15
9 18
8 CS GND
10
14

CONNECTOR DB25 74LS04 74LS32

12
11
3 4 13

74LS32
5
P_S1ct2 D_RDY 6
9 4

D6, D2 74LS04
10 74LS32
1 2 1
3 ADC_S1ct
D7, D3 2
11
24
12 D5 , D1
25
13 D 4, D 0

Only five input lines to the printer port are available, so the 8-bit data transfer from the ADC to the PC occurs in two nibbles from IC1, under the con-
trol of the N_Slct signal from the PC.

162 edn | December 9, 1999 [Link]

 design
ideas

Matched offsets put signals into ADC’s range

Michael Petersen, Iowa State University, Ames, IA
he circuit in Figure 1 measures a matched current sources and the 10-kV cuit to maintain accuracy even in the

T voltage that is negative with respect

to the system’s ground point. The
constraint is that the a single supply pow-
matched resistors create this offset. This
scheme provides a positive offset of ap-
proximately 1V with a reasonable tem-
presence of these mismatches. To adjust
for offset, apply zero current and instruct
the ADC to perform the system-offset
ers the ADC, and its ground point is fixed perature coefficient. Because the ADC calibration. To perform gain calibration,
relative to the measured voltage. A sim- measures a differential voltage, the exact apply a current that corresponds to full
ple current source and matched resistor offset is unimportant as long as both legs scale and instruct the ADC to perform
set provide the necessary offset to bring have the same offset and remain the system-gain calibration. You can ob-
the voltage within the ADC’s common- matched. For this application, 1V is an tain these calibration values, store them
mode range. adequate offset because the maximum in the mC, and then send them to the
This circuit was designed for measur- current expected to flow through the ADC upon subsequent power-ups, elim-
ing the current from a set of power track- shunt is only 10A, which equates to a inating the need for calibration on every
ers on the Iowa State University Solar Car, maximum differential voltage of only power-up.
the PrISUm Phoenix. The power trackers 0.1V. You can easily modify this offset for The diode across the current shunt
provide impedance matching between other current-and-shunt-resistor combi- passes any high-current transients when
the solar array and the main electrical bus nations by selecting different resistor val- you apply the power source. In the orig-
on the car. Because the current shunt for ues for the matched resistor pair. Take inal design, this feature was necessary to
the power trackers is on the low side and care not to make the resistance values too pass the high-current surge that charged
the ground reference point is on the elec- high because high values may cause set- the power tracker’s output capacitors
trical-system side of the shunt, the volt- tling-time errors on the ADC’s input. when the power trackers switch into the
age is normally negative with respect to Suitable ADCs for this circuit are the system. Without the diodes, this surge de-
the system ground. AD7705 (Analog Devices) and the stroyed the current shunt. Depending on
The current to be measured flows ADS121x (Burr-Brown Corp). These the application and the size of the current
through the 0.01V shunt. Because the ADCs provide system-calibration capa- shunt, these diodes may be unnecessary.
voltage is negative with respect to the sys- bilities that let you easily correct for slight (DI #2450)
tem ground, you must add an offset to mismatches in the current sources and
place the signal within the common- resistors. The system-gain- and system- To Vote For This Design,
mode range of the ADC. The REF200 offset-correction features enable the cir- Circle No. 304

Figure 1 IIN

5V
5V
1 mF

100 mA

0.01 10k 100 mA

VDD
REF200
MATCHED RESISTOR SET (BURR-BROWN)
(CADDOCK T912) I/O
AIN1+
ADC
AIN12 I/O
IOUT

GND

A simple current source and a matched resistor set provide the necessary offset to bring the voltage within the ADC’s common-mode range.

164 edn | December 9, 1999 [Link]

 design
ideas

Amplifier compensates piezoelectric-rate gyros

Jim Mahoney, Linear Technology Corp, Milpitas, CA
ow-power, low-cost ceramic pi- dynamics of this system, but 10 to 50 C1 should be a good low-leakage type,

L ezoelectric rate gyros are available,

but they lack the low-temperature-
coefficient characteristics of their quartz
times the lowest frequency of interest is
a good starting point. The dc-level drift
occurs at a slow rate and hence appears
such as polystyrene, Teflon, or
polypropylene. A Mylar capacitor com-
promises the integrator’s performance.
counterparts. However, you can use a ser- to be a valid response. However, the rate- The gyro and its amplifier can be some
vo amplifier to remove the dc level shift gyro amplifier also passes some frequen- distance from the main processing cir-
due to temperature-related drift effects cies above the set frequency. (The corner cuit, and cable capacitance can cause
(Figure 1). The original application of frequency of the highpass filter depends many op amps to oscillate. However, the
these small, rugged gyros was for damp- on what the circuit is controlling.) LT1368, IC2B, at the output can drive ca-
ing video-camcorder jitter, but these de- Amplifier IC1A and its servo-driver ble capacitance without stability prob-
vices suit many other applications, in- stage, IC1B, comprise a low-power op lems. The LT1368, IC2A, also serves to
cluding camera-platform stabilization, amp. The servo controlling the dc level drive a filter capacitor to provide a low-
radio-controlled-airplane- and helicop- ac-couples, or highpass-filters, the gyro’s noise 1/2V reference point for the LT1495
ter-rate-damping-control assistance, re- output by forcing the output of IC1A to servo driver. (DI #2453)
motely piloted vehicles, and computer- swing around V42. The lowest frequen-
mouse motion sensors. cy that the circuit passes is a function of
By setting the time constant of the ser- the C1/R1 time constant. The maximum
vo loop in Figure 1, the circuit responds value of R1 depends on the minimum in-
at an appropriate low frequency for the put bias current of the op amp, which is To Vote For This Design,
system under control. The time constant 250 pA for the LT1495. If space permits, Circle No. 305
you use for the servo loop depends on the

Figure 1
2 200k

4 200k 10k
6
2
IC1B 7 5
GYRO +
LT1495 IC2B 7
(TOKIN_CD_16C1) 4.7 mF 5 + LT1368 GYRO_AMP_OUT
6
R1 2
1M
V+/2 100k C1
3 4.7 mF

0.1 mF
V
2
2
1 IC1A
+ LT1495 3
2.2 mF +

0.01 mF 4.99k V/2

3
+
IC2A 1
LT1368
0.01 mF 2
4.99k 2
0.1 mF

Servo amplifier IC1A removes the dc level shift due to temperature-related drift effects of a piezoelectric-rate gyro.

166 edn | December 9, 1999 [Link]

design
ideas
Digital camera subs as a scope camera
Allen Moore, Redmond, WA
digital camera can be a handy

A substitute for an oscilloscope

camera for older scopes that
cannot output hard copy or digital data.
Figure 1

A digital camera provides instant results

and allows you to easily enhance the im-
age and then add it to reports or Web
pages.
If the scope has an illuminated grati-
cule, turn up the illumination. A tripod
is useful for repeated shots but is other-
wise unnecessary. Position the camera
and adjust the camera’s zoom so that the
oscilloscope screen fills the picture. Ad-
just lighting and position to minimize re-
flections.
After you take the picture, transfer it to
a PC. You can then use an image-editing If you use an old oscilloscope lacking hard-copy- or digital-output capability, you can use a digital
program to crop, rotate, and otherwise camera to capture, save, and annotate the oscilloscope image
enhance the photo as necessary. To add
annotations, such as text and arrows, to verse the result: Change the white to black next step is cropping the resulting JPEG
the image, you can import the image into and the black to white. This procedure re- image using Microsoft Photo Editor 3.0
a drawing program, although some im- sults in sharp, dark lines for the oscillo- and then applying a reverse effect to swap
age-editing programs offer this capabili- scope traces against a light-gray back- the black and white tones. Finally, im-
ty as well. You can then print the final im- ground. Some digital cameras have a porting the image to Micrografx Win-
age, insert it in a document, or add it to monochrome mode. dows Draw 6.0 allows you to add anno-
a Web page. The image in Figure 1 illustrates the tations, such as in the figure. (DI #2452)
For output to monochrome devices, results of this procedure in capturing a
such as a black-and-while printer, it can timing measurement using a Sony Ma-
be advantageous to first convert the col- vica MVC-FD7 camera set to mono- To Vote For This Design,
or image to monochrome and then re- chrome mode. After image capture, the Circle No. 306

MOSFET pair makes simple SPDT switch

Howard Chen, Vishay Siliconix, Santa Clara, CA

ith an n-and p-channel MOS- Si4501DY MOSFET in this topology ex- turning the n-channel MOSFET on.

W FET, you can easily implement a

single-pole double-throw (SPDT)
switch to isolate part of a circuit and
hibits less than a 0.1V drop at 5A for the
main element and contains both MOS-
FETs in an SO-8 package.
Pulling the gate of the p-channel MOS-
FET above the source potential has no ef-
fect; the MOSFET remains off with low
power it from a secondary supply for When the 2N7002 or similar control leakage.
standby operation while the rest of the MOSFET ties the gates together and pulls The resultant switch is a break-before-
circuit is off (Figure 1). By using a com- them to ground, the p-channel MOSFET make configuration, which is necessary
plementary pair, you can use a single con- is on. Pulling the gates above the supply to ensure that the secondary, or always-
trol input for the MOSFETs. An rail by turning the 2N7002 off results in on, supply never has to power the whole

168 edn | December 9, 1999 [Link]

design
ideas
12V
circuit. However, due to the fast switch- Si4500DY OR Si4501DY
ing of the MOSFETs, extra ca-
Figure 1
pacitance beyond normal design
rules is probably unnecessary to main-
MAIN
tain the operating voltage. SUPPLY
The arrangement of the n-channel de-
vice in the circuit ensures that the inter-
nal diode does not conduct while the
subcircuit is isolated. In this direction,
SECONDARY
the n-channel MOSFET also provides a SUPPLY
fail-safe path for the circuit’s power
through the diode. The forward voltage LOAD

of the p-channel MOSFET’s diode blocks

any current from “back-feeding” the sec-
ondary supply, assuming that the two
supplies are close in voltage. CONTROL

An example of an application for this 2N7002

circuit is the Advanced Configuration
and Power Interface in desktop comput- (a)
ers providing instant-on and low power
consumption in standby. The main pow- ALWAYS-ON
er supply is a high-power switching pow- SUPPLY

er supply, and the secondary supply is a

60-Hz transformer with linear regula-
tion. (DI #2451) MAIN
SUPPLY
ALWAYS-ON
CONTROL CIRCUIT
MAIN
CIRCUIT

(b)

An n- and p-channel MOSFET pair comprises a break-before-make, single-pole, double-throw

To Vote For This Design,
switch (a). The switch isolates part of a circuit and powers it from a secondary supply during stand-
Circle No. 307
by operation when the rest of the circuit is off (b).

Motor controller operates

without tachometer feedback
Bruce Trump, Burr-Brown Corp, Tucson, AZ
peed controllers have long ex- Control voltage VIN sets the speed, and rent-sense resistor, RS. The circuit filters

S ploited the reverse-EMF character-

istics of dc motors to control their
speed. These linear driver circuits use
IC1, Q1, and R3 convert VIN to a 0- to 200-
mA current. The current source controls
the duty cycle of the PWM driver, IC2, at
and scales the voltage across the sense re-
sistor to provide positive feedback to the
input circuitry through R2. With the
power op amps to create a negative re- Pin 3. D1, D2, and R5 prevent the circuit proper amount of positive feedback, an
sistance drive to the motor that counter- from pulling the control input too low, increase in motor load increases motor
acts the voltage drop in the motor’s series which can cause an inversion in the con- current, which increases duty-cycle drive
resistance (Reference 1). The circuit in trol loop. to maintain constant speed.
Figure 1 shows an implementation of Motor current flows through the in- The equation of speed balance is
this type of speed control using a PWM ternal switching transistor in IC2 out the  R1   V+ 
drive, which reduces power dissipation in common terminal and through the cur- IM (R M + R S ) = IMR S   .
 R1 + R 2   R 3 × 200 µA 
the drive circuitry.
170 edn | December 9, 1999 [Link]
design
ideas
This model neglects losses in the 10 TO 60V

switching circuitry of IC2. De-

pending on supply voltage, such Figure 1 10 mF
TANTALUM
losses may significantly affect the re-
quired feedback. Unlike the power op `
IN40001 DC
amp implementation of the scheme, the MOTOR
absolute supply voltage affects this com- 1 5
EMF
pensated PWM controller. The voltage
lost in switching is not truly resistive and DRV101
6
PWM
can be tricky to model. In practice, you IC2
4.5 TO 36V
can optimize the speed control by ad- 3 4
justing the positive feedback control at R5
1k
R4. With proper adjustment, motor speed
D1 D2
remains relatively constant with sub-
0 TO 200 mA
stantial changes in load. Although less ac- 1
221N4148
curate than true closed-loop tachometer- VIN R1
IC1
OPA237 Q1
feedback controllers, this low-cost ` 2N7000
technique provides a dramatic improve- 470k 10k

ment over simple voltage drive. (DI R3

1k
R2
#2449) R4
20 nF
RS
10k 1
15k
Reference
1. Burr-Brown Applications Bulletin
AB-152
To Vote For This Design, Positive feedback derived from current-sense resistor RS increases the duty-cycle drive from PWM
Circle No. 308 controller IC2 to compensate motor speed with varying loads.

Circle 11 or visit [Link]/[Link]

172 edn | December 9, 1999 [Link]