Neuromorphic Computing Insights
Neuromorphic Computing Insights
Volume 9 Issue 3, May-Jun 2025 Available Online: [Link] e-ISSN: 2456 – 6470
Neuromorphic Computing
Tripti R Kulkarni, Nandan P, Monisha S. S
ECE Department, Dayananda Sagar Academy of Technology and Management, Bengaluru, Karnataka, India
Figure 2: Two types of memristors that could be used in neuromorphic systems [Chua1971,
WSP:Williams].
Figure 4: A von Neumann or traditional architecture from the computer science perspective
Open Issues
Neuromorphic computing includes researchers in fields such as neuroscience, computing, computer and electrical
engineering, device physics, and materials science. The focus of the workshop was to identify the major questions
from a computing perspective of neuromorphic computing or questions that can be addressed primarily by
computational scientists, computer scientists, and mathematicians and whose solutions can benefit from the use of
high-performance computing (HPC) resources.
Figure 7: Levels of abstraction in biological brains and what functionality they may allow
[WSP:Aimone].
LITERATURE REVIEW dynamics, enabling multi-state memory and leaky
[1] This paper introduces an in-memory integrate-and-fire neuron behavior. When integrated
neuromorphic computing (IMNC) chip that supports a into a spiking neural network, the system achieves up
hybrid topology of spiking and artificial neural to 90% accuracy on the MNIST dataset, showcasing
networks (S/ANNs). The chip features a ring-based potential for energy-efficient neuromorphic
architecture optimized for sparse data flows, computing. IEEE Resource Center.
achieving high energy efficiency and accuracy. [3] This research explores the integration of photonic-
Experimental results demonstrate over 95% accuracy electronic resonant tunneling diode (RTD) neurons
in tasks like voice activity detection and ECG with spiking flip-flop memory for neuromorphic
anomaly detection, with a dynamic energy computing. The proposed system utilizes spike-
consumption of 0.43 pJ per synaptic operation. encoded information processing, leveraging the high-
[Link]. speed and low-power characteristics of RTD devices.
[2] This work presents multilayer spintronic devices This approach aims to enhance the performance and
that function as both synapses and neurons in efficiency of neuromorphic systems.
neuromorphic systems. The devices exhibit discrete [4] Yang discusses the use of integrated memristor
resistance states due to magnetic domain wall networks to address the challenges of higher-
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neural network models on memristor-based hardware
for edge computing applications.
[16],[17],[18] This paper presents FGMSVM with
one-against-one and maximum voting, using K-means
clustering for noninvasive cardiovascular disease
screening. It also explores a deep learning method for
detecting five arrhythmia types via PPG and surveys
approaches for noninvasive fetal oxygen saturation
measurement using PPG.
Fig 1.1.2: Neuron & Synapse Modeling
[19],[20] This research presents a novel method to
modify the current VCO for adjustable output voltage
levels and develops an OP-AMP circuit using 22 nm
FinFET technology with high-k gain for improved
performance.
METHEDOLOGY
Spiking Neural Network (SNN) Architecture
Neuromorphic computing systems emulate the brain
by using Spiking Neural Networks (SNNs), which
process information through discrete spikes, closely
resembling biological neural activity. This approach
enables low-power, event-driven computation and Fig 1.1.3: Event-Driven Communication
offers improved temporal dynamics compared to
traditional neural networks. Neurons activate only
when input exceeds a threshold, communicating via
timed spikes, ensuring energy is used only by active
components. A notable example is IBM’s TrueNorth
chip, which simulates over one million neurons and
256 million synapses for tasks such as visual and
pattern recognition.
Neuron and Synapse Modeling
Neuromorphic chips are composed of artificial
neurons and synapses designed to replicate key Fig 1.1.4: Hardware Implementation
biological functions, enabling complex learning,
memory, parallelism, and adaptability-fundamental to
bio-inspired intelligence. Neurons integrate incoming
spikes and generate outputs, while synapses adjust
signal strength based on learning rules such as Spike-
Timing Dependent Plasticity (STDP). These
functionalities are implemented using digital, analog,
or mixed-signal circuits. A notable example is Intel’s
Loihi chip, which supports real-time, on-chip learning
through programmable synaptic plasticity.
Fig 1.1.5: Neuromorphic Brain Fusion
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International Journal of Trend in Scientific Research and Development @ [Link] eISSN: 2456-6470
Fig 1.1.1: SNN Architecture and Fig 1.1.2: Neuron & energy efficiency by triggering computation only
Synapse Modeling illustrate the core components of during events. Hardware implementations using
Spiking Neural Networks (SNNs), where neurons digital, analog, or mixed-signal circuits replicate
communicate via asynchronous spikes, mimicking neuron and synapse behavior for real-time, on-chip
biological brain activity. Neurons fire when a learning. Lastly, Fig 1.1.5: Neuromorphic Brain
threshold is reached, and synapses adjust their strength Fusion and Fig 1.1.6: Neuromorphic Computing
based on learning rules like Spike-Timing Dependent highlight the integration of neuromorphic systems into
Plasticity (STDP), enabling real-time adaptation. Fig practical applications like pattern recognition and
1.1.3: Event-Driven Communication and Fig 1.1.4: decision-making, demonstrating the potential of bio-
Hardware Implementation shift focus to the event- inspired, energy-efficient computing.
driven nature of neuromorphic systems, ensuring
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In neuromorphic computing, there is a trade-off between biological realism and computational efficiency. Models with high biological realism, such as Hodgkin-Huxley, attempt to mimic the complexity of biological neurons in detail, leading to high computational costs . Conversely, simpler models like McCulloch-Pitts prioritize computational efficiency but at the expense of biological accuracy . The choice of model depends on the system's goals; for biologically realistic simulations, more detailed models are appropriate, whereas for creating computationally efficient systems, simpler models suffice .
Advancing the field of neuromorphic computing requires interdisciplinary collaborations among neuroscience, computer science, electrical engineering, materials science, and device physics . These collaborations are essential to overcoming the complex challenges of mimicking biological systems, designing efficient architectures, and creating scalable, robust hardware. Neuroscience provides insights into brain functionality, guiding the development of computational models. Material scientists and physicists contribute to advancing device technology, such as memristors, to enable more efficient synaptic models. Engineers and computer scientists work on integrating these insights into practical, deployable systems . Such cooperation ensures that developments are holistic and grounded in both biological accuracy and computational feasibility .
Memristors contribute to neuromorphic computing by acting as both synapses and neurons due to their ability to retain information without power (nonvolatile) and exhibit locally active behaviors (active memristors). They enable multi-state memory and leaky integrate-and-fire neuron behavior, allowing efficient synaptic weight implementation and enabling dense, scalable architectures . By using memristors, neuromorphic systems can achieve energy-efficient, highly parallel computations that closely mimic biological neural networks, offering advantages like lower power consumption and increased learning capabilities .
"Event-driven" computation in neuromorphic systems refers to a processing paradigm where computation is triggered by events, such as spikes in neural networks, rather than being continuously active . This approach allows neuromorphic systems to operate in a low-power state, only consuming energy when necessary, enhancing efficiency and reducing overall power consumption. Such systems can adapt more flexibly to dynamic workloads and process data in real-time . The impact of this approach is significant, particularly in applications where power efficiency and responsiveness are critical, such as in portable devices and embedded systems .
Challenges in integrating neuromorphic systems into practical applications include managing the variability and non-linearity inherent in devices like memristors and developing efficient computation models that balance biological realism and computational load . Researchers are addressing these challenges by exploring new materials and device architectures to improve stability and performance, and by designing hybrid computational models that integrate spiking and artificial neural networks, achieving higher accuracy and energy efficiency . Strategies such as using photonic-electronic systems and advanced learning algorithms are also being developed to bridge the gap between biological systems and practical computational needs .
Potential applications of neuromorphic computing include artificial intelligence, robotics, visual prostheses, pattern recognition, and decision-making tasks . These systems offer advantages over traditional computing by being more energy-efficient due to their event-driven nature, enhancing real-time learning and adaptability, and achieving parallel processing similar to biological brains . They enable low-power operations, making them suitable for portable and embedded systems where power efficiency is critical .
Neuromorphic systems mimic biological learning processes by using spiking neural networks (SNNs) and implementing synapse plasticity models based on observed neural behavior, such as Spike-Timing Dependent Plasticity (STDP). Key technologies involved include memristors, which emulate synaptic functions due to their ability to retain memory states over time without power and can be used to implement STDP and other learning functions in hardware . Chips like Intel's Loihi and IBM's TrueNorth are designed to automate learning at the hardware level by incorporating real-time synaptic adaptation . These innovations allow neuromorphic systems to adapt and learn from their environment in ways akin to natural neural networks. .
Neuromorphic computing systems address energy efficiency issues by utilizing co-located memory and processing units that minimize data movement, an event-driven architecture that only consumes power during active data processing, and hardware specifically designed to mimic the energy-efficient processing of the human brain . These systems often employ spiking neural networks (SNNs), which activate neurons only when necessary, significantly reducing energy consumption compared to traditional models that require continuous processing . Custom hardware like IBM's TrueNorth and Intel's Loihi chips also incorporate energy-saving features inherent in biological neural processing .
Spiking Neural Networks (SNNs) play a pivotal role in neuromorphic computing by mimicking biological neural activity through discrete spikes, enabling event-driven, low-power computation . SNNs only activate neurons when input exceeds a threshold, resulting in energy-efficient processing compared to continuously active traditional neural networks . This approach improves temporal dynamics and allows for more efficient hardware implementations, such as IBM’s TrueNorth and Intel's Loihi chips, which offer real-time adaptability and learning capabilities .
Neuromorphic computing systems are characterized by features such as co-located memory and computation, simple communication between neurons and synapses, local learning capabilities, spiking behavior, nonlinear dynamics, high connectivity, plasticity, and robustness. These systems are event-driven, enabling low-power operation and emphasizing temporal dynamics . In contrast, traditional von Neumann architectures separate memory and processing units, requiring data to be transferred back and forth, leading to higher energy consumption and slower data processing .