LPC2148
Unit 3
LPC2148 Features
• The LPC2148 is a 16 bit or 32 bit ARM7 family based microcontroller
and available in a small LQFP64 package.
• ISP (in system programming) or IAP (in application programming)
using on-chip boot loader software.
• On-chip static RAM is 8 kB-40 kB, on-chip flash memory is 32 kB-
512 kB, the wide interface is 128 bit, or accelerator allows 60 MHz
high-speed operation.
• It takes 400 milliseconds time for erasing the data in full chip and 1
millisecond time for 256 bytes of programming.
• 5 volts tolerant quick general purpose Input/output pins in a small
LQFP64 package.
• Outside interrupt pins-21.
• 60 MHz of utmost CPU CLK-clock obtainable from the
programmable-on-chip phase locked loop by resolving time is 100
μs.
• The incorporated oscillator on the chip will work by an exterior
crystal that ranges from 1 MHz-25 MHz
• The modes for power-conserving mainly comprise idle & power
down. For extra power optimization, there are individual enable
or disable of peripheral functions and peripheral CLK scaling.
• Embedded Trace interfaces and Embedded ICE RT offers real-
time debugging with high-speed tracing of instruction execution
and on-chip Real Monitor software.
• It has 2 kB of endpoint RAM and USB 2.0 full speed device
controller. Furthermore, this microcontroller offers 8kB on-chip
RAM nearby to USB with DMA.
• Two 10-bit ADCs offer 6 or 14 analogs i/ps with low
conversion time as 2.44 μs/ channel.
• Only 10 bit DAC offers changeable analog o/p.
• External event counter/32 bit timers-2, PWM unit, &
watchdog.
• Low power RTC (real time clock) & 32 kHz clock input.
• Several serial interfaces like two 16C550 UARTs, two I2C-buses
with 400 kbit/s speed.
Block Diagram
Description about General
Architecture of LPC 2148
Microcontroller
LPC 2148 microcontroller consist of three buses
such as ARM7 Local bus, AHB ( Advanced high
performance bus) and VPB bus etc. These buses are
used for performing different function and these
are also consisting of different functioning parts
• GPIO pins: ARM based LPC2148 microcontroller has 48 general
purpose input output pins. The operating voltage of these input
output pins is 5 volt.
• On Chip Static RAM (SRAM): This on chip static ram is used for
storing data or code. This ram could be accessed as 8 bit,16 bit or 32
bit. The memory of this ram could be increased to 8 kB,16 kB or 32
kB by using USB.
• On Chip Flash Program Memory: LPC 2148 microcontroller
contains 512 kB on chip flash memory this memory is used for
almost data storage or code storage. The programming of this flash
memory could be accomplished with several ways.
• Vectored Interrupt Controller: All input requests are received by
vectored interrupt controller (VIC) and it converts them into fast
interrupt request (FIQ). So, fast interrupt request and non fast
interrupt requests are defined by programming setting in vectored
interrupt controller.
• Digital to analog Converter: This LPC 2148
microcontroller has one 10 bit digital to analog converter
(DAC).This converter converts the digital input into
analog output. The maximum DAC output voltages are
called VREF voltages. Power down mode and buffered
output is also available in this digital to analog converter.
• Analog to Digital Converter: This LPC 2148
microcontroller also contains two analog to digital
converters whose names are ADC0 and ADC1. There are
14 total number of inputs of ADC are available and these
two converters successfully converts 10 bit analog input
to digital output. The measurement rang of each convert
is 0V to VREF.
• UART: This LPC 2148 microcontroller contains two UART
whose name are UART 0 and UART 01. These UARTs are
provided the full mode control handshake interface during
transmitting or receiving the data lines. These are used 16 Byte
data rate during transmitting or receiving the data. For
covering wide range of baud rate they also contain the built in
functional baud rate generator, therefore there is no need of
any external crystal of specific value.
• I2C Bus Serial I/O Controller: I2 C bus serial is bidirectional
multi master bus. It can easily control two or more buses
which are connected to it. The data which is transferred for
master bus to slave bus is transferred through this bidirectional
bus at baud rate up 400 k. Similarly the serial clock
synchronization allows the device to communicate the data of
different baud rate pass through only one serial bus. This clock
synchronization could be used as handshake mechanism for
resuming or suspending the data transfer.
• SPI Serial I/O Control: This SPI serial I/O control
supports the duplex data transfer, means this control
supports the device for transferring the data whose range 4
kB to 16 kB from master bus to slave bus. This operation is
called synchronous serial communication operation from
master but to slave bus. This data is transmitted or received
in 8 frames and each frame is contains 4 bits to 16 bits.
• Timers: This LPC 2148 microcontroller has two timers or
counters. These timers are 32 bit and are programmable
with 32 bit prescaler value as well as it also has one external
event counter. Each timer has four 32 bit capture channels
which take the snapshot of timer value during the transition
of any input signal. With the help of this capture event the
interruption could be also generate.
• Watch Dog Timer: This LPC 2148 microcontroller also contains
the watch dog timer whose main purposes is to reset the
microcontroller with in specific amount of time during
erroneous state. After this state it again turned on the
microcontroller with in specific amount of time limit.
• Real Time Clock (RTC): In this LPC 2148 microcontroller, the
RTC is designed to set the counters for the measuring the
whole time when the controller is in operating mode or idle
mode. It has designed to consume little power which make it
suitable for battery powered systems where CPU is not
continually in operating mode.
• Crystal Oscillator: This LPC 2148 microcontroller contains
the on chip integrated oscillator which operate with an external
crystal whose range is in between 1 MHz to 25 MHz Its output
frequency is called focs and controller clock frequency is called
CCLK. These names are used for making rate equation. These
frequencies would be same when the PLL is connected and in
running position.
• PLL: This LPC 2148 microcontroller contains two phase locked
loops whose names are PLL0 and [Link] input frequency whose
range is in between 1 MHz to 25 MHz is accepted by this PLL. This
frequency range could be extended from 10 MHz to 60 MHz by
using the current controlled oscillator (CCO). The PLL0 is used to
generate the CCLK clock (system clock) while the PLL1 has to
supply the clock for the USB at the fixed rate of 48 MHz
• LPC2148 Microcontroller Registers: This LPC 2148
microcontroller also consists of one program status register and 16
general purposes registers whose names are R0 to R15. These
register has wide range such as 8,16 and 32 bits. Beside this, it also
consists of one shadow register which is selected such as operation
mode switch.
• Interrupts : It has vectored interrupt controller. VIC can be
configured sixteen configurable priorities. LPC2148 microcontroller
has 9 level or edge triggered external interrupts.
• Power saving modes: It has power saving modes also like idle
mode and sleep mode.
Advanced High-performance Bus
VLSI Peripheral Bus
On Chip Memory Map
It has 4 GB address space (PC is 32 bit). LPC2148 has 32kB on chip
SRAM and 512 kB on chip FLASH memory. It has inbuilt support up
to 2kB end point USB RAM also.
On chip FLASH memory system
• The LPC2148 incorporates a 512 kB Flash memory system. This
memory may be used for both code and data storage.
On chip SRAM
• The LPC2148 provides 32 kB of static RAM which may be used for
code and/or data storage. It may be accessed as 8bits, 16-bits, and
32-bits.
APB and AHB Peripherals
Both the AHB and APB peripheral areas are 2 megabyte
spaces which are divided up into 128 peripherals
Each peripheral space is 16 kilobytes in size
• Both the AHB and APB peripheral areas are 2 megabyte
spaces which are divided up into 128 peripherals
• Each peripheral space is 16 kilobytes in size .
• All peripheral register addresses are word aligned (to 32-bit
boundaries) regardless of their size.
• This eliminates the need for byte lane mapping hardware that
would be required to allow byte (8-bit) or half-word (16-bit)
accesses to occur at smaller boundaries
GPIO
• Every physical GPIO port is accessible via either
the group of registers providing an enhanced
features .
• GPIO registers are relocated to the ARM local bus
so that the fastest possible I/O timing can be
achieved
• All registers are byte and half-word addressable.
• Entire port value can be written in one
instruction.
• Bit-level set and clear registers allow a single
instruction set or clear of any number of bits in one
port.
• Direction control of individual bits
• All I/O default to inputs after reset
• LPC2141/2/4/6/8 has two 32-bit General Purpose I/O
ports.
• PORT1 has up to 16 pins available for GPIO functions.
• PORT0 and PORT1 are controlled via two groups of 4
registers
GPIO Registers
Pin connect Block
• The pin connect block allows selected pins of the
microcontroller to have more than one function.
• Configuration registers control the multiplexers to
allow connection between the pin and the on
chip peripherals.
• Peripherals should be connected to the
appropriate pins prior to being activated, and
prior to any related interrupt(s) being enabled.
Pin Connect Block
64 pins are attached to two 32-bit I/O ports, Port-0 & Port-1.
•Port-0, Port-1 pins are designated as P0.0 – P0.31 & P1.0 - P1.31.
•Pins P0.24, P0.26, P0.27, P1.0-P1.15 are unavailable.
•Pin functions are multiplexed, up to 4 functions assigned to
each pin.
oPort-0 pins multiplex peripheral pin, & comm. interface pin
functions
oPort-1 pins multiplex JTAG interface, Trace function
oAdvantages: keeps size small, adds more functionalities to
devices
oDisadvantages: if functions not carefully selected, some
can’t be availed
•Pin function select Registers: PINSEL0, PINSEL1, PINSEL2
oPINSEL0 selects functions of pins P0.0 to P0.15,
oPINSEL1 selects functions of pins P0.16 to P0.31
oPINSEL2 selects functions of pins P1.16 to P1.31
Pin Connect Block
PINSEL0
• Pin function Select register 0 (PINSEL0 -
0xE002 C000) .
• The PINSEL0 register controls the functions of
the pins as per the settings listed in Table.
• The direction control bit in the IO0DIR
register is effective only when the GPIO
function is selected for a pin.
• For other functions, direction is controlled
automatically
PINSEL1
• Pin function Select register 1 (PINSEL1 - 0xE002
C004)
• The PINSEL1 register controls the functions of the
pins as per the settings listed in following tables.
• The direction control bit in the IO0DIR register is
effective only when the GPIO function is selected
for a pin.
• For other functions direction is controlled
automatically
PINSEL2
• Pin function Select register 2 (PINSEL2 -
0xE002 C014).
• The PINSEL2 register controls the functions of
the pins as per the settings.
• The direction control bit in the IO1DIR
register is effective only when the GPIO
function is selected for a pin.
• For other functions direction is controlled
automatically
Example 1:
Consider that we want to configure Pin 19 of
Port 0 i.e P0.19 as Output and want to drive it
High(Logic 1).
Program
Develop an embedded C program for an
attendance monitoring system. The system
requires the student to press a switch when he
enters the class and the count of the students
entering the class is displayed on the LEDs.
Assume the class strength to be 60.