Microprocessor (EE-223)
Assignment
Group No. - 14
THRISHANK - 2312096
VIKRANT AGARWALA - 2312126
VIGNESH BUDATI - 2312127
SHREYA AGARWALA - 2312186
MIMANSA JAIN - 2312187
Introduction to the 8085 Microprocessor
Intel, founded by Robert Noyce and Gordon Moore in 1968, was a key player in early
microprocessor technology. The first microprocessor developed by Intel was the 8080. The 8085
is an 8-bit processor that was pivotal in early microprocessor technology.
This meant that it used a collection of instructions which could be performed on 74 different
operations and which were driven by a +5 V power supply with a clock rate of just three million
cycles per second. This made it suitable for use in early embedded systems.
Architecture and Basic Features
Accumulator (A):–It performs all arithmetic andlogical operation related calculations.
Data Registers (B, C, D, E, H, L): These are general-purposeregisters of eight bits which can
be used individually or together as pairs.
Program Counter (PC) & Stack Pointer (SP): The programcounter is a register containing
sixteen binary digits that keep track of instruction addresses while the stack pointer handles stack
memory management.
ALU: Within the microprocessor unit this ALU containssub-units for arithmetic and logic
operations carried out there inside.
Flag Register: This indicates whether an ArithmeticLogic Unit (ALU) has completed
successfully or not.
Control Unit: It manages the instructions executionprocess by engaging ALU, Registers and
Busses when required to do so.
Address Data Bus: The address bus must forward whatwill be represented on the data bus so as
to facilitate RAM access since both buses are memory-mapped I/O devices with non-overlapping
address ranges:
Interrupts & Serial I/O Control: It deals with externaldevices through its inter
Importance of Memory and I/O Interfacing
Proper address decoding and timing are required for memory interfacing to store program and
data. Control signals are used by I/O interfacing to communicate with peripherals such as
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keyboards and displays for transferring data. It implies that the 8085 microprocessor is flexible
and can be adapted for a variety of applications because of these characteristics.
Memory Interfacing
Memory interfacing with the 8085 involves connecting external memory devices, such as RAM
(Random Access Memory) and ROM (Read-Only Memory), to augment the processor's internal
memory capabilities. This allows for expanded storage capacity and facilitates the execution of
more complex programs.
Application:
Memory interfacing with the 8085 microprocessor finds widespread use across various industrial
sectors, including manufacturing, automation, and control systems. In manufacturing
environments, the 8085 may be employed in programmable logic controllers (PLCs) to control
production processes and monitor sensor data. Memory interfacing allows PLCs to store program
instructions, configuration parameters, and historical data logs
In automation and control systems, the 8085 microprocessor facilitates real-time monitoring and
control of equipment and machinery. Memory interfacing enables the storage of control
algorithms, sensor readings, and system status information, supporting efficient operation and
fault diagnosis. Additionally, in embedded systems applications, the 8085 may be utilised in
devices such as vending machines, point-of-sale terminals, and industrial robots, where memory
interfacing is crucial for storing program code and data.
Memory Structure and its requirements:
Read/Write memories consist of an array of registers, in which each register has a unique
address. The size of the memory is N x M as shown in the diagram where N is the number of
registers and M is the word length, in the number of bits.
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Figure: Logic Diagram for RAM and EPROM
Key points of Memory Interfacing:
1. It is not always necessary to use the full 64 Kbytes address space of the 8085
microprocessors. The total memory size depends upon the application.
2. Generally, EPROM (or EPROMs) is used as a program memory and RAM (or RAMs) as
a data memory. When both, EPROM and RAM are used, the total address space 64
Kbytes is shared by them.
3. It is not always necessary to select 1 EPROM and 1 RAM. We can have multiple
EPROMs and multiple RAMs as per the requirement of application.
4. We can place EPROM/RAM anywhere in the full 64 Kbytes address space. But program
memory (EPROM) should be located from the address 0000H since the reset address of
the 8085 microprocessor is 0000H.
5. It is not always necessary to locate EPROM and RAM in consecutive memory For
example : If the mapping of EPROM is from 0000H to OFFFH, it is not necessary to
locate RAM from 1000H. We can locate it anywhere between 1000H and FFFFH. Where
to locate the memory component totally depends on the application.
Addressing Capability:
A microprocessor's addressing capability is determined by the number of address lines it has. For
example, the Intel 8085 microprocessor has 16 address lines, which means it can address up to
65,536 memory locations, or 64 kilobytes (Kbytes). The 8085's address bus is multiplexed with
an 8-bit data bus, so the most significant bits (MSB) of the address go through the address bus
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(A7-A0) and the least significant bits (LSB) go through the multiplexed data bus (AD0-AD7).
Several Key points are as follows:
Address Bus:The address bus is a set of wires thatcarry memory addresses from CPU to the
memory module. The number of address lines determines the maximum memory capacity that
can be addressed. For example, a 16-bit address bus can address up to 64KB(2^16) of memory
locations.
Data Bus: The data bus is a set of wires that enablethe bidirectional transfer of data between the
CPU and memory module. The width of the data bus determines the amount of data that can be
transferred in a single operation. For instance, a 32-bit data bus can transfer 32 bits (4 bytes) of
data at a time.
NOTE: The 8085 uses five addressing modes to transferdata and perform operations on them:
Immediate addressing mode, Register addressing mode, Register indirect addressing mode,
Direct addressing mode, and Implicit addressing mode.
Memory Map:
Memory interfacing with the 8085 entails mapping external memory devices into the processor's
address space. The memory map defines how memory addresses correspond to physical memory
locations, enabling the processor to read from and write to specific memory locations. Memory
mapping involves assigning specific address ranges to different types of memory, such as ROM
(Read-Only Memory) and RAM (Random-Access Memory), and ensuring that the 8085 can
access these memory regions correctly.
Address Space:
Total Addressable Space: 64 KB (65,536 bytes), ranging from address 0000H to FFFFH.
Control Signals:
Functions of Memory Interfacing control Signals include:
[Link]: It indicates Memory Read operation.
[Link]: It indicates Memory Write operation.
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In the 8085 microprocessors, the control signals MEMR and MEMW indicate memory read and
memory write operations, respectively. These signals are part of a machine cycle that includes
other operations, such as fetching the operation code from memory and reading and writing data
to input/output ports.
Address Decoding Techniques:
There are two types of address decoding:
1. Absolute decoding/Full Decoding
2. Linear decoding/Partial Decoding
Absolute Decoding/Full Decoding:
In absolute decoding technique, all the higher address lines are decoded to select the memory
chip, and the memory chip is selected only for the specified logic levels on these high-order
address lines; no other logic levels can select the chip. The diagram shows the Memory
Interfacing in 8085 with absolute decoding. This addressing technique is normally used in large
memory systems.
Figure: Absolute/Full Decoding
Linear Decoding/Partial Decoding:
In small systems, hardware for the decoding logic can be eliminated by using individual
high-order address lines to select memory chips. This is referred to as linear decoding. The
diagram shows the addressing of RAM with linear decoding technique. This technique is also
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called partial decoding. It reduces the cost of decoding circuit, but it has a drawback of multiple
addresses (shadow addresses).
Figure: Linear/Partial Decoding
RAM and ROM in memory interfacing of 8085 microprocessor:
Memory interfacing with the 8085 involves connecting external memory devices, such as RAM
(Random Access Memory) and ROM (Read-Only Memory), to augment the processor's internal
memory capabilities. This allows for expanded storage capacity and facilitates the execution of
more complex programs.
RAM (Random Access Memory):
We can read from or write into the RAM, so it is often called read/write memory. The numerical
and character data that are to be processed by the computer change frequently. These data must
be stored in a type of memory from which they can be read by the microprocessor, modified
through processing, and written back for storage. But it is a volatile memory, i.e. it cannot hold
data when power is turned off.
ROM (Read Only Memory):
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It is a read only memory. We can’t write data in this ROM Memory. It is non-volatile memory
i.e. it can hold data even if power is turned off. Generally, Read Only Memory is used to store
the binary codes for the sequence of instructions you want the computer to carry out and data
such as look up tables. This is because this type of information does not change.
Conclusion:
Memory interfacing with the 8085 microprocessor plays a vital role in enhancing the capabilities
of industrial systems, enabling efficient data storage, retrieval, and processing. By understanding
the principles of memory mapping, addressing, and interfacing, engineers can design robust
memory subsystems tailored to the specific requirements of industrial applications. Despite the
challenges posed by factors such as memory capacity, timing, and reliability, effective memory
interfacing remains essential for the successful implementation of 8085-based solutions in
various industrial settings, driving innovation and productivity in the modern manufacturing
landscape.
I/O Interfacing
I /O (Input/Output) interfacing is a critical aspect of microprocessor systems, enabling
communication between the CPU and peripheral devices such as keyboards, displays, and
storage devices. The 8085 microprocessor, a popular 8-bit microprocessor, uses various methods
and techniques for I/O interfacing.
Types of I/O Addressing:
1.Direct I/O (Isolated I/O)
efinition: Direct I/O, or Isolated I/O, givesI/O devices their own address space separate from
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memory. The CPU needs special instructions to talk to I/O devices.
ddressing: Each I/O device gets its own unique addresscalled a port. The 8085
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microprocessor uses IN and OUT instructions to communicate with these devices specifying the
port address.
Advantages:
asy Addressing: I/O devices having their own address space prevents conflicts with
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memory addresses.
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etter Memory Use: All memory space stays available for memory, as I/O devices don't take
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up any of it.
Disadvantages:
ore Complex: Needs extra instructions and control logic to handle I/O operations apart from
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memory operations.
Address Space Limits:The I/O address space sizeputs a cap on the number of I/O devices.
2. Memory-Mapped I/O
efinition: In Memory-Mapped I/O, I/O devices sharethe same address space as the memory.
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This means that the same instructions used to access memory can also be used to access I/O
devices.
ddressing: The system assigns specific memory addressesto I/O devices.The 8085
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microprocessor accesses these devices using standard memory instructions (e.g., MOV, LDA).
Advantages:
asier Programming: Programmers can use one setof instructions for both memory and I/O
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operations, which makes coding simpler.
uick Access: I/O operations happen at memory operationspeeds resulting in faster data
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transfer.
Disadvantages:
ess Memory Space: I/O devices take up part of the memory address space leaving less room
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for other uses.
ossible Conflicts: Designers must be careful to avoid overlaps between memory and I/O
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addresses.
Control Signals
ontrol signals play a key role in handling data movement between the CPU and I/O devices.
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Two vital control signals for I/O interfacing are:
IOR̅ (I/O Read)
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unction: The IOR̅ signal tells the CPU to read data from an I/O device. When this signal goes
F
low, the I/O device puts data on the data bus for the CPU to read.
peration: To read from an I/O device, the CPU sendsout the IOR̅ signal with the device's
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address. The device then responds by putting its data on the data bus. The CPU reads and
processes this data.
IOW̅ (I/O Write)
unction:The IOW̅ signal tells the CPU to write datato an I/O device. When this signal goes
F
low, the CPU puts data on the data bus for the I/O device to read.
peration:To write to an I/O device, the CPU sendsout the IOW̅ signal with the device's
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address and the data to write. The device then reads this data from the data bus and acts on it.
I/O Ports
I /O ports are the interfaces through which the CPU communicates with peripheral devices. Each
port is assigned a unique address, allowing the CPU to send and receive data to and from specific
devices. Ports can be classified into:
Input Ports: Used to receive data from input devices(e.g., keyboard, sensors).
Output Ports: Used to send data to output devices(e.g., displays, actuators).
idirectional Ports: Can function as both input andoutput ports, depending on the control
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signals
Interfacing Techniques in Microprocessor Systems
imple I/O
S
Simple I/O, also known as direct I/O, is the most basic form of interfacing in which each I/O
device is directly connected to the microprocessor. In this technique, specific instructions are
used to control the data flow between the microprocessor and the I/O devices. Each device is
assigned a unique address, and the microprocessor communicates with the device by sending
data to or receiving data from that address.
rogrammable I/O
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Programmable I/O (PIO) offers a more flexible and scalable interfacing solution compared to
Simple I/O. In this technique, I/O ports are controlled by programmable devices, such as
Programmable Peripheral Interface (PPI) chips, which can be configured to work with a variety
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o f peripheral devices. The microprocessor communicates with the PPI, which in turn manages
the data transfer between the I/O devices and the [Link] main advantage of
Programmable I/O is its ability to handle multiple devices through a single PPI chip, thereby
reducing the number of I/O ports required.
Interrupts and Handshaking
Interrupts
efinition: Interrupts are signals sent by I/O devicesto the CPU, indicating that they require
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attention. This allows the CPU to respond to I/O requests without continuously polling the
devices.
peration: When an I/O device generates an interrupt,the CPU temporarily halts its current
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task, saves its state, and executes an interrupt service routine (ISR) to handle the I/O request.
After completing the ISR, the CPU resumes its previous task.
Handshaking
efinition: Handshaking is a method of coordinatingdata transfer between the CPU and I/O
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devices, ensuring that both parties are ready for the transfer.
peration: Handshaking involves the exchange of controlsignals between the CPU and I/O
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devices. For example, the CPU may send a “ready” signal to an I/O device, which responds with
an “acknowledge” signal when it is ready to transfer data. This ensures synchronized and reliable
data transfer.
Conclusion:
I /O interfacing plays a crucial role in microprocessor systems by facilitating communication
between the CPU and peripheral devices. Understanding the various I/O addressing methods,
control signals, I/O ports, interfacing techniques and the functions of interrupts and handshaking
is vital for creating efficient and reliable microprocessor-based systems. Each approach and
technique offers its own benefits and compromises and the selection depends on the particular
needs of the application.
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Timing And Control Signals
The following critical control signals are used by the 8085 microprocessor to control the flow of
data and coordinate its operations with memory and I/O devices:
Address Latch Enable (ALE)
Function: ALE is a control signal used for demultiplexingthe address and data bus.
Multiplexed Address/Data Bus: The 8085 microprocessorhas a multiplexed address/data bus.
AD0–AD7 represents the address/data bus. That is, the lower 8 bits of the address (A0–A7) and
the 8-bit data (D0–D7) share the same physical lines, AD0–AD7. During the first part of a
machine cycle, these lines will carry the address, and during the later part, they will carry the
data.
Role of ALE: The ALE signal is used to tell apartthe address from the data in the multiplexed
bus. Specifically, ALE is a positive-going pulse active during the first clock cycle, T1, of the
machine cycle. The ALE is high only when the AD0–AD7 lines carry the lower byte of the
address. This address is captured and held by external latches. The process is controlled by ALE
to allow the AD0 – AD7 lines to be used for data in the remaining cycles.
Timing: Normally, an ALE occurs at the beginning ofevery machine cycle. An ALE is crucial in
the correct latching of the address and proper transfer of data during memory and I/O operations.
Read (RD) and Write (WR)
RD and WR are control signals that indicate whether the microprocessor is reading or writing.
The signals are active low; that is, they are asserted when the signal is at a low logic level, 0.
RD (Read)
The RD signal is used by the microprocessor to indicate it has read the data from memory or an
I/O device.
Active State: When RD is low, the microprocessor isreading the data. The memory or I/O
device places the data on the data bus, and the microprocessor reads that data during the active
phase of RD.
Timing: RD is turned on after the address has beenlatched and decoded. It remains on for as
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long as the read operation lasts, generally for the T2 and T3 clock cycles of the machine cycle.
WR (Write)
The WR signal indicates that the microprocessor is writing data into memory or to an I/O device.
Active State: With WR low, data on the data bus iswritten to the addressed memory location, or
to an I/O port. The microprocessor assertion of the WR signal occurs after the address and data
have been placed upon their respective buses.
Timing: Compared to RD, the WR signal is normallyon during T2 and [Link], in this
case, it asserts that data on the bus be written into the selected memory or I/O.
Address Decoding Techniques
Address decoding is an important need of all the microprocessor based system designs. This will
be giving the necessary scheme for arriving at how the microprocessor can choose a particular
memory or I/O device depending on the address that is put on the address bus. Two of the most
common methods of address decoding that are applied to 8085 microprocessor systems are:
Linear Decoding (Full Address Decoding)
Linear decoding, also known as full address decoding is a simple technique where all the address
lines are used to decode the address.
Principle: The whole of the address space availablefrom the 8085 microprocessor, which is 16
bits giving an address range from 0000H to FFFFH, is used in linear decoding.
Address lines A0 through A15 are applied directly to a decoder and the full address is decoded
directly. This makes certain that every memory or I/O device is selected by a unique address or
by a block of contiguous addresses.
It provides exact selection of memory locations or I/O devices without overlap in their address
selection.
Demultiplexing (Partial Address Decoding)
Demultiplexing can also be called partial address decoding as it employs only a part of the
address line in the decoding process.
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Principle: Demultiplexing does not mean that every address line gets included in the decoding
process. Usually, some of the higher-order address lines are used to select one memory chip or
one I/O device, with the remaining lower-order lines being used internally by that device to
access a particular register or memory location within the selected device.
For example, let's say that a system has more than one memory chip; the higher address lines like
A15, A14 could be used to select a chip, and the lower ones A0 through A7 for locations inside
that memory chip.
This is especially important when systems do not require the full available address space or when
hardware complexity is to be reduced.
Interfacing with specific devices
Interfacing the 8085 microprocessor with external devices like RAM, ROM, and peripherals is
required to have functionally working microprocessor-based systems. The 8085 is an 8-bit
microprocessor, capable of accessing a maximum of 64KB of memory and interfacing many I/O
devices.
Interfacing with RAM/ROM
Interfacing with ROM
ROM usually contains program code or firmware that the microprocessor executes at power-up.
Address Decoding: The techniques used to be able togive a unique address range to the ROM
could be linear decoding or demultiplexing. The ROM is mapped into a specific portion of the
address space.
Control Signals: The 8085 microprocessor makes useof the RD signal to read data from ROM.
This is because the ROM is a non-volatile memory, hence it supports only the read operation.
Example: If a 4KB ROM is interfaced with the 8085, the mapping can be done between the
addresses from 0000H to 0FFFH. If the address lines match within this range, the ROM chip will
get selected, and the data from its corresponding address in ROM is then placed along the data
bus.
Interfacing with RAM
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It is specifically used for the temporary storage of data and variables while the program is in
execution. Unlike ROM, RAM is volatile and supports read and write operations.
Address Decoding: As in ROM, RAM is also mapped tosome address range within the address
space of the microprocessor. This implies lower address lines (A0 - A7) and higher address lines
(A8-A15) to select particular memory locations within the RAM.
Control Signals: The 8085 uses both RD and WR signalsto read from and write to the RAM
respectively.
Example: If 2KB RAM is mapped from 2000H to 27FFH, the 8085 uses the address bus to select
certain memory locations on this range. The RD and WR signals determine whether the
microprocessor will either read from or write to the selected location.
Interfacing with Peripherals
Peripheral devices are I/O devices like keyboards, displays, printers, etc. that interact with the
microprocessor. The 8085 microprocessor interfaces with peripherals using:
Memory-Mapped I/O
In memory-mapped I/O, all peripherals are treated as memory locations. Each device has a
unique address in memory space, much similar to RAM or ROM. The 8085 accesses these
devices using its 16-bit address bus.
Control Signals: Same RD and WR signals are used forthe memory operations and peripheral
operations.
Advantages: Memory-mapped I/O allows a large numberof data manipulation instructions, like
MOV, ADD, etc. to be used for I/O devices.
Example: Suppose a display is mapped within the address range 3000H to 3001H. The use of the
standard memory instructions will allow the microprocessor to write data into the display.
I/O-Mapped I/O
This system assigns a different address space of 0-FFH for the peripherals. An 8-bit address is
used, and hence the microprocessor is made to handle I/O devices separately from memory.
Control Signals: The IO/M signal is used to differentiatebetween a memory access IO/M = 0
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and an I/O access IO/M = 1. Special instructions like IN and OUT are used for accessing the
peripherals.
Advantages: The I/O-mapped I/O makes the I/O addressspace separated from the memory
address space.
Example: An I/O address 00H can be assigned to a printer. The microprocessor will use the
instruction OUT with the address 00H to send data to the printer.
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