Preface Acknowledgements Chapter 1 Introduction to Digital Electronics 1.1 Analog and Digital Electronics 12 Digital Representations 13° Advantages and Limitations of Digital Signals 14 Basic Building Blocks of Digital Electronics 14.1 Diodes 14.2 Transistors [Link] Transistors as Inverters 14.2.2 TTL Output 14.2.3. Controlling TTL Output 14.2.4 — Tri-state Output [Link] Open Collector Output 1.5 Digital Number Systems 1.5.1 Decimal Number System 1.5.2 Binary Number System 1.6 Digital Signal Representation 1.7 Parallel and Serial Data Communication ®)1.8 19 Memory Digital Computers Chapter Synopsis Key Concepts Introduced Exercises Chapter 2 Number Systems 21 22 23 24 25 2.6 27 28 29 2.10 Importance of Number Systems Binary to Decimal Conversion Decimal to Binary Conversion Hexadecimal Number System BCD Coding Gray Code 2.6.1 Application of Gray Codes Data Representation Format 2.7.1 Signed 2.7.2. 2’s Complement ASCII Codes 2.8.1 EBCDIC Error Detection 29.1 Parity 2.9.2 Hamming Code Applications of Number Systems Chapter Synopsis Key Concepts Introduced Exercises Chapter 3 Boolean Algebra and Logic Gates 31 Algebra: Normal and Boolean 3.1.1 How Does It Help? 3.1.2 Boolean Variables and Constants 3.1.3 Boolean Operations 3.14 © Truth Table Gi) 14 15 15 15 16 19 22 22 23 24 25 27 29 30 30 31 33 34 34 34 35 36 37 38 38 37 a2 42 gee32 33 3 3.6 sf 38 a2 Boolean Operations and Logic Gates Basic 4.2.1 Logical NOT (NOT Gate) 52.2 Logical OR (OR Gate) 323 ASolved Example with OR Operation 32.4 Logical AND (AND Gate) 3:25. ASolved Example with AND Operation Other Logic Gates 33.1 NOR Gate 33.2 NAND Gate 3.3.3. XOR Gate 3.34 XNOR Gate ‘Algebric Representation of Logic Circuits 3.4.1 Example Circuit 1 34.2 Example Circuit 2 34.3 Example Circuit 3 3.44 Example Circuit 4 Evaluating Outputs of Logic Circuits 3.5.1 Rules for Evaluation 3.5.2 Finding Output Value of a Circuit Converting Boolean Expressions into Equivalent Circuits 3.6.1 General Methods of Conversion Boolean Theorems 3.7.1 Theorem 1 3.7.2 Theorem 2 3.7.3 Theorem 3 3.7.4 Theorem 4 3.7.5 Theorem 5 3.7.6 Theorem 6 3.7.7 Theorem 7 3.7.8 Theorem 8 Multivariable Theorems DeMorgan’s Theorems (sii)3.10 3. 3.12 3.13 3.14 Universal Gates 3.10.1 NAND Gate as a Universal Gate 3.10.2. NOR Gate as a Universal Gate Alternate Logic Representations IEEE/ANSI Logic Symbols Logic Family ICs HDL and VHDL Chapter Synopsis Key Concepts Introduced Exercises Chapter 4 Design of Combinational Circuits 4 42 43 44 45 4.6 47 ‘Types of Boolean Expressions 4.1.1 Sum of Products 4.1.2 Product of Sums Simplifying Logic Circuits Algebraic Simplification Designing Combinational Circuits 4.4.1 Designing Combinational Circuits Using Boolean Expressions Directly Karnaugh Map Method 45.1 What is K-map? 4.5.2 Size of K-map 4.3 Columns and Rows of K-map 4.5.4 Next Step: Looping 4.5.5. Generating K-map from a Given Boolean Expression 45.6 Don’t-care Conditions 4.5.7 K-map, Venn Diagram, and Quine-McCluskey Method Logic Circuits with XOR and XNOR Gates Applications of Logic Gates 4.7.1 Enable/Disable Circuit 4.7.2 Parity Generation and Checking 47.3 Operation Control (xiii) 74 74 5 1 9 80 87 87 88 88 91 96 96 97 98 101 103 104 109 109 M1 112 M5 118 120 121 122 124 124 126 12748 49 Basic Characteristics of Logic Family ICs 48.1 TTL Logic Family 4.82 CMOS Logic Family 4.83 Electrical Characteristics Quine-McCluskey Method (Tabular Method) Chapter Synopsis Key Concepts Introduced Exercises Chapter 5 Flip-Flops 3.1 52 53 54 5.5 Introduction. NAND Latch 5.2.1 Setting NAND Latch 5.2.2 Resetting NAND Latch 5.2.3 Simultaneous Setting and Resetting NAND Latch 5.24 — Truth Table for NAND Latch $2.5 — Timing Diagram of NAND Latch 5.2.6 Utility of NAND Latch NOR Latch 5.3.1 Differences Between NAND and NOR Latches 5.3.2 Resetting and Setting NOR Latch 5.3.3. Truth Table and Timing Diagram of NOR Latch 5.34 Power-up State of Latches Digital Clock Pulses 5.4.1 Clock Symbols 54.2 Difference Between Latch and Flip-flop 5.4.3 Clock Signal Characteristics 5.4.4 — Setup and Hold Times 54.5 Edge Detector Circuits SR Flip-flop 5.5.1 Function and Timing Diagram 5.5.2 Symbol and Truth Table 5.5.3 Difference Between NAND Latch and SR Flip-flop (xiv)5.6 37 58 59 5.10 Sal 5.12 5.13 5.14 5.15 JK Flip-flop 5.6.1 Basie Circuit and Symbols 5.6.2 Truth Table 5.6.3 Importance of Feedback 5.6.4 — Timing Diagram of Positive Edge-triggered JK Flip-flop DFlip-flop 5.7.1 Construction 5.7.2 Truth Table 5.7.3. Timing Diagram DLatch 5.8.1 Difference Between D Flip-flop and D Latch 5.8.2 Truth Table 5.8.3 Timing Diagram 5.8.4 Comparison TFlip-flop 5.9.1 Truth Table and Timing Diagram Asynchronous Flip-flops 5.10.1 SR Flip-flop with Asynchronous Inputs 5.10.2 JK Flip-flop with Asynchronous Inputs 5.10.3 D Flip-flop with Asynchronous Inputs 5.10.4 Transparent D Latch with Asynchronous Inputs Master-Slave JK Flip-flop ‘Timing Considerations 5.12.1 Setup Time and Hold Time 5.12.2 Propagation Delay 5.12.3. Racing Condition 5.12.4 Maximum Clocking Frequency 5.12.5 Clock Pulse Low and High Times 5.12.6 Asynchronous Active Pulse Width Applications of Flip-flops 5.13.1 Data Storage and Transfer (Registers) 5.13.2. Shift Registers 5.13.3 Counting and Frequency Division Schmitt-triggered Devices Solved Examples (wv) 166 166 167 168 169 170 171 m1 172 172 173 173 174 174 175 176 176 177 178 180 181 182 183 184, 184 184 185 185 185 186 186 187 188 191 192Chapter 6 Di 61 6.2 63 64 65 6.6 6.7 Chapter Synopsis Key Concepts Introduced Exercises gital Arithmetic Binary Addition 6.1.1 Half Adder 6.1.2 FullAdder 6.1.3. mbit Parallel Binary Adder 6.1.4 Carry Look Ahead Adder [Link] Carry Generation 6.1.42 Carry Propagation 6.143 Look Ahead Expressions 6.1.44 2bit Look Ahead Circuit 6145 Dbit Carry Look Ahead Adder Circuit 6.1.5 Integrated Circuit Parallel Adder BCD Addition 62.1 BCD Adder Binary Subtraction 63.1 Half Subtractor 63.2 Full Subtractor 2’s Complement System 64.1 1's Complement 6.42 2's Complement 643 Subtraction with 2’s Complement ALU Integrated Circuits Digital Comparator 6.6.1 Cascading Inputs 662 Truth Table for 1-Bit Comparator with Cascading Inputs 6.6.3 Initial Design 6.64 — Detailed Design 6.6.5 4-bit Comparator 74LS85 Solved Examples Chapter Synopsis Key Concepts Introduced Review Questions (xvi)wuerss 7 13 14 78 16 cel 18 19 7.10 Introduction 7.1.1 Toggle Mode of JK Flip-flop 7.1.2 Classification of Counters ‘Asynchronous Ripple Counters 7.2.1 Propagation Delay in Ripple Counters 7.2.2 Limitation of Maximum Counting Frequency Up, Down, and Up/Down Counters 73.1 Down Counter 73.2 Up/Down Counter synchronous Parallel Counters 7.4.1 2-bit Synchronous Counter 7.4.2 3-bit Synchronous Counter 7.4.3 4-bit Synchronous Counter Modulo-n Counters 7.5.1 JK Flip-flops with Preset and Clear Inputs 752 Decade Counter Presettable Counter Synchronous Down and Up/Down Counters 7.7.1 Synchronous Down Counter 7.7.2. Synchronous Up/Down Counter Counter ICs Storage Registers 7.9.1 Parallel-in Parallel-out 7.9.2 Serial-in Serial-out 7.9.3. Serial-in Parallel-out 7.9.4 — Parallel-in Serial-out 79.5 Buffered Registers 7.9.6 — Shift Register Counter (Ring Counter) 79.7 IC-Based Registers Solved Examples Chapter Synopsis Key Concepts Introduced Exercises (wil) 244 244 245 246 246 248 248 249 251 251 252 253 254 254 255 255 258 260 260 260 261 266 267 268 269 270 2 27 273 274 280 281 281Chapter 8 Decoders and Multiplexers 81 Introduction 82 Decoder B21 Inside a Decoder 822 Enabling a Decoder I 823 Decoder ICs 824 Dual2to4 Decoder (74139) 8.2.5 310 8 Decoder (IC 74138) 8.2.6 41016 Decoder (74 154) a 82.7 BCD to 7-segment Decoder Drivers (7447) 83 Encoders 83.1 Common Encoder ICs 4 83.2 10-line to 4-line Priority Encoder (IC 74147) 83.3 Scline to 3-tine Priority Encoder (IC 74148) 83.4 Application of Encoder 1Cy 84° Multiplexers 84.1 Multiplerer ICs 8:1 Multiplexer IC 74151 Applications of Multiplevers 8.5 Demuttiptexers 8.6 Solved Examples Po. Chapter Synopsis Key Concepts Introduced Chapter 9 Sequential Circuit Design 9.1 Introduction 9.1.1 Basic Models of Sequential Circuits i 9.2 Classification of Sequential Circuits 4 9.2.1 Moore and Mealy Machines ; 9.3. Synchronous Sequential Circuit Models 9.3.1 Moore Machine 9.3.2 Mealy Machine 9.4 Building Blocks 94.1 State Identification 94.2. State Diagram (xviii)08 9.6 97 98 State Table -anssigned Table State Minimization Sequential Cireuit Design pecification 5 odd 9S ‘synchronous gs.) User state Dinge: State Minimization State-assigned Table Next-state Equation Output Equation Putting It Together synchronous Sequential Circuit Design et Fundamental Mode and Pulse Mode 9,62 Design Methodology Hazards in Sequential Circuits 9.7.1 Static Hazard 69.72. Dynamie Hazard 0.73 Function Hazard Algorithmic State Machines 9.8.1 ASM Design Chapter Synopsis Key Concepts Introduced E ercises Chapter 10 Logic Family ICs 10.1 Introduction 10.1.1 Advancement of Technology 10.1.2. Electrical Parameters 10.1.3 Basic Characteristics of Digital ICs 10.1.4. Power Requirement 10.1.5 Speed of Operation 10.1.6 Voltage and Current Parameters 10.1.7 Fan-out 10.1.8 Noise Immunity 10.1.9 Other Parameters TTL Logic Family 10.2.1 TTL Logic Family Members 10.2.2 74S Series (Schottky TTL) 10.2.3 7ALS Series (Low-power Schottky TTL) (xix) 333 334 337 338 338 338 339 340 341 344 344 358 359 359 362 363 364 364 364 366 366 367 367 363 374 374 375 376 377 378 378 378 379 380 381 381 382 384024 omer rechno! 103 MOST Tos Terminale a 103 wd Substrate 13.12 Gate 103 13 Source and Drain ia nel 103.14 Char nf are = 15 Field Csiesion of MOS Technology ek 40S FET ean Enbancementtype NMOS FE Workit oe FET etion-tyPE Rerking of a Depletion YP NMOS FET Sy ymbols of MOSFETS Seritching Characteristics of CMOS: (CMOS Inverter CMOS Series Characteristics Low-voltage C! ‘MOS Dev BiCMOS Logic Family and Disadvantages of CMOS NMOS and PMOS los tween TTL, CMOS, and ECL Jo..1 Comparison Bet 10.5 Other Logic 10.5.1 Resistor-Transistor Logic 10.5.2 Direct-coupled Transistor Logic 10.5.3. Diode—Transistor Logic 1 High Threshold Logic Chapter Synopsis Kev Concepts Introduced Exercises Chapter 11. Analog Interfacing ‘ 11.1 Introduction 11.2 Basic Operational Amplifier Circuits 11.2.1 Inverting Amplifier 11.2.2 Non-invertipg Amplifier 1 Differential Amplifier 11.24 Unity Gain Amplifier (xx)112.5 Summing Amplifier 414 11.2.6 Voltage Comparator 414 11.2.7 Inverting Integrator 415 "3 Digital-to-Analog Conversion ae 113.1 Binary Weighted Resistor DAC 6 113.2. R-2R Ladder DAC 418 11.3.3 DAC Specifications 418 1133.1 Resolution 419 1133.2. Linearity 419 1133.3 Accuracy 419 1133.4 Settling Time 419 113.3.5 Temperature Sensitivity 420 113.4 DACICs 420 11.3.5 DAC Applications 421 11.4 Analog-to-Digital Conversion 421 11.4.1 Digital Ramp ADC 422 11.4.2. Successive Approximation ADC 423 11.4.3 Flash Converters 424 11.4.4 Dual Slope ADC 425 114.5 ADCICs 426 11.4.6 Application of ADC 428 11.5 Sample and Hold Circuits 428 11.6 Solved Examples 430 Chapter Synopsis 434 Key Concepts Introduced 435 Exercises 435 -Chapter 12 Memory and Programmable Devices e 427 12.1 Introduction aad 12.2 Memory Device Organization 442 12.2.1 Grouping of Memory Cells 443 Data Buffer 444 12.2.3. Decoder and Address Lines 444 Read and Write Signals 445 1 Chip Select 448 12.2.6 Designer’s Model de 12.3 Processor-Memory Connections 446 12.3.1 Address Bus . ae 12.3.2 Data Bus a (xxi)12.! 123.3 Control Bus 4 Device Selection 12.3.5 Memory Read Operation 123 123. : '8 Memory Word-length Expansion Memory Terminology 12.4. it 1243 3 Byte ipa? 123. 124. 124. 12.4.! 12.4. .7 Long Word 124\ 124: .10 Secondary Memory 12.4. 12.4. 124. 12.4, 12.4, 14 Read-only Memory (ROM) 12.4. 124. 124. Memory Classification 5.5 SDRAM 6 +DDRSDRAM a 7 ROM ‘a 8 Mask ROM 5.11 NVRAM ROM Cell Architecture 12.6. 126. 12.6.3 6 Memory Write Operation 7 Memory Word-number Expansion 1 Bit 2 Nibble 4 Double Byte 5S Word 6 Double Word 8 Main Memory (Primary Memory) 9 Cache Memory I Address 2. Access Time 13. Read-write Memory (RAM) 15. Capacity 16 Cycle Time Nonvolatile Memory Volatile Memory (RAM) Static RAM (SRAM) Dynamic RAM (DRAM) 9 PROM 10 EPROM 1 Diode Cell 2 Diode with Fuse Cell Bipolar Transistor Cell MOSFET Cell MOS Floating Gate Cell (xxii)SRAM Cell Architecture 12.7.1 Bipolar Transistor Static RAM Cell 12.7.2 MOSFET Static RAM Cell 12.8 Dynamic RAM 12.8.1 DRAM Technology 12.8.2. Dynamic RAM Refreshing 12.83 Multichannel Memory Architecture 12.8.4 ROM Applications Programmable Logic Devices 12.9.1 PLD 125 PLA 12.9.3 PAL 12.9.4 CPLD 129.5 FPGA 12.10 Solved Examples Chapter Synopsis Key Concepts Introduced Exercises 12.7 129 Chapter 13 Overview of VHDL 13.1 Introduction 13.1.1 Scope of VHDL 13.1.2 VHDL Reserved Words 13.1.3 Data Types in VHDL 13.1.4. Wdentifier Selection Convention in VHDL mtities of VADL Entities with In bit and Out bit :ntities with Inout bit 13. 13.3. Architecture of VHDL Structural Representation Behavioral Representation Data Flow Representation es in VHDL Boolean Bit Bit_Vector er Inte; Enumeration (xxiii) 462 462 463 463 404 464 465 465 405 466 467 468 469 469 _ 470 474 475 475 465 480 480 480 482 482 483 484 485 486 486 488 489 490 491 491 491 492 492 492 49213.5. Solved Examples Chapter Synopsis Key Concepts Introduced Exercises “Appendix A: Tips for Breadboard Circuits AL Introduction 2 AFew Avoidable Practices Incorrect Circuit Diagram Unconnected Power Bus Lack of Modular Testing IC Placement GND and Ve. Verifications Color Code for Wires Using Insufficient Number of Colored Wires Wires Close to IC Pins Incorrectly Stripped Wires Wires Crossing Over ICs Wires Not Flush with Breadboard Surface Too Long Wires 3 Some Good and Recommended Practices AB. Circuit Diagram A3.2 Power Bus Connections A33 Modular Testing of Circuit A34 IC Placement ABS GND and V.. Checking A3.6 Maintaining Color Codes for Wires A3.7__ Variation in Colors of Wires A38 Tapping from IC Pins A39 — Corectly Stripped Wires 3.10 Wires Around ICs A311 Wires Flush with Breadboard Surface 3.12 Optimum Wire Length A33.13 Using Right-angled Wire Bends Ad Check List Synopsis Bibliography Index (xxi)Digital Electronics © Parallel and serial data communication formats. * Introduction to memory system. Exercises Pick the correct one 1. Which one of the following components may be taken as a passive component? (b) Diode (a) Capacitor (d) None of these (©) Transistor 2. Fora standard TTL logic, sourcing at 0.5 V is considered as (a) logic HIGH (b) logic LOW (©) avoidable zone (d) none of these 3. fan electrical signal represents a function which is differentiable at every point, then the signal m taken as (a) digital (b) analog (©) either of these (d) none of these 4. Tristate is also known as (a) high impedance state (b) state-3 (c) tri-cycle (d) none of these 5. Ifa TTL output can only output logic LOW by sinking current, then this type of output is known: (a) totem-pole (b) Tri-state (©) open-collector (4) none of these. 6. Memory may be (a) volatile (b) nonvolatile (©) either of these (d) none of these 7. Present generation computers are 10, (a) analog computers (c) either of these (d) none of these 8. Computers are composed of (a) memory and /0 (b) transistors (c) both of these (4) none of these 9. The minimum number of transistors necessary to generate any digital output is (a) one (b) two (c) three (d) none of these The function of a diode resembles a valve, while the function of a transistor represents @ (a) pipe (b) gate (©) pump (d) none of theseIntroduction to Digital Electronics 11. Which of the following components may be taken as an active component? (a) Resistor (b) Capacitor (©) LED (d) None of these 12. What is meant by 110 in the binary system of numbers? (a) 5 (b) 6 ©7 (a) None of these 13, With respect to parallel communication, the rate of data flow in serial communication is (a) slower (b) faster (c) same (d) none of these 14, The arrow in the symbol ofa transistor indicates the direction of (a) current flow (b) clectron flow (©) both of these (d) none of these 15, In case of an open collector output, the collector of the transistor is to (a) remain open (b) be connected with GND (c) be connected with Vee (d) none of these Do you remember? 1. What is the basic philosophy behind all electronic designs? 2, What is the difference between open collector output and Tri-state output? 3. What is the difference between 1100B and 1100D? 4, What are the advantages and limitations of digital signals? 5. What are the differences between an NPN transistor and a PNP transistor? 6. What is the utility of Tri-state output? 7. Ifthe collector is left open, then how power is supplied by the open collector output? 8. What are the advantages and disadvantages of parallel communication over serial communication? 9. For which characteristics, the computers are entrusted? 10. Mention some of the peripheral devices around a computer. 11. What is the difference between Forward Biased and Reverse Biased diodes? 12, Name three terminals of a transistor. 13. Ifa transistor becomes active when its base is connected with Vee, is it NPN or PNP transistor? 14. Apart from the control input, what is the name of the other input of a Tri-state output circuit? 15. How many NPN and how many PNP transistors are necessary to construct a Tri-state output?Digital Electronics Have you understood? 1. Js the signal depicted in the following sketch an analog signal or a digital one? Voltage ’ | svi 2, Following is the waveform ofa digital signal at the time of its reception. The transmission was a ser ‘one. What was the original waveform of the transmitted signal? ¥ Voltage : 4 4. Any diode is a P-N junction. Its P-side is called anode and the N-side is called cathode. If we conne! anodes of to diodes, will the combination function as an NPN transistor? Justify your answer. 5, Is it possible to use a PNP transistor for simple inversion as described in Section [Link]?Introduction to Digital Electronics ASE 6, Ifthe digital design deals with the binary logic only, which includes two states: HIGH and LOW, then what is the purpose of including a third state as Tri-state? Why is the change of states of any digital signal never perfect? Is it possible to source any amount of current using open collector output? Justify your answer, Why memory is essential for computers? Identify some disadvantages of analog computers. To protect a battery-operated circuit, a diode is incorporated in series with the battery in forward biased condition, If accidentally the diode is damaged, would it still be able to protect the circuit? Justify your answer. 12, Isit possible to replace a diode by LED (light emitting diode)? Justify your answer. 13. Why some transistors, like BC128, are available in very small package while some transistors, like 2N3055, are available in very large package? 14, If the input of a digital machine, like a stepper motor, needs larger current, then how that might be sourced when it is to be driven by a TTL output? 15. In case of transistors, what is meant by "Darlington Pair’? ES een Answers: Pick the correct one 1. (a) 2.) 3. (b) 4. (a) 5. (c) 6.(0) 7. (b) 8. (c) 9. (a) 10. (b) 11. 12. (b) 13. (a) 14. (a) 15. (c)