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Chapter 10

Structured text
10.1 Expressions
The Structured Text language is a Pascal-type high-level language,
which incorporates the fundamental concepts of a modern high-level
language, in particular the most important principles for the structuring of
data and instructions. The structuring of data represents a common con-
stituent of all five programming languages; the structuring of instructions,
however, is an important feature of ST only.
An expression is an elementary constituent for the formulation of instruc-
tions. An expression consists of operators and operands. Frequently
occurring operands are data, variables or function invocations. However,
an operand may also be an expression itself. The evaluation of an ex-
pression supplies a value corresponding to one of the standard data
types or to a user data type. For instance, if X is a number of the type
REAL, then the expression SIN(X) also supplies a REAL type number.
Table B10.1 contains an overview of operators.

Operation Symbol Priority Table B10.1:

Operators of structured
Parenthesis (expression) highest text language
Function processing Function name
(Transfer parameter list)
Example: LOG(X), SIN (Y)
Exponentiation **
Sign –
Complement NOT
Multiplication *
Division /
Modulo MOD
Addition +
Subtraction –
Comparison <, >, <, >

Equality =
Inequality <>
Boolean AND &, AND
Boolean exclusive OR XOR
Boolean OR OR lowest

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The following are examples of expressions:

SIN(X)
4*COS(Y)
A < B
A+B+C

The evaluation of an expression consists of applying the operators to the

operands, whereby the operators are evaluated in a sequence defined
by their precedence in table B10.1. An operator with higher precedence
is evaluated prior to an operator with lower precedence.

Example A, B and C are variables of data type INT; A assumes the value 1, B the
value 2 and C the value 3. The evaluation of expression A+B*C supplies
the value 7. If a sequence other than that specified by the precedence is
desired, this is possible by using brackets. Using the above numeric
values, the expression (A+B)*C supplies the value 9.
If an operator has two operands, the leftmost operand is to be evaluated
first. The expression SIN(X)*COS(Y) is therefore evaluated in the se-
quence: Calculation of the expression SIN(X), calculation of the expres-
sion COS(Y), followed by the calculation of the product of SIN(X) and
COS(Y).
As demonstrated in the previous paragraph, a function may only be in-
voked within an expression. The invocation is formulated by specifying
the function name and the parenthesised list of arguments.

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10.2 Statements
Table B10.2 contains a list of statements possible in the Structured Text
language. A statement may extend beyond one line, whereby the line
break will be treated in the same way as a blank space.

Statement Example Table B10.2:

Statements of
Assignment := A := B; structured text language
CV := CV + 1;
Y := COS(X);

Invocation of function RS_Horn(S := Drill_faulty, R1 := Push_button);

blocks Horn := RS_Horn.Q1;

Return from functions RETURN;

and function blocks
RETURN
Selection statements
IF D:= B*B – 4*A*C;
IF D < 0.0 THEN Number_Sln := 0;
ELSIF D = 0.0 THEN
Number_Sln := 1;
X1 := –B / (2.0*A);
ELSE
Number_Sln := 2;
X1 := (–B + SQRT(D)) / (2.0*A);
X2 := (–B – SQRT(D)) / (2.0*A);
END_IF;

CASE CASE Voltage OF

101 ... 200: Display := too_large;
20 ... 100: Display := large;
2 ... 29: Display := normal;
ELSE
Display := too_small;
END_CASE;

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Table B10.2: Statement Example

Statements of
structured text language Iteration statements
(continuation)
FOR Total := 0;
FOR I := 1 TO 5 DO
Total := Total + I;
END_FOR;

REPEAT Total := 0;
I := 0;
REPEAT
I := I + 1;
Total := Total + I;
UNTIL I = 5
END_REPEAT;

WHILE Total := 0;
I := 0;
WHILE I < 5 DO
I := I + 1;
Total := Total + I;
END_WHILE;

Termination of loops EXIT;

EXIT
Void instruction ;;

Assignments
An assignment is the simplest form of an instruction. This replaces the
actual value of the variable to the left of := with the value of the expres-
sion to the right of :=. Each assignment ends with a semicolon. One
possible assignment (table B10.2) is A := B; whereby the value of the
variable B is assigned to the variable A. As a result of the assignment
CV := CV + 1, the variable CV is increased by 1 as a result of the ex-
pression CV+1.

Function blocks and functions

A defined mechanism is set out in EN 61131-3 (IEC 61131-3) for the
invocation and also the early exit from a function or a function block.
As described, a function is invoked only as part of expression evaluation.
The invocation itself consists of the specification of the function name,
followed by the parenthesised list of input parameters.

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The invocation of a function block is analogue through the specification

of the instance name (copy) of the function block. This is followed by a
parenthesised list consisting of value assignments to the input parame-
ters. The specification of the name of the input parameter is mandatory,
the individual input parameters may be listed in any sequence.
Moreover, it is not essential for all input parameters to be assigned a
value in every invocation. If a particular input parameter is not assigned
a value in an invocation, the previously assigned value or the initial value
of the parameters applies.
Table B10.2 contains an example of a function block invocation. A horn
is to sound, if a drill is defective. The status of the horn is stored by
means of an RS function block.
The RETURN statement is to provide early exit from a function or a func-
tion block. The following is an example of the use of a RETURN com-
mand:

IF X < 0 THEN
Value := -1;
Error := 1;
RETURN;
END_IF
Y := LOG(X);

If the value of X is less than 0, the block containing the sequence of

statements is terminated immediately.

10.3 Selection statements

Selection statements – also known as program branch statements – are
available in the form of the IF and CASE statement. Different groups of
statements may be selected and executed in relation to a defined condi-
tion. The program organisation unit may branch in different ways

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IF-Statement
The general form of an IF statement is:

IF boolean expression1 THEN statement(s)1;

[ ELSIF boolean expression2 THEN statement(s)2; ]
[ ELSE statement(s); ]
END_IF;

The parts in square brackets are optional, i.e. these may occur in an IF
statement, but need not do so.
The simplest IF statement consists of an IF-THEN construct (simple
branch).
This is demonstrated by the following example

IF X < 0 THEN X := –X;

END_IF;
Y := SQRT(X);

If the condition following the keyword IF is true, the statements following

the keyword THEN are executed. If the condition is not met, the state-
ments in the THEN part are not executed.
In the case of a concrete example this means: If the variable X is less
than 0, i.e. negative, it is affixed a minus symbol and thus represents a
positive value; if this is not the case, the statement with the square root
function is executed immediately.
A simple branch may be achieved by means of an IF-THEN-ELSE con-
struct:

Error := 0;
IF Part_ok THEN Number := Number + 1;
ELSE Error := 1;
END_IF;

The statements following the keyword THEN are executed, if the condi-
tion following the keyword IF is met; if the condition is not met, the
statements formulated after the keyword ELSE are executed.

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The example given deals with production parts. If the part is good
(Part_ok = 1), the THEN part is executed, in this case the number of
correctly produced parts is increased by 1; otherwise a bit is set for error
detection.
If a branch is to be programmed for more than 2 branches, an IF-THEN-
ELSIF construct may be employed. Table B10.2 illustrates this by way of
an example, whereby the solutions of the quadratic equation AX2 + BX +
C = 0 are established. If the discriminant – in this case variable D – is
less than 0, the subsequent THEN part is executed: there is no solution,
i.e. Number_Sln := 0.
If the first condition is not met, i.e. D is greater or equal to 0, the condi-
tion following ELSIF will be evaluated: If it is met, i.e. D equals 0, the
statements following the keyword THEN will be executed: The only exist-
ing solution is specified as X1.
Otherwise (D being greater than 0), the lines following the keyword
ELSE will be executed: The two possible solutions X1 and X2 are speci-
fied.

CASE-Statement
If a selection of several possible statement groups is to be made, the
CASE statement may be used.
The standard form for the multiple selection with CASE is:

CASE Selector OF
Value1: statement(s)1;
Value2: statement(s)2;
...
Valuen: statement(s)n;
[ ELSE
statement(s); ]
END_CASE;

The CASE statement consists of a selector, which supplies a variable of

type INT during its execution, and a list of statement groups. Each group
is assigned a value (label). The values are separated by commas if a
statement group is dependent on several values. The values may also
represent INT type variables.

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With the evaluation of the CASE statement, the value of the selector is
determined first, followed by the execution of the first group of state-
ments, for which the computed value of the selector applies. If the value
of the selector is not contained in any of the statement groups, the
statements following the keyword ELSE are executed. If ELSE does not
occur, no statements are executed.
In the example given in table B10.2, the text for a statement is selected
in relation to the available measured value. The values for the selection
of the statement are of the INT type.

10.4 Iteration statements

It is often necessary to execute statements repeatedly (program loops).
The FOR loop is used, if the number of repetitions has been defined in
advance, otherwise the REPEAT or the WHILE loop is used.

FOR loop
The standard representation of the FOR loop is:

FOR Variable := expression TO expression [ BY expression ] DO

statement(s);
END_FOR;

A so-called control variable is set at a specific initial value and increased

with every loop executed until the control variable reaches the end vari-
able. A simple FOR loop is therefore executed according to the following
mechanism:

FOR Counter_variable := Initial_value TO Final_value DO

statements;
END_FOR;

If no increments are specified, as formulated above, the control variable

automatically increments by 1 with each loop completed. If a different
increment is required, this may be specified via the keyword BY, fol-
lowed by the desired value. The counter_variable may therefore not be
changed within the loop – i.e. the statements being repeatedly executed.
Furthermore, the counter_variable, initial_value and final_value must be
expressions of the same integer data type (INT, SINT, DINT).

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The test for the termination condition is made at the beginning of each
iteration, so that the statements are not executed if the initial value ex-
ceeds the final value. A further characteristic of FOR loops is that these
may be nested at any time.
An example of the application of a FOR loop is given in table B10.2. In
this example, an addition of numbers 1 to 5 is realised via the loop.
When the loop is executed for the first time, I has the initial value 1, the
value of the variable Total is also 1. For the second loop execution, I has
the value 2, the variable Total reaches the value 1+2=3 etc. After the
fifth and last loop execution, the value for Total is 15, the counter vari-
able has reached the final value 5, and processing of the loop is thus
completed.

REPEAT loop
Unlike the FOR loop, with the REPEAT loop the number of iterations is
not defined in advance via a specified final value. Instead, a condition –
the so-called termination condition – is used.

The form of a REPEAT loop is as follows

REPEAT
statement(s);
UNTIL boolean expression
END_REPEAT;

The termination of the REPEAT loop is tested after the execution of the
loop statements. The loop is therefore executed at least once. The ter-
mination condition must be changed in the loop, since the loop will oth-
erwise be executed indefinitely. It is therefore important to ensure that
the loop has actually been completed. The following is to be checked:

Does the termination condition actually include a variable, so that the
condition can supply the value 1 (true)?

Is the termination condition ever reached?
An example of the use of the REPEAT loop is demonstrated in table
B10.2. Here too, the first five non-negative integers are added.

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In the first loop execution, I has the value 1, the value of Total is also 1.
A check of the termination condition shows, that this is not met, whereby
the loop is executed again. The loop is executed repeatedly until the
termination condition is true. This will be the case after the fifth loop exe-
cution and the loop is ended. Here too, the result for the variable Total is
15L.

WHILE loop
The WHILE loop represents a second option for the formulation of itera-
tions by specifying a termination condition. The standard representation
of a WHILE loop is:

WHILE boolean expression DO

statement(s);
END_WHILE;

If the boolean expression following the keyword WHILE is met, the

statements following the keyword DO will be executed. The termination
of the WHILE loop are therefore tested prior to the execution of the loop
statements. The loop statements may therefore possibly not be exe-
cuted at all. The termination condition is to be changed in the statements
to be repeated.
It is important that the loop conditions are really met in order for the
processing of the loop to be terminated.
The task of adding the numbers 1 to 5 can also be realised by using a
WHILE loop (table B10.2). Unlike the REPEAT loop, the WHILE loop is
executed repeatedly until the termination condition is true. In reality this
means that the loop is executed for as long as I is less than 5. If I is
equal or greater than 5, the loop is no longer processed.
In principle, a REPEAT loop can be replaced by a WHILE loop and vice
versa.

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EXIT statement for the termination of a loop

The EXIT statement must be used in order to terminate iterations before
the end or termination condition is satisfied.

The following program illustrates the example of an EXIT statement:

S := 0;
FOR I := 1 TO 2 DO
FOR J := 1 TO 3 DO
IF Error THEN EXIT;
END_IF;
S := S + J;
END_FOR;
(* If EXIT statement is executed then jump to this point
is executed *)
S := S + I;
END_FOR;

If the EXIT statement is within a nested loop, exit shall be from the in-
nermost loop in which the EXIT is located. The next statement to be
executed is the statement immediately after the loop end (END_FOR,
END_WHILE, END_REPEAT). In the example is the statement "S := S
+I;".
The following applies in the case of the above example: If the value of
the boolean variable Error is equal to 0, the algorithm for the variable S
provides the value 15. If the variable Error has the value 1, the value
computed for S is 3.

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Sequential function chart

11.1 Introduction
EN 61131-3 (IEC 61131-3) defines the sequential function chart (SFC)
as an important programming tool for control systems. Its clearly laid out
structure provides a particularly clear program representation for a con-
trol system and as such is one of the most important parts of
EN 61131-3 (IEC 61131-3).
Each program of a sequence control system consists of steps and tran-
sitions (step enabling conditions). Apart from this, it also contains other
important information concerning program execution and the type of
program continuation.
If the program execution is not unique, but an individual path is to be
selected from several possible paths, the representation of the sequen-
tial function chart illustrates this in a particularly graphic form.

11.2 Elements of the sequential function chart

The fundamental task of a sequential function chart is to structure a con-
trol program into individual steps and transitions (step enabling condi-
tions) interconnected by directed links.
This requires a representation in graphic form, which makes the inten-
tion of the program clearly recognisable.
The EN 61131-3 (IEC 61131-3) sequential function chart is structured in
the form of a small defined set of simply constructed, graphic basic ele-
ments. These basic elements must be combined to create a control pro-
gram. How this is achieved, is defined by a few simple rules in the
standard.
The sequential function chart programming language is based, in as far
as possible, on the function chart planning language to IEC 60848. The
only amendments made were those necessary to be able to generate
executable commands for a PLC from a documentation element. An
example of this is the action qualifier S. In the documentation standard,
this qualifier is used to define the modes of action, i.e. the setting and
resetting of an operand. A PLC requires unique commands. This is why
the sequential function chart programming language employs two quali-
fiers to realise the two modes of action, the S and the R qualifier.
Since the sequential function charts requires the storing of status infor-
mation (the active steps etc. at a given moment), the only program or-
ganisation units which can be structured using these elements are
Programs and Function Blocks.

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Table B11.1: a) Step with identifier ***

Elements of the sequential
function chart ***
(graphic representation)

b) Initial step with identifier ***

***

c) Action block, containing the actions

assigned to a step
Field a: Action qualifier
Field b: Name of action a b c
Field c: Feedback variable
d
Field d: Action content

d) Transition with identifier ***

or transition condition***
***

Step_3
e) Alternative branch

E F

Step_4 Step_5

Step_6 Step_7
f) Junction of alternative paths
G H

Step_8

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Table B11.1:
Elements of the sequential
g) Parallel (simultaneous) branch Step_3 function chart
(graphic representation)
B

Step_4 Step_5

h) Junction of parallel paths

Step_6 Step_7

Step_8

The step
A step contains a number of execution parts of the control program. In-
puts and outputs may only be set or reset in a step. This also means that
all correcting variables issued to the connected plant by a control pro-
gram, can only be programmed in such steps.
The execution part assigned to a step, the so-called actions, are formu-
lated within action blocks.
A step is either active, with the associated action being executed at the
time, or inactive. In this way, the status of the connected system is de-
fined at any given moment by the set of active steps in the control pro-
gram.
As shown in table B11.1a, a step is represented graphically by a block.
Each step has a symbolic name, which can be freely selected by the
user. The same set of rules applies for the step name as those already
mentioned for symbolic identifiers: a symbolic name may consist only of
capital and lower case letters, digits and the underline and always starts
with a letter or the underline.

Fig. B11.1:
Steps with step names
Motor_3_on Vacuum_off

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All steps in a program or function block formulated in a sequential func-

tion chart must have different names. Even if two steps have the same
execution parts, these are to be designated twice.
The reason for this is as follows:
Information is stored in the controller for each step. The unique assign-
ment of this information to a step as well as the access to this data is
effected via the step name.
The user can thus obtain information regarding

the current status of a step (active, inactive)

the time, for which a step has been active since initiation

Table B11.2 illustrates the access to step data.

Table B11.2: a) Motor_3_on.X boolean variable indicating whether the

Information regarding step Motor_3_on is active (Mo-
a step tor_3_on.X=1) or inactive (Mo-
tor_3_on.X=0).
b) Motor_3_on.T Variable of type TIME indicating how
long the step Motor_3_on has been
active since initiation.

The evaluation of the above data can be useful with regard to monitoring
the connected system. Applications may also arise, which require the
use of variables in the control program itself.
A special case within the step element is the so-called initial step (table
B11.1b). This is drawn graphically by a double line.
Each network in a sequential function chart has precisely one initial step,
which is executed as the first step within a network.
As already mentioned, the importance of a sequential function chart lies
in its clearly structured graphic representation of a control program. It
may however also be useful to represent sequence structures textually.
The EN 61131-3 (IEC 61131-3) standard provides an equivalent textual
representation of SFC elements for this, which is as follows for the step
element:

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STEP Motor_3_on Fig. B11.2:

(* Contents of step*) Textual representation
END_STEP of steps

STEP Vacuum_off
(*Contents of step*)
END_STEP

The textual representation of sequence structures may, depending on

manufacturer, be part of the documentation of a control program (ven-
dor- dependent); this type of layout of sequence structures does not re-
quire any restrictions with regard to format and character set for printing.
Moreover, it may be possible, for control programs in a standardised
textual representation to be portable between PLCs by different manu-
facturers.

The transition
A transition or step enabling condition contains the logic condition per-
mitting the transition, according to the program, from one step to the
next.
As can be seen from table B11.1dh, the transition is represented by a
horizontal line across the vertical directed link. Each transition has a
transition condition, which is the result of the evaluation of a single boo-
lean expression. The transition condition can be formulated in any of the
EN 61131-3 (IEC 61131-3) languages such as LD, FBD, IL or ST.
A transition condition is either true and then has the value 1, or false,
when it has the value 0. Only if the condition is true, is the execution of
the program or the function block continued at this point.
If a condition is always true, it can simply be identified by the number 1
at the transition. Transition conditions of this type which are always true
may occur frequently in a program or function block in a sequential func-
tion chart.

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Table B11.3:
Special transitions 1
Always true
transition condition

Transition condition
never true 0

Interconnection of steps and step enabling conditions

In practice, not much can be achieved with a single step or with a transi-
tion. A control program in the sequential function chart will therefore al-
ways be made up of a succession of numerous transitions and steps.
A sequence of transitions and steps is termed a step chain, sequence or
also path.

Fig. B11.3:
Steps and
transitions in sequence Step_5

Step_6

Step_7

Here, the transitions and steps must continually alternate. The logic path
via this representation is always from top to bottom. The following be-
haviour can be seen in the example shown in fig. B11.3:
Assuming that step Step_5 is active, Step_5 remains active until transi-
tion D is true. Clearing of the transition results in the deactivation of the
preceding step Step_5 and the activation of the successive step Step_6.
As soon as step Step_6 is active, transition E of the controller is exam-
ined. If transition E is true, step Step_6 is ended and step Step_7 is
processed, etc.

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The alternative branch

It is frequently necessary for a branch to be programmed into a control
program, whereby the program may be continued in different ways at
this point.
The alternative branch to a different path is represented by a corre-
sponding number of transitions after the horizontal line. In the example
in table B11.1e, the path via the step Step_4 is evolved, if transition E is
true, or the path via step Step_5 evolved, if transition F is true and E
false.
The corresponding counterpart to the alternative branch is a junction of
alternative paths. In the case of a junction of alternative paths, transi-
tions must always be positioned above the horizontal line.
The program flow in table B11.1f passes from step Step_6 to step
Step_8, if transition G is true or from step Step_7 to step Step_8, if tran-
sition H is true. The decisive factor here is the path through which the
control program reaches this junction of alternative paths. If this took
place via the path step Step_6, the step enabling condition H is mean-
ingless. Conversely, transition G is not evaluated, if the control program
reached the junction via the path with Step_7.
It should be noted that in the case of alternative branching only ever one
path is followed by the control program. It is therefore not mandatory for
the conditions to be mutually exclusive.
If no other specifications exist, the path furthest to the left is evolved.
Priority for the calculation of transitions is therefore given from left to
right.
This is probably the most commonly implemented variant used by con-
troller manufacturers to achieve alternative branches.
In conjunction with three steps, a section of a program or function block
with triple alternative branch could therefore be as follows.

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Fig. B11.4:
Alternative branch:
Processing of transitions Step_3
from left to the right

D E F

Step_4 Step_5 Step_6

G H I

Step_7

However, the EN 61131-3 (IEC 61131-3) standard also offers the facility
for the user to define the priority during the execution of the transitions.
The definition of the functionality of alternative branches in IEC 60848,
which requires a user programmed mutual exclusion of transition condi-
tions, is also supported by EN 61131-3 (IEC 61131-3) as a third method.
In contrast with the previous examples the numbers in the path in fig.
B11.5 indicate a user-defined priority of the transition evaluation. The
path with the lowest number has the highest priority.

Fig. B11.5:
Alternative branch with
user-defined priority Step_7

2 1
D E

Step_8 Step_9

As such, a transition is evolved from step Step_7 to step Step_9, if tran-

sition E is true, or a transition is evolved from step Step_7 to step
Step_8, if transition D is true and transition E is false.
A loop structure may be regarded as a special case of alternative
branching, whereby one or several paths return to a preceding step.

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Fig. B11.6:
Representation of a loop
Step_3

Step_4

Step_5

E F

Step_6

In fig. B11.6 the program flow evolves from step Step_5 to step Step_4,
if transition F is true and E is false. The evolution of step sequence
Step_4, to Step_5 may be repeated in this way.

Parallel branch
A completely different functional element of the sequential function chart
is parallel branching.
This is represented by a double line and a transition above this line (ta-
ble B11.1g). As soon as transition B is fulfilled, an evolution from step
Step_3 to step Step_4 and Step_5. These two steps are executed simul-
taneously.
A parallel branch determines that all connected paths are to be activated
simultaneously and evolved independently of one another. In the case of
the matching counterpart, and the joining of parallel paths, the transition
is always represented underneath the horizontal double line.

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Parallel joining contains a mechanism for synchronisation. Only when all

the paths coming from above have been completely executed, is the
subsequent transition evaluated. If it is true, the transition to the next
step takes place. In table B11.1h this means: both steps Step_6 and
Step_7 must be evolved prior to the evaluation of transition F.

Fig. B11.7:
Representation of a
triple parallel branch F

Step_4 Step_5 Step_6

Step_7

When step enabling condition F has been fulfilled, the three paths with
steps Step_4, Step_5 and Step_6 and Step_7 must be evolved simulta-
neously.
Depending on the contents of transition G between the two stepsStep_6
and Step_7, the control program may have to wait until transition G is
fulfilled. The lower transition H is therefore only examined if the right
path has been evolved completely. This can only be the case, if transi-
tion G in this path is true.

11.3 Transitions
Each transition is assigned a transition condition (step enabling condi-
tion). This provides the result of a boolean value.
In the simplest case, a step enabling condition can be specified by the
interrogation of an input of the controller or another boolean variable. It
is however also possible to program considerably more complex step
enabling conditions.

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Formulation of Transition conditions

Transition conditions can be programmed in the following languages

Ladder diagram

Function block diagram

Instruction list

Structured text

The contents of the transition condition are either specified directly at the
transition (see fig. B11.8) or linked with the transition via a transition
name (see fig. B11.9)

Fig. B11.8:
Direct specification of a
a) Transition condition Step_3 transition condition
in LD - language %IX3 %MX1

Step_4

b) Transition condition Step_3

in FBD - language
%IX3 &

%MX1
Step_4

c) Transition condition Step_3

in ST - language
%IX3 & %MX1

Step_4

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Chapter 11

Here, two results are connected via a logic AND function, whereby the
transition condition will not be met until both input %IX3 and flag %MX1
assume the value 1.
The power or signal passes from left to right in the graphic languages LD
and FBD, the LD or FBD network part is defined on the left, next to the
transition symbol (horizontal line).
The boolean expression in ST languages is defined to the right of the
transition symbol.

Fig. B11.9:
Assignment of a
transition condition to the
transition by specifying
Step_3
a transition name
Transition name Tran_3_4

Step_4

a) Transition condition TRANSITION Tran_3_4:

in LD - language %IX3 %MX1 Tran_3_4

END_TRANSITION

b) Transition condition TRANSITION Tran_3_4:

in FBD - language
%IX3 & Tran_3_4
%MX1

END_TRANSITION

c) Transition condition TRANSITION Tran_3_4:

in IL - language LD %IX3
AND %MX1
END_TRANSITION

d) Transition condition TRANSITION Tran_3_4:

in ST - language := %IX3 & %MX1;
END_TRANSITION

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Chapter 11

If a transition name is used as an assignment mechanism from transition

condition to transition, the transition name must refer to a
TRANSITION...END_TRANSITION construct.
The transition condition is formulated within this construct and the boo-
lean result mapped to the transition name.
The transition names within a program organisation unit, like the step
names, must all differ from one another. A name is formulated according
to EN 61131-3 (IEC 61131-3) rules applicable to identifiers.
EN 61131-3 (IEC 61131-3) also defines an equivalent textual represen-
tation for the graphic element Transition. The actual transition condition
is programmed either in the IL or St language.

a) Transition condition formulated in ST language Fig. B11.10:

Textual representation
STEP Step_3: END_STEP of transitions
TRANSITION FROM Step_3 TO Step_4
:= %IX3 & %MX1;
END_TRANSITION
STEP Step_4: END_STEP

b) ) Transition condition formulated in IL language

STEP Step_3: END_STEP

TRANSITION FROM Step_3 TO Step_4
LD %IX3
AND %MX1;
END_TRANSITION
STEP Step_4: END_STEP

11.4 Steps
A step represents the execution part of a sequential function chart. Only
within steps can a program or a function block within a controller influ-
ence the connected system via its outputs, by setting or resetting the
outputs.

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Chapter 11

Structure of a step within actions

Each step may contain several actions. Each of these actions is to per-
form a job for the connected system. The structuring of a step into indi-
vidual actions initially is merely an ordering function. This makes the
step clearer, since it creates clearly defined limits between the individual
job steps. However, since each action is assigned a qualifier, the struc-
turing of a step into individual actions also define an additional function-
ality.
A step which does not contain any actions may be seen as a special
case. Its sole purpose is to separate two step enabling conditions, which
are to be evaluated consecutively. It thus permits a wait function,
whereby the first step enabling condition has priority, irrespective of
whether the second is already met or not, and the second step enabling
condition must be met subsequently.

Action blocks
The graphic programming of steps is effected via individual action
blocks. Each action is thereby connected with a particular characteristic.
An action block is represented in tabular format, which contains fixed
positions for the specification of the action qualifier, the name of the ac-
tion and the action content. In addition, a feedback variable may also be
entered.

Fig. B11.11:
Graphic representation
of action block
a b c
d

Field a: Action qualifier:

N = non stored D = time delayed
S = set, stored DS = time delayed and stored
R = reset SD = stored and time delayed
P = pulse (unique) SL = stored and time limited
L = time limited
Field b: Name of action
Field c: Feedback variable
Field d: Action content

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Chapter 11

Again, the name b of an action represents a standard symbolic identifier,

which acts purely as a means of differentiation and has no further sig-
nificance.
Since a list of actions often forms part of a step, it may also be repre-
sented in conjunction with this.

Fig. B11.12:
List of action blocks

Step_8 L
Action_1 Var_1
T#10s
Var_1
P Action_2
N Action_3

The assignment of actions to a step in graphic form is effected by means

of action blocks.
The assignment may however also be formulated textually. In the case
of the example shown in fig. B11.12, this results in the following repre-
sentation:

STEP Steps_8: Fig. B11.13:

Action_1( L, T#10s, Var_1 ); Textual representation of a
Action_2( P ); step with actions
Action_3( N );
END_STEP

The contents of an action, i.e. the action itself, may be defined by means
of several methods:

Specification of a boolean variable

Programming in instruction list

Programming in structured text

Ladder diagram

Function block diagram

Sequential function chart

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Chapter 11

The use of a boolean variable represents a simple and frequently used

form of an action. In many cases, however, more complex actions con-
taining a useful logic connection of different information will be required.
In the examples B11.14 to B11.16, the output %QX1.2 is set, if input
%IX0.5 is set or if flags %MX1 and %MX3 are set. If neither is the case
output %QX1.2 is reset.

Fig. B11.14:
Formulation of actions: Action_2
graphic declaration in FBD
%IX0.5 >=1 %QX1.2
%MX1 &
%MX3

Fig. B11.15:
Formulation of actions: Action_2
graphic declaration in
LD language %IX0.5 %QX1.2

%MX1 %MX3

Fig. B11.16: IL language ST langugae

Formulation of actions::
textual declaration
ACTION Action_2: ACTION Action_2:
LD %IX0.5 %QX1.2 := %IX0.5 OR (%MX1 AND %MX3);
OR( %MX1 END_ACTION
AND %MX3
)
ST %QX1.2
END_ACTION

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Chapter 11

Instead of an individual network of a statement sequence, several net-

works are also permissible within an action in textual languages. In this
way, it is possible to incorporate a very wide range of actions in a step,
and again a step itself may contain sequence structures (fig. B11.17).

Fig. B11.17:
Action_4 Formulation of actions:
Inclusion of SFC elements
in an action

Start

Part_present

Color L Color_determine
T#1s
C_ok

If individual fields of an action block are not required, such as for in-
stance if a boolean variable is used as action content, a further simplifi-
cation in the representation of an action block is permissible.

Fig. B11.18:
Short representation
S %QX12 of an action block

A feedback variable (c field) may be entered in each action block. Feed-

back variables are programmed within actions by the user and indicate
their completion, timeout or error conditions. Fig. B11.19 indicates a fre-
quently recurring application. Here the sequence of steps and transitions
is structured in such a way that the action of a step sets the subsequent
step enabling condition.

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Chapter 11

Fig. B11.19:
Use of
feedback variables

Step_2 S Cylinder_1 Pos_1

Pos_1

Step_3 S Cylinder_2
S Vacuum_on Vac_on
Vac_on

Step_4 R Cylinder_1 Pos_2

Pos_2

Mode of action of action qualifiers

The type of execution of the actions programmed by the user is defined
by the associated action qualifier.
EN 61131-3 (IEC 61131-3) defines the following action qualifiers

N Non-stored

S Set (stored)

R Overriding reset

P Pulse (unique)

L Time limited

D Time delayed

DS Time delayed and stored

SD Stored and time delayed

SL Stored and time limited

Each action is the equivalent of exactly one of these qualifiers. In addi-

tion, the qualifiers L, D, DS, SD, SL have an associated duration of type
Time, since these define a time behaviour of the action.

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Chapter 11

The qualifiers have a precisely defined significance. If a step is inactive,

none of the action of the step is executed. With an active step, the fol-
lowing methods apply for the execution of an action qualifier.

N Non-stored

the action is executed for as long as the step is active.

Fig. B11.20:
Non-stored action
N %QX12

Step 1
active 0
1
%QX12
0

In the above example, the output %QX12 is set for as long as the step
containing this action is active. On completion of the step, i.e. as soon
as the subsequent enabling condition is met, the output is automatically
reset.

S Set (stored)

the execution of the action is executed permanently set (set stored).

Fig. B11.21:
Set (stored) action
S %QX12

Step 1
active 0
1
%QX12
0

In this example, the output %QX12 is set for as long as the step contain-
ing this action is active. The output also remains set, when the subse-
quent step enabling condition is met and the step being considered is no
longer active. The output can only be reset in another step, in another
action, defined with qualifier R.

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Chapter 11

R Reset

a previously set action (in another step) executed with the qualifier S,
DS, SD, L or SL is cancelled.

Fig. B11.22:
Reset action
R %QX12

Step 1
active 0
1
%QX12
0

Output %QX12 has been set in another step in an action with one of the
qualifiers S, DS, SD, L or SL and reset again via this action.

P Pulse (unique)

unique execution of the action.

Fig. B11.23:
Unique action
P %QX12

Step 1
active 0
1
%QX12
0

During the initial execution of the action via the controller within the
processing of the step, output %QX12 is set exactly once and then reset
again. The output is reset uniquely again only after the exiting the step
and a fresh re-entry into the step.

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Chapter 11

L Time limited

the action is executed for a specific time.

Fig. B11.24:
Time limited action
L
%QX12
T#10s

Step 1
active 0
1
%QX12 10s 10s
0

Output %QX12 is set for 10 seconds and subsequently reset again. This
requires the step containing this action to be active for a period of at
least 10 seconds. If the subsequent step enabling conditions are met
prior to this time, the action time of the output is reduced also, since it is
reset at the end of the step in any case.

D Time delayed

the execution of the action is delayed until the end of the step.

Fig. B11.25:
Time delayed action
D
%QX12
T#10s

Step 1
active 0
1
%QX12 10s 10s
0

Here, output %QX12 is not set until 10 seconds have expired and re-
mains set until the step becomes inactive. If the duration during which
the step is activated is less than 10 seconds, the output will not be set
during the processing of this step.

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Chapter 11

DS Time delayed and stored

the execution of the action is time-delayed and maintained beyond
the end of the step.

Fig. B11.26:
Time delayed and
stored Action DS
%QX12
T#10s

Step 1
active 0
10s 10s

1
%QX12
0

R 1
active 0
(in another step)

In this example too, output %QX12 is set after 10 seconds have expired.
However, it remains set after completion of the step. It must be reset
explicitly via another action with the qualifier R (in another step). If the
duration of the step is not sufficiently long, in this case less than 10 sec-
onds long, the output will never be set.

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Chapter 11

SD Stored and time delayed

the execution of the action is time delayed and is maintained beyond
the end of the step.

Fig. B11.27:
Stored and
SD time delayed action
%QX12
T#10s

Step 1
active 0
10s 10s

1
%QX12
0

R 1
active 0
(in another step)

Here too, output %QX12 is set after the expiry of 10 seconds. It remains
set following the end of the step and can only be explicitly reset via an-
other action with the qualifier R in another step. Unlike the mode of ac-
tion of the DS qualifier, it is not necessary for the step to remain active
beyond the duration of the delay for the output to be set.

SL Stored and time-limited

the action is executed continuously for a specific period.

Fig. B11.28:
Stored and
SL time limited action
%QX12
T#10s

Step 1
active 0
10s 10s

1
%QX12
0

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Chapter 11

The output is set for 10 seconds and then reset again. In contrast with
the mode of action of the L qualifier, it is not necessary for the step to be
active for a minimum of 10 seconds.
If the subsequent step enabling condition is met prior to this time expir-
ing, i.e. if the step is active for less than 10 seconds, the active period of
the output remains unaffected by this. The output can be reset at any
time via another action with the qualifier R.
The mode of action of the individual qualifiers has been illustrated in the
example of a boolean variable as an action. If more complex, i.e. non
boolean actions are required, the type of execution is marginally different
to the previously examined boolean variables. The networks are con-
tinually processed for as long as the step is active. As soon as the sub-
sequent step enabling condition is met, however, the last, unique,
execution of the networks is carried out once more.
This definition enables the targeted resetting of variables at the end of
the processing of an action, when the N qualifier is used for more com-
plex actions.

Fig. B11.29:
Complex action
in FBD language
Step_5 N Action_1

&
%IX1.0 %QX1.0
%MX12
Step_5.X

SR_1

SR
%IX1.5 S1 Q1 %QX1.5
R

If step Step_5 is deactivated, the last processing of the networks takes

place with the value 0 for step flag Step_5.X. This results in output
%QX1.0 being reset to 0 when the step is exited.

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Chapter 11

11.5 Example
Problem description
Components are transported together on a conveyor belt to a dual proc-
essing station. The drilling and countersinking units then move down-
wards as soon as a component is present. Two cylinders 1A1 and 2A1
are used to move the two machine tools. The conveying device is in-
dexed by one working position via a third cylinder 3A1.
Two sensors B4 and B5 are provided to detect whether a workpiece is
located underneath the drill or the countersink. The required drilling and
countersink depths are sensed via two end position sensors 1B2 and
2B2. The initial positions of the transport cylinder, drill and countersink
can be detected via the values of sensors 1B1, 2B1 and 3B1. Sensor
3B2 indicates an extended transport cylinder.
The system cannot always guarantee that a workpiece will be deposited
underneath both the drill unit and the countersink after each transport
movement. Processing should then be interrupted in the case of a miss-
ing workpiece. If both workpieces are missing at the same time, neither
of the two tools should be lowered.

Fig. B11.30:
Positional sketch
1A1 2A1

1B1 2B1

1B2 2B2

B4 B5

3A1

3B1 3B2

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Chapter 11

Allocation list
Table B11.4: Equipment PLC input/ Task
Allocation list designation PLC output

B4 %IX0.1 Detecting workpiece under the drill

B5 %IX0.2 Detecting workpiece under countersink
1B1 %IX0.3 Initial position of drill unit (up)
2B1 %IX0.4 Initial position of countersink (up)
3B1 %IX0.5 Initial position of transport cylinder
1B2 %IX0.6 Lower end position of drill unit reached
2B2 %IX0.7 Lower end position of countersink reached
3B2 %IX0.8 Transport cylinder extended
1Y1 %QX0.1 Lower drill unit
2Y1 %QX0.2 Lower countersink
3Y1 %QX0.3 Transport feed

Problem
A control program is to be designed for this task. The solution is to
achieve a configuration by means of a sequential function chart. The
conditions and actions are then to be applied to the steps and transi-
tions. The program is to be executed cyclically.
To simplify matters, you may assume that there is no need to use timers
to compensate for positioning tolerances.

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Chapter 11

Solution

Fig. B11.31:
Program in
sequence language

Start R 1Y1
R 2Y1
1B1 2B1 3B1 R 3Y1

B4 B4 B5 B5
/ /

Drill S 1Y1 Countersink S 2Y1

1B2 2B2

D_up R 1Y1 C_up R 2Y1

1B1 2B1

Transport S 3Y1
3B2

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Chapter 11

All cylinders are brought into their initial position in one initial step. At the
end of the program, this step is also used to retract the cylinder ex-
tended during the last step for the transport device.
When all the cylinders are in their initial position, a parallel branch with
two sequences is started for drilling and countersinking. Both sequences
in this example contain the same tasks, but use different tools. The left-
hand sequence lowers the drill unit and lifts it again, and the righthand
sequence evolves identically for the countersinking. The sequences
merely differ in their use of sensors and actuators. A void step is incor-
porated at the top and bottom of both sequences to maintain the neces-
sary sequence steps and transitions.
The program for the drilling unit evolves as follows. It detects whether a
workpiece is available via the value of sensor B4. If this value is equal to
1, the workpiece is in the required position and the drilling process
starts. Otherwise the entire drilling process is bypassed in an alternative
path. Drilling of the hole starts with the lowering of the drill by setting
1Y1. When the lower end position is reached, i.e. drilling of the hole has
been completed, sensor 1B2 signals the end of drilling. In the next step,
the drill is returned to its normal position at the top. This part of alterna-
tive branching ends when the drill has reached the top. The program
follows the same procedure for countersinking.
When both parallel sequences have been completed, a transition takes
place in the program to the transport step. The necessary synchronisa-
tion – i.e. drilling and countersinking ready – is ensured by the sequen-
tial function chart and therefore does not require special treatment. A
true step enabling condition is always inserted at this point in order for
the steps and transitions to alternate.
In the last step Transport, the cylinder of the transport device is ex-
tended and the awaited completed action in the next transition condition.
Thereafter, the whole process starts anew.

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Chapter 12

Logic control system

12.1 What is a logic control system
Logic control systems are controllers programmed through the use of
boolean operations. All logic operations are processed and executed
during a machining cycle.
Control tasks realised typically in the form of logic control, are character-
ised by the fact that no time duration is given within the process, but all
or most of the conditions of the control program are examined simulta-
neously.
Examples of logic control systems can therefore be found in PLC appli-
cations, where safety aspects are of importance. The monitoring of cer-
tain tasks is often required to be permanent and independent of the
time-related execution of the process. These requirements apply for in-
stance in:

Protective circuits: a device may only load, if all protective devices are
switched on

Safety interlocking

12.2 Logic control systems without latching properties

Logic control systems without latching properties may be described by
means of a combination of boolean operations, whereby the output sig-
nals of a controller are determined by a combination of input signals at a
given time.
The basic logic operations AND, OR and NOT may be used to create
any complex logic operations – and as such also control systems.
A number of boolean algebra methods such as function tables, Boolean
equations and disjunctive normal form (DNF) are used to describe the
problem and to find a solution. The importance of these methods is
demonstrated amongst other things in the more complex applications for
logic control systems. The actual programming of a logic control system
is preferably in the languages ladder diagram or function block diagram.

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Chapter 12

Typical boolean operations

The following represents basic control technology tasks such as boolean
operations realised via PLC.
The solutions are represented in the languages LD, FBD, IL and ST. The
solution sections are preceded by a declaration of the necessary PLC
inputs and outputs. In addition, the description options of a function table
and boolean equation are also listed.

Negation
The output signal assumes the value 1, if the input signal has the value
0 and vice versa.
Example Lamp H1 is illuminated as long as switch S1 is not actuated; it is extin-
guished, if the switch is closed. The purpose of S1 is therefore to switch
off the lamp.

Fig. B12.1:
Description methods
Function table Boolean equation

S1 H1 H1 = S1
0 1
1 0

Fig. B12.2: VAR

Declaration of variables S1 AT %I2.5: BOOL;
H1 AT %Q1.4: BOOL;
END_VAR

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 B-141
Chapter 12

Fig. B12.3:
Negation
a) LD b) FBD
S1 H1

/ S1 NOT H1

c) IL d) ST
LDN S1 H1 := NOT S1;
ST H1

AND-operation
The output signal only assumes the value 1, if all input signals have the
value 1.
Lamp H1 is to be switched on only if the two switches S1 ad S2 are ac- Example
tuated.

Fig. B12.4:
Function table Boolean equation Description methods

S1 S2 H1 H1 = S1 S2
<

0 0 0
0 1 0
1 0 0
1 1 1

VAR Fig. B12.5:

S1 AT %I2.5: BOOL; Declaration of variables
S2 AT %I2.6: BOOL;
H1 AT %Q1.4: BOOL;
END_VAR

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B-142
Chapter 12

Fig. B12.6:
AND operation a) LD b) FBD
S1 S2 H1
S1 & H1
S2

c) IL d) ST
LD S1 H1 := S1 AND S2;
AND S2
ST H1

OR-operation
The output signal assumes the value 1, if at least one input signal has
the value 1.
Example Lamp H1 is to be switched on, if at least one switch, S1 or S2 is actu-
ated.

Fig. B12.7:
Description methods Function table Boolean equation

S1 S2 H1 H1 = S1 S2
<

0 0 0
0 1 1
1 0 1
1 1 1

Fig. B12.8: VAR

Declaration of variables S1 AT %I2.5: BOOL;
S2 AT %I2.6: BOOL;
H1 AT %Q1.4: BOOL;
END_VAR

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Chapter 12

Fig. B12.9:
a) LD b) FBD OR operation

S1 H1
S1 >=1 H1
S2

S2

c) IL d) ST
LD S1 H1 := S1 OR S2;
OR S2
ST H1

Combined logic operations

Lamp H1 is to be illuminated only, if precisely two of the three switches Example
S1, S2, S3 are actuated.
The first to be created is the function table, whereby those combinations
are selected, which provide the result 1. These are lines 4, 6 and 7. The
boolean equation and thus the solution can be created on the basis of
this combination. The conversion of the solution into the individual pro-
gramming languages is contained in fig. B12.12.

Fig. B12.10:
Function table Boolean equation Description methods

S1 S2 S3 H1 H1 = (S1 S2 S3)
0 0 0 0 (S1 S2 S3)
0 0 1 0 (S1 S2 S3)
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0

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Chapter 12

Fig. B12.11: VAR

Declaration of variables S1 AT %I2.5: BOOL;
S2 AT %I2.6: BOOL;
S3 AT %I2.7: BOOL;
H1 AT %Q1.4: BOOL;
END_VAR

Fig. B12.12:
Combination of a) LD b) FBD
boolean operations
S1 S2 S3 H1 S1 &
/ S2
S3
S1 S2 S3
S1 & >=1 H1
/ S2
S3
S1 S2 S3
S1 &
/
S2
S3

c) IL d) ST
LD ( S3 H1 := (NOT S1 AND S2 AND S3)
AND S2 OR (S1 AND NOT S2 AND S3)
ANDN S1 OR (S1 AND S2 AND NOT S3);
)
OR ( S1
ANDN S2
AND S3
)
OR ( S1
AND S2
ANDN S3
)
ST H1

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Chapter 12

12.3 Logic control systems with memory function

Many PLC applications require elementary memory operations. A mem-
ory function constitutes the retention, i.e. storage of a briefly occurring
signal status. At a given instant, the output signals are dependent not
only on the combination of input signals, but also on "previous statuses".
The example given here is that of a switch for switching on and off a
lamp.
EN 61131-3 (IEC 61131-3) defines two function blocks for the realisation
of memory functions. These are function block SR (primarily setting) and
RS (primarily resetting). A description of the blocks follows below.

Function block SR
Fig. B12.13:
Function block SR,
SR primarily setting
BOOL S1 Q1 BOOL
BOOL R

The standard function block SR contains a dominant setting flipflop

(bistable memory with preferred status 1). A 1-signal at the setting input
S1 sets the flipflop, i. e. the value of Q1 becomes 1. The value which
applies at reset input R is immaterial. A 1-signal at reset input R only
brings output Q1 to value 0, if set input S1 is also 0. The set input with
this flipflop is therefore dominant.

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Chapter 12

Function block RS
Fig. B12.14:
Function block RS,
primarily resetting RS
BOOL S Q1 BOOL
BOOL R1

The standard function block RS contains a dominant resetting flipflop

(bistable memory with preferred status 0). A 1-signal at the reset input
R1 resets the flipflop, i.e. the value of Q1 becomes 0. The value which
applies at the setting input S is immaterial.
The following example illustrates the use of elementary memory opera-
tions.
Example If sensor B1 has a 1-Signal, this indicates an error status in the system.
A horn H1 is sounded. The horn can only be switched off by actuating
push-button S1. It is possible to switch off the horn, even if the B1- sig-
nal continues to be applied.

Fig. B12.15: VAR

Declaration of variables B1 AT %IX1 : BOOL; (* Sensor detects error status *)
S1 AT %IX2 : BOOL; (* Push button *)
H1 AT %QX1 : BOOL; (* Horn *)
RS_H1 : RS; (* Flip-flop named RS_H1 for Status *)
(* of horn *)
END_VAR

In the languages FBD and ST, memory operations are realised by invok-
ing a copy of the RS function block. The copy in this example has the
name RS_H1. The invocation in FBD is effected by means of graphically
linking the current transfer parameters with the inputs of the function
block copy. Since the value of the function block copy is relevant, the
output of the function block copy is connected correspondingly.

TP301 • Festo Didactic

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Chapter 12

Fig. B12.16:
a) LD b) FBD Use of function blocks RS
B1 H1 RS_H1

S RS
B1 S Q1 H1
S1 H1
S1 R1
R

c) IL d) ST
LD B1 RS_H1 (S := B1, R1 := S1);
S H1 H1 := RS_H1.Q1;
LD S1
R H1

or

CAL RS_H1 (S := B1, R1 := S1)

LD RS_H1.Q1
ST H1

In the textual language ST, the invocation is effected by means of speci-

fying the function block copy. The current parameters are also listed
simultaneously. The value of the output of the function block copy
RS_H1 can be accessed via the variable RS_H1.Q1; the name of the
output variable is therefore defined via the names of the function block
copy and the names of the desired output.
The languages LD and IL have their own operations for stored setting or
resetting of variables, whereby the use of an RS function block can be
omitted. It should be noted that the sequence of set and reset com-
mands is crucial for the behaviour of the PLC. The command, which is to
be dominant – in this instance the reset command – must only occur
after the set command in the program, so that it is the last command to
be executed and thereby determines the behaviour – in this case the
output.

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12.4 Edge evaluation

Signals reaching the inputs via sensors are evaluated as 0 or 1 signals
by the central control unit of the PLC, whereby the duration of signal
statuses 0 and 1 is determined by the sensor.
For instance: A 1-signal applies for as long as a push button is pressed,
otherwise a 0-signal is received.
In many cases, however, it is not the signal itself which matters, but the
exact instant, during which the signal changes. This type of signal
change is termed Edge.
Example To elucidate this, imagine the switches (push buttons) of a lighting sys-
tem, where the edge evaluation is mechanically implemented. By actuat-
ing the push button, the light comes on (irrespective of how long this
push button is pressed). If the push button has been released in the
meantime, the light may be switched of by pressing the push button
again.
In exactly the same way, the moment in which the input signal changes
from 0 to 1 must be registered in a PLC, since only ever one single reac-
tion per push button actuation may be triggered (196 irrespective of how
long the 1-signal applies. This prevents a process from being put in mo-
tion repeatedly by the controller, should a push button be actuated for
too long. The edges of the input signal are evaluated for each program.
In this context it is referred to as edge detection. Each binary signal has
a rising and a falling edge:

Fig. B12.17:
Rising and falling edge rising rising
edge edge
1

0
falling falling
edge edge

Rising edges
mark the instants, in which a signal level changes from 0 to 1.
Falling edges
mark the exact instants, when a signal level changes from 1 to 0.

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Chapter 12

Whether rising or falling edges are evaluated within a program or func-

tion block depends on how the respective sensor is wired (normally
closed/normally open contact) and how it is used.
A push button (normally open contact), for instance, creates a rising
edge the moment it is pressed and a falling edge the moment it is re-
leased.
EN 61131-3 (IEC 61131-3) provides two standard function blocks for the
evaluation of edges

Function block R_TRIG, rising edge

The standard function block R_TRIG (rising) is used for the detection of
rising or positive edges. Its output Q has the value 1 from one execution
of the function block to the next, if its input CLK (Clock for pulse)
changes from 0 to 1.

Fig. B12.18:
Function block R_TRIG,
R_TRIG rising edge
BOOL CLK Q BOOL

Function block F_TRIG, falling edge

A falling or negative switching edge is detected by means of the function
block F_TRIG (falling). If a change has taken place at input CLK from 1
to 0, output Q assumes the value 1 for one processing cycle.

Fig. B12.19:
Function block F_TRIG,
F_TRIG falling edge
BOOL CLK Q BOOL

The following example shows the programming of the edge evaluation in

the languages FBD, LD, IL and ST, whereby the rising edges are evalu-
ated.

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Chapter 12

Example Actuation of a push button S1 causes the door of a furnace to be

opened. A repeat actuation of push button S1 causes the door to be
closed.

Fig. B12.20: VAR

Declaration of variables S1 AT %IX1 : BOOL; (* Switch for door *)
1Y1 AT %QX1 : BOOL; (* Coil for actuation of cylinder *)
(* for door *)
RS_1Y1 : RS; (* Flip-flop named RS_1Y1 *)
(* for status of coil *)
R_TRIG_S1 : R_TRIG; (* Function block named *)
(* R_TRIG_S1 *)
(* for detection of edge at S1 *)
END_VAR

Fig. B12.21: a) LD
Use of function blocks
R_TRIG S1 1Y1 1Y1

P / S

S1 1Y1 1Y1

P R

b) FBD
RS_1Y1
R_TRIG_S1 1Y1 & RS
R_TRIG S Q1 1Y1
S1 CLK Q R1
&
1Y1

c) IL
CAL R_TRIG_S1 (CLK := S1)
LD R_TRIG_S1.Q
ANDN 1Y1
S 1Y1
LD R_TRIG_S1.Q
AND 1Y1
R 1Y1

d) ST
R_TRIG_S1 (CLK := S1);
RS_1Y1 (S := R_TRIG_S1.Q & NOT 1Y1,
R1 := R_TRIG_S1.Q & 1Y1);
1Y1 := RS_1Y1.Q1;

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Chapter 12

In the languages FBD, IL and ST, edge detection is effected by means

of invoking a R_TRIG function block. The name of the function block
used in the example is R_TRIG_S1; R_TRIG_S1 represents a copy of
the function block type R_TRIG.
The LD language has special contacts for the evaluation of edges,
whereby the invocation of an R_TRIG function block is omitted.

TP301 • Festo Didactic