12. A computer uses a memory unit with 256k words of 32 bits each.
A binary instruction code is stored in one
word of memory. The instruction has four parts, an indirect bit, an operation code, a register code part to
specify one of 64 registers, and an address part
i. How many bits are there in the operation code, the register code part, and the address
ii. Draw the instruction word format and indicate the number of bits in each part.
iii. How many bits are there in the data and address inputs of the memory?
13. The memory unit of a computer has 256k words of 32 bits each. The computer has an instruction format
with for fields: an operation code field, a mode field to specify one of seven addressing modes, a register
address field to specify one of 60 processor registers and a memory address. Specify the instruction format
and the number of bits in each field if the instruction is in one memory word.
14. Suppose you have a machine used in an I/O intensive environment; the CPU is working 75% of the and
the rest is waiting for I/O operations to complete. You may consider an improvement of the CPU by a
factor of 2 (it will run twice as fast as it runs now) for a fivefold increase in cost. The present cost of the
CPU is 20% of the machine's cost. Is the suggested improvement cost effective?
15. Suppose you have enhanced your machine with a floating-point coprocessor; all floating-point operations
are faster by a factor of 10 when the coprocessor is in use. What percent of the time should be spent in
floating point operations such that the overall speedup is 2?
16. Briefly describe Pipelining and its limitation.
17. A 8 Megapixel digital camera stores an eight-bit number for the brightness of each of the primary colours
(red, green, blue) found in each picture element (pixel). If every bit is stored (no data compression), how
many pictures can be stored on a 256 Megabyte memory card.
18. Discuss computer memory hierarchy in terms of size, speed and cost.
19. Difference between the two types of control units used to execute an instruction
20. A processor has a five-stage pipeline. If a branch is taken, then four cycles are needed to flush the pipeline.
The branch penalty b is thus 4. The probability Pb that a particular instruction is a branch is 0.25. The
probability P t that the branch is taken is 0.5. Compute the average number of cycles needed to execute an
instruction, and the execution efficiency.
21. What is meant by sub-word parallelism?
22. What is Computer Architecture? Briefly explain the following terms:
Interrupts (ii) Instruction formats (iii) Multiplexers (iv) Decoders
23. Consider the following quadratic equation: 2x2 – 40x + 150 = 0. A trusted mathematician tells us that the
roots for this equation are 15 and 75. However, when you try to solve it, the roots turns out to be 15 and 5.
Explain why 75 could be a solution while 5 is not.
24. Four memory hierarchy questions are as follows: Where can a block be placed (block placement)? How is
a block found (block identification)?; Which block is to be replaced on a miss (block replacement)?; and
What happens on a write (write strategy)? Provide answers to each of the four common memory hierarchy
questions for cache memory.
25. What are the disadvantages of increasing the number of stages in pipelined processing?
26. Consider a nonpipelined machine with 6 execution stages of lengths 50ns, 50ns, 60ns, 60ns, 50ns, and 50ns.
i. Find the instruction latency on this machine.
ii. How much time does it take to execute 100 instructions?
27. Describe, with the aid of diagram, Flynn’s Classification of Computer Architecture.
28. What are the basic differences between a branch instruction, a call subroutine and program interrupt?
29. Write a program to evaluate the arithmetic statement