INTA
RST 7.5 RST 5.5
INTR RST 6.5 TRAP SID SOD
Interrupt Control Serial I/O control
8 Bit Internal Data Bus
Accumulator (8) Temp Reg (8) Instruction Multiplexer
Reg (8) (8)
Flag (5) W (8) Z (8)
Flip Flops B (8) C (8)
D (8) E (8) Reg Array
Reg Select
H (8) L (8)
Instruction Stack Pointer (16)
ALU Decoder and
Program Counter (16)
(8) Machine
Incrementor / Decrementer
Cycle
Address Latch (16)
Encoder
Data/Address Buffer
Address (8)
X1 CLK Buffer (8)
X2 GEN RESET
Control Status DMA
CLK OUT RD WR S0 S1 IO/M A15-A8 AD7-AD0
ALE HLDA RESET
Ready Address Bus Address/Data
HOLD RESET OUT
IN Bus