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8051 Microcontroller Overview and Features

The document provides an overview of the 8051 microcontroller, detailing its architecture, features, and comparison with microprocessors. Key features include on-chip memory, I/O ports, timers, and interrupts, along with a pin diagram and functional descriptions of various components. It also discusses the architecture, instruction set, and operational capabilities of the 8051 microcontroller.
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0% found this document useful (0 votes)
10 views33 pages

8051 Microcontroller Overview and Features

The document provides an overview of the 8051 microcontroller, detailing its architecture, features, and comparison with microprocessors. Key features include on-chip memory, I/O ports, timers, and interrupts, along with a pin diagram and functional descriptions of various components. It also discusses the architecture, instruction set, and operational capabilities of the 8051 microcontroller.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

UNIT–5

8051MICROCONTROLLER
Overview of 8051 microcontroller, Architecture, I/O ports, Memory organization, addressing
modes and instruction set of 8051, Simple programs.

MICROCONTROLLERS VS MICROPROCESSORS
MICROPROCESSOR:
 A CPU built into a single VLSI chip is called a microprocessor.
 It is a general-purpose device and additional external circuitry is added to
make it a microcomputer.
 The microprocessor contains arithmetic and logic unit (ALU), Instruction
decoder and control unit, Instruction register, Program counter (PC), clock
circuit (internal or external), reset circuit (internal or external) and registers.
 But the microprocessor has no on chip I/O Ports, Timers, Memory etc.
 For example, Intel 8085 is an 8-bit microprocessor and Intel 8086/8088 a 16-
bit microprocessor.
 The block diagram of the Microprocessor is shown in Fig.1
MICROCONTROLLER:
 A microcontroller is a highly integrated single chip, which consists of on chip
CPU (Central Processing Unit), RAM (Random Access Memory),
EPROM/PROM/ROM (Erasable Programmable Read Only Memory), I/O
(input/output) – serial and parallel, timers, interrupt controller.
 For example, Intel 8051is 8-bit microcontroller and Intel 8096 is16-bit
microcontroller.
 The block diagram of Microcontroller is shown in Fig. 2.

Fig.1 Block diagram of a Microprocessor Fig.2 Block Diagram of a Microcontroller

Page1
DISTINGUISH BETWEEN MICROPROCESSOR AND MICROCONTROLLER:

Table 1: Microprocessor Vs Microcontroller


[Link] Microprocessor Microcontroller
A microprocessor is a general
A microcontroller is a dedicated chip
1 purpose device which is called
which is also called single chip
a
computer.
CPU
A microcontroller includes RAM, ROM,
A microprocessor do not
serial and parallel interface, timers,
2 contain on chip I/O Ports,
interrupt circuitry(in addition to
Timers, Memories etc..
CPU)in a
single chip.
Microprocessors are Microcontrollers are used in
3 most commonly small, minimum
used as the CPU in component designs performing
Microcomputer systems control-oriented applications.
Microprocessor instructions Are Microcontroller instructions are both
4 bit
Mainly nibble or byte
addressable Addressable as well as byte
addressable.
Microprocessor instruction sets Microcontrollers have instruction sets
5 are Catering to the control of inputs and
Mainly intended for catering to outputs.
large volumes of data.
Microprocessor based system Microcontroller based system design
6 is
Design is complex and
expensive Rather simple and cost effective
The instruction set of a
The Instruction set of
Microcontroller is very simple with
7 microprocessor is complex
less number of instructions. For, ex:
with large number of
PIC microcontrollers
instructions.
Have only 35 instructions.
A microprocessor haszero
8 A microcontroller has no zero flag.
status
flag

The salient features of 8051 Microcontroller are:


 4KB on chip program memory (ROM or EPROM).
 128 bytes on chip data memory (RAM).
 8-bit data bus
 16-bit address bus
 32 general purpose registers each of 8bits
 Two-16 bit timers T0 and T1
 Five Interrupts (3 internal and 2 external).
 Four Parallel ports each of 8-bits (PORT0, PORT1, PORT2, PORT3) with a total
of 32I/O lines.

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 One16-bit program counter and One16-bit DPTR(data pointer)
 One8-bit stack pointer
 One Microsecond instruction cycle with12 MHz Crystal.
 One full duplex serial communication port.

Page3
PIN DIAGRAM OF 8051:
 The 8051 microcontroller is available as a 40 pin DIP chip and it works at+5
volts DC.
 VCC→5Vsupply
 VSS→GND
 XTAL2/XTALI are for oscillator input
 Port 0–32to39–AD0/AD7andP0.0toP0.7
 Port1–1to 8– P1.0 to P1.7
 Port2–21to28–P2.0 to P2.7and A 8to A15
 Port3–10 to 17–P3.0 to P3.7
 P3.0–RXD–Serial data input –SBUF
 P3.1–TXD–Serial data output–SBUF
 P3.2–INT0–External interrupt 0–TCON0.1
 P3.3–INT1–External interrupt1 –TCON0.3
 P3.4–T0–External timer 0 input–TMOD

Fig 3: Pin Diagram of 8051


 XTAL1,
XTAL2:
o These two pins are connected to Quartz crystal oscillator which runs
the on-chip oscillator.
o The quartz crystal oscillator is connected to the two pins along with a
capacitor of 30pF as shown in the figure 4.
o If we use a source other than the crystal oscillator, it will be connected
to XTAL1 and XTAL2 is left unconnected as shown in figure 5.

Page4
Fig 4 Crystal Oscillator as Source Fig 5ExternalClockSource

 P0.0-P0.7(AD0-AD7):
o The port 0 pins multiplexed with Address/data pins.
o If the microcontroller is accessing external memory these pins will act
as address/data pins otherwise they are used for Port 0 pins.
 P2.0-P2.7(A8-A15):
o The port 2pins are multiplexed with the higher order address pins.
o When the microcontroller is accessing external memory these pins
provide the higher order address byte otherwise they act as Port 2
pins.
 P1.0-P1.7:
o These 8-pins are dedicated for Port1 to perform input or output port
operations.
 P3.0-P3.7:
o These8-pins are meant for Port3 operations and also for some control
operations like Read, Write, Timer0, Timer1, INT0, INT1, RxD and TxD
 RST:
o The RESET pin is an input pin and it is an active high pin.
o When a high pulse is applied to this pin the microcontroller will reset
and terminate all activities.
o Upon reset all the registers except PC will reset to 0000 Value and PC

 ̅𝑬̅̅ 𝑨̅
register will reset to 0007 value.
(External Access): Active Low Pin
o This pin is connected to ground when microcontroller is accessing the
program code stored in the external memory and connected to Vcc
when it is accessing the program code in the on chip memory.

 ̅𝑷̅𝑺̅𝑬̅ 𝑵̅ ( P r o g r a m Store Enable):Active Low Pin


o This pin should not be left unconnected.

o When the microcontroller is accessing the program code stored in the


external ROM, this pin is connected to the OE (Output Enable) pin of
the ROM.
 ALE(Address latch enable):Active High Pin
o When connected to external memory, port 0 provides both address
and data i.e address and data are multiplexed through port 0.
o This ALE pin will demultiplex the address and data bus.

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o When the pin is High, the AD bus will act as address bus otherwise the
AD bus will act as Data bus.

Page6
8051 ARCHITECTURE

Fig 6: Block Diagram of 8051

Fig 7: Architectural block diagram of microcontroller 8051

Page7
 Mostly used blocks in the architecture of 8051 are as follows:
 ALU
o Arithmetic Logical Unit
o This unit is used for the arithmetic calculations.
 A-Accumulator
o This register is used for arithmetic operations.
o This is also bit addressable and 8bit register.
 B-Register
o This register is used in only two instructions MUL A Band DIV AB.
o This is also bit addressable and 8bit register
 PC-Program Counter
o Points to the address of next instruction to be executed from ROM
o It is 16 bit register means the 8051 can access program address from
0000H to FFFFH. A total of 64KB of code.
o InitiallyPChas0000H
o ORG instruction is used to initialize the PC
 ORG0000H means PC initialize by 0000H
o PC is incremented after each instruction. ROM
 PSW Register (8051Flags)
o Used to indicate the Arithmetic condition of Accumulator.
o Flag register in 8051 is called as program status word (PSW).
o This special function register PSW is also bit addressable and 8 bit wide
means each bit can be set or reset independently.

o The meaning of various bits of PSW register is shown below.

Table 2:PSW Register Description


CY PSW0.7 Carry Flag
AC PSW0.6 Auxiliary Carry Flag
F0 PSW0.5 Flag0availableforgeneralpurpose.
RS1 PSW0.4 RegisterBankselectbit1
RS0 PSW0.3 Registerbankselectbit0
OV PSW0.2 Over flow flag
--- PSW0.1 User definable flag
P PSW0.0 Parity flag. set/cleared by hardware.
o The bits PSW3 and PSW4 are denoted as RS0 and RS1 and these bits
are used to select the bank registers of the RAM location.
o P(Parity flag)→PSW0.0
 1–oddnumber of 1 in ACC
 0–even number of 1 in ACC

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o OV(over flow flag) →PSW0.2
 This is used to detect error in signed arithmetic operation.
 This is similar to carry flag but difference is only that carry flag is
used for unsigned operation.
o The selection of the register Banks and their addresses are given below.

Table 3:Register Bank Selection


RS1 RS0 Register Bank Address
0 0 0 00H-07H
0 1 1 08H-0FH
1 0 2 10H-17H
1 1 3 18H-1FH
 Initially by default always Bank0 is selected.
o F0→user definable bit
o AC(Auxiliary carry flag) →PSW0.6
 When carry is generated from D3toD4,it is set to, it is used in
BCD arithmetic.
o CY(carry flag)→PSW0.7
 Affected after 8bit addition and subtraction.
 It is used to detect error in unsigned arithmetic operation.
 It can be used as single bit storage.
 SET BC →for cy=1
 CLR C →for cy=0
 Stack in 8051
o RAM locations from 08H to 1FH can be used as stack. Stack is used to
store the data temporarily.
o Stack is last in first out(LIFO)
o Stack pointer(SP)
 8bitregister
 It indicates current RAM address available for stack or it points
the top of stack.
 Initially by default at 07H because first location of stack is 08H.
 After each PUSH instruction the SP is incremented by one while
in M C after PUSH instruction SP is decremented.
 After each POP instruction the SP is decremented.
 DPTR (Data Pointer)in 8051
o This is a 16 bit register which is used to furnish address information for
internal and external program memory and for external data memory.
o It is divided into two parts DPH and DPL
 DPH for Higher order 8bits, DPL for lower order
 Input Output Ports
o There are four input output ports available P0,P1,P2,P3.
o Each port is 8 bit wide and has special function register P0, P1,P2,P3
which are bit addressable means each bit can be set or reset by the Bit

Page9
instructions (SETB for high, CLR for low) independently.
o The data at any port which is transmitting or receiving is in these
registers.
o The port 0 can perform dual works. It is also used as Lower order
address bus (A0 to A7) multiplexed with 8 bit data bus P0.0 to P0.7 is
AD0 to AD7respectively the address bus and data bus is demultiplexed
by the ALE signal
o Port2 can be used as I/O port as well as higher order address bus A8 to
A15.
o Port 3 also have dual functions it can be worked as I/O as well as each
pin of P3 has specific function.
o P3.0–RXD–{Serial I/P for Asynchronous communication Serial O/P for
synchronous communication}.
o P3.1–TXD–Serial data transmit.
o P3.2–INT0–External Interrupt 0.
o P3.3–INT1–External Interrupt1.
o P3.4–T0–Clock input for counter 0.
o P3.5–T1–Clock input for counter 1.
o P3.6–WR–Signal for writing to external memory.
o P3.7–RD–Signal for reading from external memory.
o When external memory is interfaced with 8051 then P0 and P2 can’t be
worked as I/O port they works as address bus and data bus, otherwise
they can be accessed as I/O ports.
 Oscillator
o It is used for providing the clock to MC8051 which decides the speed or
baud rate of MC.
o We use crystal which frequency varies from 4MHz to 30 MHz, normally
we use11.0592 MHz frequency.
 Interrupts
o Interrupts are defined as requests because they can be refused
(masked) if they are not used, that is when an interrupt is
acknowledged.
o A few events or routines are followed to handle the interrupts.
o These special routines are known as interrupt handler or interrupt
service routines (ISR).
o These are located at a special allocation in memory.
o INT0andINT1arethepinsforexternalinterrupts.
 Timers and Counters
o Timer means which can give the delay of particular time between
some events. For example on or off the lights after every 2 sec.
o This delay can be provided through some assembly program but
in microcontroller two hardware pins are available for delay
generation.
o These hardware pins can be also used for counting some external
events.
o How much time a number is repeated in the given table is calculated
Page10
by the counter?
 In MC8051, two timer pins are available T0 and T1, by these
timers we can give the delay of particular time if we use these in
timer mode.
 We can count external pulses at these pins if we use these pins
in counter mode.
 16 bits timers are available. Means we can generate delay
between 0000H to FFFFH.
 Two special function registers are available.

o If we want to load T0 with 16 bit data then we can load separate lower
8bitinTL0 and higher 8 bit in TH0.
o In the same way forT1.
o TMOD, TCON registers are used for controlling timer operation.
 Serial Port
o There are two pins available for serial communication TXD and RXD
o Normally TXD is used for transmitting serial data which is in SBUF
register, RXD is used for receiving the serial data.
o SCON register is used for controlling the operation.
 Memory organization:
o The 8051 microcontroller has128 bytes of Internal RAM and 4kB of on
chip ROM.
o The RAM is also known as Data memory and the ROM is known as
program memory.
o The program memory is also known as Code memory.
o This Code memory holds the actual 8051 program that is to be executed.
o In 8051 this memory is limited to 64K.
o Code memory may be found on-chip, as ROM or EPROM. It may also be
stored completely off-chip in an external ROM or, more commonly, an
external EPROM.
o The 8051 has only 128 bytes of Internal RAM but it supports 64kB of
external [Link] the name suggests; external RAM is any random
access memory which is off-chip.
o Since the memory is off-chip it is not as flexible in terms of accessing,
and is also slower.
o For example, to increment an Internal RAM location by 1, it requires
only 1 instruction and 1 instruction cycle but to increment a 1-byte
value stored in External RAM requires 4 instructions and 7 instruction
cycles.
o So, here the external memory is 7 times slower
 Internal RAM OF 8051:

Page11
o This Internal RAM is found on-chip on the 8051.
o So it is the fastest RAM available, and it is also the most flexible in
terms of reading, writing, and modifying it’s contents.
o Internal RAM is volatile, so when the 8051is reset this memory is cleared.
o The128 bytes of internal
 Four register banks (Bank0, Bank1, Bank2 and Bank3) each of 8-
bits (total 32 bytes). The default bank register is Bank 0. The
remaining Banks are selected with the help of RS0 and RS1 bits
of PSW Register.
 16 bytes of bit addressable area and
 80 bytes of general purpose area (Scratch pad memory) as
shown in the figure 8. This area is also utilized by the
microcontroller as a storage area for the operating stack.
o The 32 bytes of RAM from address 00 H to 1FH are used as working
registers organized as four banks of eight registers each.
o The registers are named as R0-R7 .Each register can be addressed by
its name or by its RAM address.

Fig 8: Structure of RAM


 On chip ROM

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o In 8051,4KB read only memory(ROM) is available for program storage.
o This is used for permanent data storage. Or the data which is not
changed during the processing like the program or algorithm for
specific applications.
 This is volatile memory; the data saved in this memory does not
disappear after power failure.
 We can interface up to 64KB ROM memory externally if the
application is large.
o These sizes are specified different by their companies.
o Address Range of PC: Address range of PC means program counter
(which points the next instruction to be executing) can be moved
between these locations or we can save the program from this location
to this location. The address range can be calculated in the same way
just like the RAM which is discussed in previous section

o Address range of PC is 0000H to 0FFFH means total 4KB locations are


available from 0000H to 0FFFH.

 SPECIAL FUNCTION REGISTERS (SFRs):


o In 8051 microcontroller there certain registers which uses the RAM
addresses from 80h to FF h and they are meant for certain specific
operations.
o These registers are called Special function registers (SFRs).
o Some of these registers are bit addressable also.
o The list of SFRs and their functional names are given below.
o In these SFRs some of them are related to I/O ports (P0, P1, P2 and P3)
and some of them are meant for control operations (TCON, SCON,
PCON..) and remaining are the auxiliary SFRs, in the sense that they
don't directly configure the 8051.

Page13
Table 4: SFRs of 8051 Microcontroller
[Link] Symbol Name of SFR Address(Hex)
1 ACC* Accumulator E0
2 B* B-Register F0
3 PSW* Program Status word register DO
4 SP Stack Pointer Register 81
DPL Data pointer low byte 82
5 DPTR
DPH Data pointer high byte 83
6 P0* Port0 80
7 P1* Port1 90
8 P2* Port2 0A
9 P3* Port3 0B
10 IP* Interrupt Priority control B8
11 IE* Interrupt Enable control A8
12 TMOD Timer mode register 89
13 TCON* Timer control register 88
14 TH0 Timer0Higherbyte 8C
15 TL0 Timer0Lowerbyte 8A
16 TH1 Timer1Higher byte 8D
17 TL1 Timer1lowerbyte 8B
18 SCON* Serial control register 98
19 SBUF Serial buffer register 99
20 PCON Power control register 87
The*indicates the bit addressable SFRs

ADDRESSING MODES OF 8051:


 The way in which the data operands are accessed by different instructions is
known as the addressing modes.
 There are various methods of denoting the data operands in the instruction.
 The 8051 microcontroller supports mainly 5 addressing modes.
 They are
o Immediate addressing mode
o Direct Addressing mode
o Register addressing mode
o Register Indirect addressing mode
o Indexed addressing mode
 Immediate addressing mode:
o The addressing mode in which the data operand is a constant and it is
a part of the instruction itself is known as immediate addressing mode.
Normally the data must be preceded by a # sign. This addressing
mode can be used to transfer the data into any of the registers
including DPTR.
o Ex:
MOV A, #27H:The data(constant)27 is moved to the accumulator
register

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ADD R1, #45 H: Add the constant 45 to the contents of the
accumulator MOV DPTR, # 8245H: Move the data 8245 into the data
pointer register.
MOV P1, #21H: Move the data 21 to PORT1
 Direct addressing mode:
o The addressing mode in which the data operand is in the RAM location
(00 -7FH) and the address of the data operand is given in the
instruction is known as Direct addressing mode. The direct addressing
mode uses the lower 128 bytes of Internal RAM and the SFRs
o Ex
MOV R1, 42H: Move the contents of RAM location 42 into R1register
MOV 49H, A: Move the contents of the accumulator into the RAM location
49.
ADD A, 56H: Add the contents of the RAM location 56 to the accumulator
 Register addressing mode:
o The addressing mode in which the data operand to be manipulated in
one of the registers is known as register addressing mode.
o Ex
MOV A,R0: Move the contents of the register R0 to the
accumulator ADD A, R6: Add the contents of R6 register to
the accumulator MOV P1, R2: Move the contents of the R2
register into port 1
MOV R5, R2: This is invalid .The data transfer between the registers is not
allowed.
 Register indirect addressing mode:
o The addressing mode in which a register is used as a pointer to the
data memory block is known as Register indirect addressing mode.
o Ex
MOV A,@R0: Move the contents of RAM location whose address is in R0
into A (accumulator)
MOV @ R1, B: Move the contents of B into RAM location whose address
is held by R1 When R0 and R1 are used as pointers, they must be
preceded by @ sign
o One of the advantages of register indirect addressing mode is that it makes
accessing the data more dynamic than static as in the case of direct
addressing mode.
 Indexed addressing mode:
o This addressing mode is used in accessing the data elements of look
up table entries located in program ROM space of 8051.
o Ex: MOVC A,@ A+DPTR
The 16-bit register DPTR and register A are used to form the address of
the data element stored in on-chip ROM. Here C denotes code. In this
instruction the contents of A are added to the 16-bit DPTR register to
form the 16-bit address of the data operand

INSTRUCTION SETS:
 The instructions of 8051 can be broadly classified under the following headings.

Page15
1. Data transfer Instructions
2. Arithmetic Instructions
3. Logical Instructions
4. Program Branching Instructions
5. Bit Manipulation Instructions/Boolean Variable Manipulation Instructions

 Arithmetic Operations
o ADD A ,RnAdd register to Accumulator
o ADD A, directAdd direct byte to Accumulator
o ADD A, @RiAdd indirect RAM to Accumulator
o ADD A, #dataAdd immediate data to Accumulator
o ADDC A, RnAdd register to Accumulator with Carry
o ADDC A, directAdd direct byte to Accumulator with Carry
o ADDC A, @RiAdd indirect RAM to Accumulator with Carry
o ADDC A, #dataAdd immediate data to Acc with Carry
o SUBB A, RnSubtract Register from Acc with borrow
o SUBB A, directSubtract direct byte from Acc with borrow
o SUBB A, @RiSubtract indirect RAM from ACC with borrow
o SUBB A, #dataSubtract immediate data from Acc with borrow
o INC AIncrement Accumulator
o INC RnIncrement register
o INC directIncrement direct byte
o INC @RiIncrement direct RAM
o DEC ADecrement Accumulator
o DEC RnDecrement Register
o DEC directDecrement direct byte
o DEC @RiDecrement indirect RAM
o INC DPTRIncrement Data Pointer
o MUL A BMultiply A&B
o DIV A BDivide A by B
o DA ADecimal Adjust Accumulator

 LOGICAL OPERATIONS
o ANL A, Rn AND Register to Accumulator
o ANL A, directAND direct byte to Accumulator
o ANL A, @RiAND indirect RAM to Accumulator
o ANL A, #dataAND immediate data to Accumulator
o ANL direct, AAND Accumulator to direct byte
o ANL direct, #dataAND immediate data to direct byte
o ORL A, RnOR register to Accumulator
o ORL A, directOR direct byte to Accumulator
o ORL A,@RiOR indirect RAM to Accumulator
o ORL A,#dataOR immediate data to Accumulator
o ORL direct ,AOR Accumulator to direct byte
o ORL direct, #dataOR immediate data to direct byte
o XRL A, RnExclusive - OR register to Accumulator
o XRL A, directExclusive-OR direct byte to Accumulator

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o XRL A, @RiExclusive-OR indirect t RAM to Accumulator
o XRL A, #dataExclusive-OR immediate data to Accumulator
o XRL direct, AExclusive-OR Accumulator to direct byte
o XRL direct, #dataExclusive-OR immediate data to direct byte
o CLR AClear Accumulator
o CPL AComplement Accumulator
o RL A Rotate Accumulator Left
o RLC A Rotate Accumulator Left through the Carry
o RR A Rotate Accumulator Right
o RRC A Rotate Accumulator Right through the Carry
o SWAP ASwap nibbles within the Accumulator

 DATATRANSFER
o MOV A, RnMove register to Accumulator
o MOV A, directMove direct byte to Accumulator
o MOV A, @RiMove indirect RAM to Accumulator
o MOV A, #dataMove immediate data to Accumulator
o MOV Rn, AMove Accumulator to register
o MOV Rn, directMove direct byte to register
o MOV Rn, #dataMove immediate data to register
o MOV direct, AMove Accumulator to direct byte
o MOV direct, RnMove register to direct byte
o MOV direct, directMove direct byte to direct
o MOV direct, @RiMove indirect RAM to direct byte
o MOV direct, #dataMove immediate data to direct byte
o MOV@ Ri, AMove Accumulator to indirect RAM
o MOV @Ri, directMove direct byte to indirect RAM
o MOV @ Ri ,#dataMove immediate data to indirect RAM
o MOV DPTR, #data16Load Data Pointer with a16-bit constant
o MOVC A, @A+DPTRMove Code byte relative to DPTR to Acc
o MOVC A,@A+PCMove Code byte relative to PC to Acc
o MOVX A, @RiMove External RAM(8-bitaddr) to Acc
o MOVX A,@DPTRMove Exernal RAM(16-bitaddr) to Acc
o MOVX @ Ri, AMove Acc to External RAM(8-bitaddr)
o MOVX @DPTR,AMove Acc to External RAM(16-bit addr)
o PUSH directPush direct byte on to stack
o POP direct Pop direct byte from stack
o XCH A, RnExchange register with Accumulator
o XCH A, directExchange direct byte with Accumulator
o XCH A, @RiExchange indirect RAM with Accumulator
o XCHD A, @RiExchange low-order Digit indirect RAM with Acc

 BOOLEAN VARIABLE MANIPULATION


o CLR CClear Carry
o CLR bitClear direct bit
o SETB CSet Carry
o SETB bitSet direct bit

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o CPL CComplement Carry
o CPL bitComplement direct bit
o ANL C ,bit AND direct bit to CARRY
o ANL C,/bitAND complement of direct bit to Carry
o ORL C, bitOR direct bit to Carry
o ORL C,/bitOR complement of direct bit to Carry
o MOV C, bitMove direct bit to Carry
o MOV bit, CMove Carry to direct bit
o JC relJump if Carry is set
o JNC relJump if Carry not set
o JB bit, relJump if direct Bit is set
o JNB bit , relJump if direct Bit is Not set
o JBC bit, relJump if direct Bit is set& clear bit

 PROGRAM BRANCHING
o ACALL addr11Absolute Subroutine Call
o LCALL addr16Long Subroutine Call
o RETReturn from Subroutine
o RETIReturn from interrupt
o AJMP addr11Absolute Jump
o LJMP addr16LongJump
o SJMP relShort Jump(relative addr)
o JMP @A+DPTRJump indirect relative to the DPTR
o JZ relJump if Accumulator is Zero
o JNZ relJump if Accumulator is Not Zero
o CJNE A, direct, relCompare direct byte to Acc and Jump if Not Equal
o CJNE A, #data, relCompare immediate to Acc and Jump if Not Equal
o CJNE Rn, #data, relCompare immediate to register and Jump if Not
Equal
o CJNE @Ri ,#data ,relCompare immediate to indirect and Jump if Not
Equal
o DJNZ Rn, relDecrement register and Jump if Not Zero
o DJNZ direct, relDecrement direct byte and Jump if Not Zero
o NOPNo Operation

Table 5:JUMP Instructions Range


Instructions Jumping Range
JZ,JNZ,DJNZ,CJNE, Conditional
-128 to+128 bytes of the contents in PC
JC,JNC,JB,JNB,JBC Jumps
LJMP 0000 to FFFF memory Location Un-Conditional
SJMP -128 to+128bytes of the contents in PC Jumps
LCALL Within 64 KB Range CALL
ACALL Within 2KB Range Instructions

PROGRAMS:
PROGRAM FOR 8-BIT ADDITION USING 8051 MICROCONTROLLER

Page18
ADDRESS LABEL OPCODE OPERAND COMMENTS
9000 MOV A, #80H MOVE THE VALUE TO A REGISTER
9001
9002 MOV R0, #90H MOVE THE VALUE TO R0 REGISTER
9003
9004 MOV R1, #00H CLEAR THE R1 REGISTER
9005
9006 ADD A,R0 ADD TWO 8 BIT VALUES
JUMP ON NO CARRY TO SPECIFIED
9007 JNC 900A
LOCATION
9008
9009 INC R1 INCREMENT R1 REGISTER
MOV MOVE DPTR TO SPECIFIED ADDRESS
900A #9500
DPTR, LOCATION
900B
900C
MOVE THE A REGISTER VALUE TO
900D MOVX @DPTR,A
DPTR
INC
900E DPTR INCREMENT DPTR
900F MOV A,R1 MOVE THE R1 REGISTER VALUE TO A
MOVE THE A REGISTER VALUE TO
9010 MOV X@DPTR,A
ADDRESS OF DPTR
SHORT JUMP TO SPECIFIED
9011 XXX SJMP 9011
ADDRESS
9012 XXX
9013
PROGRAM FOR 8-BIT SUBTRACTION USING 8051 MICROCONTROLLER

ADDRESS LABEL OPCODE OPERAND COMMENTS

9000 MOV A, #FFH MOVE THE VALUE TO A REGISTER


9001
9002 MOV R0, #80H MOVE THE VALUE TO R0 REGISTER
9003
9004 MOV R1, #00H CLEAR THE R1 REGISTER
9005
9006 SUBB A,R0 SUBTRACT TWO 8 BIT VALUES
JUMP ON NO CARRY TO SPECIFIED
9007 JNC 900C
LOCATION
9008
9009 CPL A COMPLEMENT THE ACCUMULATOR
900A INC A INCREMENT A REGISTER
900B INC R1 INCREMENT R1 REGISTER
MOV MOVE THE DPTR TO SPECIFIED
900C #9500
DPTR, ADDRESS
900D

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900E
900F MOVX @DPTR,A MOVE A REGISTER TO ADDRESS OF

DPTR
9010 INC DPTR INCREMENT DPTR VALUE
MOVE THE R1 REGISTER TO A
9011 MOV A,R1
REGISTER
MOVE A REGISTER TO ADDRESS OF
9012 MOVX @DPTR,A
DPTR
SHORT JUMP TO SPECIFIED
9013 XXX SJMP 9011
ADDRESS
9014 XXX
9015
PROGRAM FOR 8-BIT MULTIPLICATION USING 8051 MICROCONTROLLER

ADDRESS LABEL OPCODE OPERAND COMMENTS

MOV
9000 #9500 MOVE DPTR TO SPECIFIED ADDRESS
DPTR,
9001
9002
MOVE THE ADDRESS OF DPTR TO A
9003 MOVX A,@DPTR
REGISTER
9004 MOV F0,A MOVE A REGISTER TO F0
9005 INC DPTR INCREMENT DPTR
MOVE THE ADDRESS OF DPTR TO A
9006 MOVX A,@DPTR
REGISTER
9007 MUL A B MULTIPLY 8 BIT VALUE
9008 INC DPTR INCREMENT DPTR
MOVE A REGISTER TO ADDRESS OF
9009 MOV X @DPTR,A
DPTR
900A INC DPTR INCREMENT DPTR
900B MOV A,F0 MOVE VALUE FROM F0TO A
MOVE A REGISTER TO ADDRESS OF
900C MOVX @DPTR,A
DPTR
SHORTJ UMP TO SPECIFIED
900D XXX SJMP 900D
LOCATION
900E XXX
900F
PROGRAM FOR 8-BITDIVISION USING 8051 MICROCONTROLLER

ADDRESS LABEL OPCODE OPERAND COMMENTS


MOV
9000 #9500 MOVE DPTR TO SPECIFIED ADDRESS
DPTR,
9001
9002
MOVE THE ADDRESS OF DPTR TO A
9003 MOVX A,@DPTR
REGISTER

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9004 MOV F0,A MOVE A REGISTER TO F0
9005 INC DPTR INCREMENT DPTR
MOVE THE ADDRESS OF DPTR TO A
9006 MOVX A,@DPTR
REGISTER
9007 DIV A B DIVIDE 8 BIT VALUES
9008 INC DPTR INCREMENT DPTR
MOVE A REGISTER TO ADDRESS OF
9009 MOVX @DPTR,A
DPTR
900A INC DPTR INCREMENT DPTR
900B MOV A,F0 MOVE VALUE FROM F0 TO A
MOVE A REGISTER TO ADDRESS OF
900C MOVX @DPTR,A
DPTR
SHORT JUMP TO SPECIFIED
900D XXX SJMP 900D
LOCATION
900E XXX
900F

Note1:In Multiplication,
 A holds MSB of the result and B holds LSB of the result
 This instruction always makes CY and OV flagas‘0’,if result is less than ‘FF’
 If CY=0 and OV=1,indicates the result is above‘ FF’

Note2:Indivision,
 A holds Quotient and B holds Remainder
 This instruction always makes CY and OV flagas‘0’,if denominator is not‘0’
 If CY=0andOV=1,indicates an error that denominator is zero

PARALLEL I/O PORTS:


 The 8051 microcontroller has four parallel I/O ports, each of 8-bits.
 So, it provides the user 32 I/O lines for connecting the microcontroller to the
peripherals.
 The four ports are P0(Port0),P1(Port1),P2(Port2)and P3(Port3).
 Upon reset all the ports are output ports.
 In order to make them input, all the ports must be set i.e a high bit must be
sent to all the port pins.
 This is normally done by the instruction “SETB”.
Ex:
MOV A, #0FFH; A=FF
MOV P0, A ; make P0 an input port

PORT 0:
 Port0 is an 8-bit I/O port with dual purpose.
 If external memory is used, these port pins are used for the lower address
byte address/data (AD0-AD7), otherwise all bits of the port are either input or
output.
 Unlike other ports, Port 0 is not provided with pull-up resistors internally, so for
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PORT0 pull-up resistors of nearly 10k are to be connected externally as
shown in the fig.4.10.

Fig 10 PORT 0 With Pull-Up Resistor Connection


Dual role of port 0:
 Port 0 can also be used as address/data bus (AD0-AD7), allowing it to be used
for both address and data.
 When connecting the 8051 to an external memory, port 0 provides both
address and data.
 The 8051multiplexes address and data through port0 to save the pins.
 ALE indicates whether P0 has address or data.
 When ALE = 0, it provides data D0-D7, and when ALE =1 it provides address

Port 1:
 Port1 occupies a total of 8 pins (pins1through8).
 It has no dual application and acts only as input or output port.
 In contrast to port 0, this port does not need any pull-up resistors since pull-
up resistors connected internally.
 Upon reset, Port1 is configured as an output port.
 To configure it as an input port, port bits must be set i.e a high bit must be
sent to all the port pins.
 This is normally done by the instruction “SETB”.
Ex:
MOV A,#0FFH;A=FFHEX
MOV P1,A; make P1 an input port by writing1’s to all of its pins

Port 2:
 Port2 is also an eight bit parallel port.(pins21- 28).
 It can be used as input or output port.

Page22
 As this port is provided with internal pull-up resistors it does not need any
external pull- up resistors.
 Upon reset, Port2 is configured as an output port.
 If the port is to be used as input port, all the port bits must be made high by
sending FF to the port.
Ex:
MOV A, #0FFH; A=FF hex
MOV P2,A;makeP2aninputportbywriting all1’stoit
Dual role of port 2:
 Port2 lines are also associated with the higher order address lines A8-A15.
 In systems based on the 8751,8951,and DS5000,Port2 is used as simple I/O
port.
 But, in 8051/31-based systems,port2 is used along with P0 to provide the16-
bit address for the external memory.
 Sincean8051/31is capable of accessing 64Kbytes of external memory, it
needs a path for the 16 bits of the address.
 While P0 provides the lower 8 bits via A0-A7, it is the job of P2 to provide bits
A8-A15 of the address.
 In other words, when 8031 is connected to external memory, Port 2 is used
for the upper 8 bits of the 16 bit address, and it cannot be used for I/O
operations.

PORT 3:
 Port3 is also an 8-bit parallel port with dual function.(pins10to17).
 The port pins can be used for I/O operations as well as for control operations.
 The details of these additional operations are given below in the table.
 Port3 also do not need any external pull-up resistors as they are provided
internally similar to the case of Port2 & Port 1.
 Upon reset port3 is configured as an output port.
 If the port is to be used as input port, all the port bits must be made high by
sending FF to the port.
For ex,
MOV A, #0FFH; A=FF hex
MOV P3,A;makeP3 an input port by writing all1’s to it
Alternate Functions of Port3:
 P3.0and P3.1are used for the RxD(Receive Data)andTxD(Transmit Data)serial
communications signals.
 BitsP3.2andP3.3are meant for external interrupts.
 Bits P3.4 and P3.5 are used for Timers 0 and 1 and P3.6 and P3.7 are used to
provide the write and read signals of external memories connected in 8031
based systems.
P3.0–RXD–Serial data receive
o P3.1–TXD–Serial data transmit.
o P3.2–INT0–External Interrupt0.

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o P3.3–INT1–External Interrupt1.
o P3.4–T0–Clock input for counter0.
o P3.5–T1–Clock input for counter1.
o P3.6–WR–Signal for writing to external memory.

Page24
o P3.7–RD–Signal for reading from external memory.

Programming I/O Ports:


 Write a test program for the 8051 chip to toggle all the bits of P0,P1 and P2 after a
delay.
MOV
P0,#00
MOV
P1,#00
MOV
P2,#00
BACK:MOV A,#55
MOV P0,A
MOV P1,A
MOV P2,A
ACALL
DELAY MOV
A,#AA MOV
P0,A MOV
P1,A MOV
P2,A ACALL
DELAY SJMP
BACK
DELAY:MOV
R1,#FF J1: DJNZ
R1,J1
RET
 Write a program to generate a square wave form from bit0 of port1.
BACK:SETB P1.0
LCALL DELAY
CLR P1.0
LCALL DELAY
SJMP BACK
DELAY:MOV
R1,#FF J1: DJNZ
R1,J1
RET
OR
BACK:CPL P1.0
LCALL DELAY
SJMP BACK
 A switch is connected to pin P1.7 and an LED to pin P2.0. Write a program to get
the status of the switch and send it to the LED.
LED BIT P1.7
SW BIT P2.0
Page25
HERE:MOV C, SW
MOV LED,C
SJMP HERE

Page26
 Assume that bit P2.3 is an input and represents the condition o fan oven. If it goes
high, it means that the oven is hot. Monitor the bit continuously. Whenever it goes
high, send a high-to-low pulse to port P1.5 to turn on a buzzer.
OVEN_HOT BIT P2.3
BUZZER BIT P1.5
HERE:JNB OVEN_HOT,HERE
CPL BUZZER
ACALL
DELAY SJMP
HERE
 A switch is connected to pin P1.7. Write a program to check the status of the
switch and make the following decision. (a) If SW = 0, send “0” to P2 (b) If SW = 1,
send “1“ to P2
SW EQU P1.7
MYDATA EQU P2
HERE:MOV C,SW
JC OVER
MOV
MYDATA,#’0’
SJMP HERE
OVER:MOV MYDATA,#’1’
SJMP HERE

TIMERS AND COUNTERS


 The 8051 has two counters/timers which can be used either as timer to
generate a time delay or as counter to count events happening outside the
microcontroller.
 The 8051has two timers: timer0 and timer1.
 They can be used either as timers or as counters.
 Both timers’ are16 bits wide.
 Since the 8051has an 8-bit architecture, each 16-bitis accessed as two
separate registers of low byte and high byte.
 First we shall discuss about Timer0 registers.
 Timer0 registers is a16bits register and accessed as low byte and high byte.
 The low byte is referred asaTL0 and the high byte is referred asTH0.
 These registers can be accessed like any other registers.

Timer0
 Timer1 registers is also a 16 bits register and is split into two bytes, referred
to asTL1and TH1.

Page27
Timer1
 TMOD(timer mode)Register:
o This is an 8-bit register which is used by both timers 0 and 1 to set the
various timer modes.
o In this TMOD register, lower 4 bits are set aside for timer0 and the
upper 4 bits are set aside for timer1.
o In each case, the lower 2 bits are used to set the timer mode and
upper 2 bits to specify the operation.

TMOD Register

o In upper or lower 4bits,first bit is a GATE bit.


o Every timer has a means of starting and stopping.
o Some timers do this by software, some by hardware, and some have
both software and hardware controls.
o The hardware way of starting and stopping the timer by an external
source is achieved by making GATE=1 in the TMOD register.
o And if GATE=0 then no need of external hardware to start and stop the
timers.
o The second bit is C/T bit and is used to decide whether a timer is used
as a time delay generator or an event counter.
o If this bit is 0 then it is used as a timer and if it is 1then it is used as a
counter.
o In upper or lower4bits,the last bits third and fourth are known as
M1andM0 respectively.
o These are used to select the timer mode.

Table 6:Timer Mode Operations


M1 M0 Mode Operating Mode
3bit timer mode
0 0 0
8bit timer/counter THx with TLx as5-bit prescalar
16bit timer mode
0 1 1 16bit timer/counters THx and TLx are cascaded; there
is no prescalar
8bit auto reload
1 0 2 8bit auto reload timer/counter; THx holds a value that
is to be reloaded into TLx each time it overflows
1 1 3 Split timer mode

Page28
 Mode1
o It is a16-bit timer; therefore it allows values from 0000 to FFFFH to be
loaded into the timer’s registers TL and TH.
o After TH and TL are loaded witha16-bit initial value, the timer must be
started.
o This is done by “SETB TR0”for timer 0 and“SETB TR1”for timer1.
o After the timer is started.
o It starts count up until it reaches its limit of FFFFH.
o When it rolls over from FFFF to 0000H, it sets high a flag bit called TF
(timer flag).
o This timer flag can be monitored. When this timer flag is raised, one
option would be stop the timer with the instructions “CLR TR0“ or CLR
TR1 for timer 0 and timer 1 respectively.
o Again, it must be noted that each timer flagTF0 for timer0 andTF1for
timer1.
o After the timer reaches its limit and rolls over, in order to repeat the
process the registers TH and TL must be reloaded with the original
value and TF must be reset to 0.

 Mode2
o It is an 8 bit timer that allows only values of 00 to FFH to be loaded into
the timer’s register TH.
o After TH is loaded with 8bit value, the8051 gives a copy of it to TL.
o Then the timer must be started.
o It is done by the instruction “SETB TR0”for timer0 and “SETB TR1”for
timer1.
o This is like mode1.
o After timer is started, it starts to count up by incrementing the TL
register.
o It counts up until it reaches its limit of FF H. When it rolls over from
FFHto [Link] sets high the TF (timer flag).
o If we are using timer0,TF0 goes high; if usingTF1thenTF1is raised.
o When Tl register rolls from FFHto00andTFis setto1,TL is reloaded
automatically with the original value kept by the TH register.
o To repeat the process, we must simply clear TF and let it go without
any need by the programmer to reload the original value.
o This makes mode 2 auto reload, in contrast in mode 1 in which
programmer has to reload TH and TL.
o Thefigure4.12explains the Mode2operation of timer.
o The figure 4.13 explains the Mode 1 and mode 2 operation of timer
with external input
 Mode0
o Mode 0 is exactly same like mode 1 except that it is a 13-bit timer
instead of 16- bit.
o The13-bit counter can hold values between 0000to1FFFHinTH-TL.
o Therefore, when the timer reaches its maximum of 1FFH,it rolls over to

Page29
0000, and TF is raised.
 Mode3
o Mode3 is also known as a split timer mode.
o Timer0and1 may be programmed to be in mode 0,1and 2
independently of similar mode for other timer.
o This is not true for mode3; timers do not operate independently if
mode3 is chosen for timer 0.
o Placing timer 1 in mode 3 causes it to stop counting; the control bit
TR1 and the timer 1 flag TF1 are then used by timer0.
 TCON register
o Bits and symbol and functions of every bits of TCON are as follows:

TCON Register

Table 7:TCONRegister Description


BIT Symbol Functions
Timer1over flow flag.
Set when timer rolls from all1s to 0.
7 TF1
Cleared When the processor vectors to execute interrupt service
routine Located at program address 001Bh.
Timer1run control bit.
6 TR1 Set to1by programmer to enable timer to count;
Cleared to 0 by program to halt timer.
5 TF0 Timer0 over flow flag. Same asTF1.
4 TR0 Timer0 run control bit. Same asTR1.
3 IE1 External interrupt1Edge [Link] related to timer operations
External interrupt1signal type control bit.
Set to1by program to Enable external interrupt1 to be triggered
2 IT1 by a falling edge signal.
Set To 0 by program to enable a low level signal on external
interrupt1 to
Generate an interrupt.
1 IE0 External interrupt 0 Edge flag. Not related to timer operations.
0 IT0 External interrupt0 signal type control [Link] as IT1

SERIALCOMMUNICATION:

Baud Rate:
 The 8051 transfers and receives data serially at many different baud rates.
 The baud rate in the 8051 is programmable.
 This is done with the help of Timer1.
 The relationship between the crystal frequency and the baud rate is
o For XTAL=11.0592MHz,the machine cycle frequency is 921.6kHz
o The UART circuitry divides the machine cycle frequency of 921.6 kHz
by 32 once more before it is used by Timer 1 to set the baud rate.
Therefore it gives 28,800Hz.
o WhenTimer1 is used to set the baud rate it must be programmed in
Page30
mode2, i.e., 8-bit, auto reload.
o To get baud rates compatible with the PC,TH1 should be loaded with
the values shown in the following table by assuming
XTAL=11.0592MHz.

Table 8: Baud Rate Value For TH1


Baud Rate TH1(Decimal) TH1(Hex)
9600 -3 FD
4800 -6 FA
2400 -12 F4
1200 -24 E8

SBUF Register
 SBUF is an 8-bit register used solely for serial communication in the 8051.
 For a byte of data to be transferred via the TxD line, it must be placed in the
SBUF register.
 Similarly, SBUF holds the byte of data when it is received by the RxD line.
 SBUF can be accessed like any other registers in
the 8051
 MOV SBUF, #‘D’
MOV SBUF,A
MOV A, SBUF
 The moment a byte is written into SBUF, it is framed with the start and stop
bits and transferred serially via the TxD pin
 Similarly when the bits are received serially via RxD, the 8051deframes it by
eliminating the start and stop bits, making a byte out of the data received,
and then placing it in the SBUF

SCON Register:
 The SCON register is an 8-bit register used to program the start bit, stop bit
and data bits of data framing, among other things.

 SM0,SM1:
o These two bits determines the framing of data by the specifying the
number of bits per character, and the start and stop bits.

Page31
o They take the following combinations
Table 9:Serial Mode Operation
SM0 SM1
0 0 Serial Mode0
0 1 Serial Mode1,8-bitdata,1start bit,1stop bit
1 0 Serial Mode2
1 1 Serial Mode3
o Serial Mode 0,2 and 3 are not commonly used nowadays.
o Serial Mode1 is compatible with the COM port of IBM/PC’s
o Serial Mode1,allows the baud rate to be variable and is set by Timer1
of the 8051
o In Serial Mode1,for each character a total of 10 bits are transferred
 SM2
o This bit enables the multiprocessing capability of the 8051by
assigning‘SM2=1’.
o If‘SM2=0’multiprocessing capability is disabled.
 REN:(Receiver Enable)
o When the REN bit is high, it allows the 8051 to receive data on the RxD
pin
o If we want the 8051 to bit transfer and receive the data, REN must be set
to1
o By making REN=0,the receiver is disabled
o Instruction to set and Clear REN is
SETB SCON.4
CLR SCON.4
 TB8:(Transfer Bit8)
o It is used for serial mode 2 and 3.
o If this is not used assign TB8 as 0
 RB8(ReceiveBit8)
o In serial mode1,this bit gets a copy of the stop bit when 8-bit data is
received.
o This bit is rarely used any more, it is assigned as 0
 TI(Transmit Interrupt)
o When 8051 finishes the transfer of the 8-bit character; it raises the TI
flag to indicate that it is ready to transfer another byte.
o The TI bit is raised at the beginning of the stop bit.
 RI(Receive Interrupt)
o When the 8051receives data serially via RxD, it gets rid of the start
and stop bits and places the byte in the SBUF register.
o Then it raises the RI flag bit to indicate that a byte has been received
and should be picked up before it is lost.
o RI is raised half way through the stop bit.

INTERRUPT

Interrupts Vs Polling:
 A single microcontroller can serve several devices. There are two ways to do
that:
o Interrupts
o Polling
 In the interrupt method, whenever any device needs its service, the device
notifies the microcontroller by sending it can interrupt signal.

Page32
 Upon receiving an interrupt signal, the microcontroller interrupts whatever it
is doing and serves the device.
 The program associated with the interrupt is called the interrupt service
routine (ISR) or interrupt handler.
 In polling, the microcontroller continuously monitors the status of a given
device; when the status condition is met, it performs the service.
 After that it moves onto monitor the next device until each one is serviced.
 Although polling can monitor the stats of several devices and serve each of
the mass certain conditions are met; it is not an efficient use of the
microcontroller.
 The advantage of interrupts is that the microcontroller can serve many
devices; each device can get the attention of the microcontroller based on
the priority assigned to it.
 The polling method cannot assign priority since it checks all devices in a
round-robin fashion.
 In interrupt method, interrupts can be masked which is not possible in polling
method.
 Polling method wastes microcontroller’s time by polling devices.

 Interrupt Priorities
o 8051 has two levels of interrupt priorities:
 High or Low.
o When 8051 is powered up, the priorities are assigned according to the
table4.13.

Table4.13 8051/52 Interrupt Priority Upon Reset


Highest to Lowest Priority
External Interrupt 0 INT0
Timer Interrupt 0 TF0
External Interrupt 1 INT1
Timer Interrupt 1 TF1
Serial Communication RI +TI
Timer 2 (8052only) TF2

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