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Understanding Distributed Shared Memory

The document discusses Distributed Shared Memory (DSM) systems, highlighting their advantages such as ease of programming and improved performance. It covers various types of DSM architectures, design issues, consistency models, and implementation challenges. Additionally, it addresses the management strategies for DSM systems and the complexities involved in heterogeneous environments.
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0% found this document useful (0 votes)
7 views58 pages

Understanding Distributed Shared Memory

The document discusses Distributed Shared Memory (DSM) systems, highlighting their advantages such as ease of programming and improved performance. It covers various types of DSM architectures, design issues, consistency models, and implementation challenges. Additionally, it addresses the management strategies for DSM systems and the complexities involved in heterogeneous environments.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Distributed Computing

Second Edition

Sunita Mahajan
Seema Shah

© Oxford University Press 2013. All rights reserved.


Chapter 8

Distributed Shared
Memory

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OUTLINE

• Introduction
• Basic concepts of
DSM
• Hardware DSM
• Design issues in DSM
• Issues in
implementing DSM
systems
• Heterogeneous and
other DSM systems

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Introduction

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IPC Paradigms
• Message passing

• Shared memory

• Multi computer systems are easier to build but harder to


program while multiprocessor systems are complex to build
but easier to program

• Distributed Shared Memory systems (DSM) are both easy to


program and easy to build

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Basic Concepts of DSM

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DSM

• A DSM system provides a logical abstraction of shared


memory which is built using a set of interconnected nodes
having physically distributed memories.

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DSM Architecture-1
• DSM
– Ease of programming and portability
– Scalable with very high computing power

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DSM Architecture-2
• Cluster based architecture

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Comparison of IPC Paradigms

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Types of DSMs

• Hardware level DSM

• Software level DSM

• Hybrid level DSM

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Advantages of DSM
• Simple abstraction

• Improved portability of distributed application programs

• Provides better performance in some applications

• Large memory space at no extra cost

• Better than message passing systems

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Hardware DSM

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Hardware Architectures
• On chip memory

• Bus based multiprocessor

• Ring based multiprocessor

• Switched multiprocessor

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On Chip Memory

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Bus-based Multiprocessor
• Use bus arbitration mechanism

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Consistency Protocols

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Cache Consistency Protocol
• Properties

– Consistency is achieved since all caches do us snooping

– Protocol is built into MMU

– The algorithm is performed in one memory cycle

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Memnet DSM Architecture
• Shred memory

– Private areas

– Shared areas

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Memnet: Node Memory

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Comparison
• The major difference between bus based and ring based
multiprocessors is that the former are tightly coupled while
the latter are loosely coupled.

• Ring based multiprocessors are almost hardware


implementation of DSM.

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Switched Multiprocessor
• Multiple clusters interconnected by a bus offer better
scalability
• Example : Dash system

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Design Issues In DSM

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DSM Design Issues
• Granularity of sharing

• Structure of data

• Consistency models

• Coherence protocols

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Granularity
• False sharing
• Thrashing

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DSM Structure
• Organization of data items in the shared memory

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Consistency Models
• Refers to how recent the shared memory updates are visible
to all the other processes running on different machines

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Strict Consistency
• Strongest form of consistency

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Sequential Consistency
• All processors in the system observe the same ordering of
reads and writes which are issued in sequence by the
individual processors

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Causal Consistency
• Weakening of sequential consistency for better concurrency
• Causally related operation is the one which has influenced the
other operation

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PRAM Consistency
• Pipelined Random Access Memory consistency
• Write operations performed by a single process are seen by all
other processes in the order in which they were performed
just as if these write operations were performed by a single
process in a pipeline.
• Write operations performed by different processes may be
seen by different processes in different orders.

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Processor Consistency
• Adheres to the PRAM consistency

• Constraint on memory coherence

• Order in which the memory operations are seen by two


processors need not be identical, but the order of writes
issued by each processor must be preserved

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Weak Consistency
• Use a special variable called the synchronization variable

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Properties of the Weak
Consistency Model
• Access to synchronization variables is sequentially consistent

• Only when all previous writes are completed everywhere,


access to synchronizations variable is allowed

• Until all previous accesses to synchronization variables are


performed, no read write data access operations will be
allowed.

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Release Consistency
• Synchronization variables: acquire and release
• Use barrier mechanism

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Eager Release Consistency

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Lazy Release Consistency

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Entry Consistency
• Use acquire and release at the start and end of each critical
section, respectively.

• Each ordinary shared variable is associated with some


synchronization variable such as a lock or barrier.

• Entry consistency (EC) is similar to LRC but more relaxed;


shared data is explicitly associated with synchronization
primitives and is made consistent when such an operation is
performed

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Scope Consistency
• A scope is a limited view of memory with respect to which
memory references are performed

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Comparison of Consistency
Models-1
• Most common: sequential consistency model

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Comparison of Consistency
Models-2
• Based on efficiency and programmability

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Coherence Protocols
• Specifies how the rules set by the memory consistency model
are to be implemented

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Coherence Algorithms
• Maintain consistency among replicas

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Multiple Reader/ Multiple
Writer Algorithm
• Uses twin and diff creation technique

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Write Protocols for Consistency
• Write Update (WU)
• Write Invalidate (WI) protocols

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Issues in Implementing
DSM Systems

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Issues
• Thrashing

• Responsibility of DMS management

• Replication v/s migration

• Replacement strategy

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Thrashing
• False sharing
• Techniques to reduce
thrashing:
– Application controlled
lock
– Pin the block to a node
for specific time
– Customize algorithm to
shared data usage
pattern

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Responsibility for DSM
Management
• Algorithms for data location and consistency management

– Centralized manager algorithm

– Broadcast algorithm

– Fixed Distributed manager algorithm

– Dynamic distributed manager algorithm

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Centralized Manager Algorithm

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Broadcast Algorithm

Replicates

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Fixed Distributed Manager
Algorithm

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Dynamic Distributed Manager
Algorithm

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Replication Versus Migration
Strategies
• Replication strategy • Non Replicated and Non
– No replication Migrating Block- NRNMB
• Non Replicated, Migrating
– Replication Block- NRMB
• Replicated, Migrating Block-
RMB
• Replicated Non Migrating
• Migration strategy
Block-RNMB
– No migration

– Migration
Replacement Strategy

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Heterogeneous and Other
DSM Systems

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Issues in Building Heterogeneous
DSM Systems
• Data compatibility and conversion
– DSM as a collection of source language objects

• Block size selection


– Largest page size
– Smallest page size
– Intermediate page size

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Approaches to DSM Design
• Based on data caching management DSM is managed by

1. Operating system

1. MMU Hardware

1. Language runtime system

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