52 IEEE TRANSACTIONS ON SIGNAL PROCESSING LETTERS, VOL. 7, NO.

3, MARCH 2000

Approximate Linear Phase Multiplierless IIR

Halfband Filter
Miroslav D. Lutovac, Senior Member, IEEE, and Ljiljana D. Milić, Senior Member, IEEE

Abstract—This paper deals with the real-time multiplierless Any realization that approximates the ideal halfband filter is
implementation of halfband IIR filters having approximate linear referred to as a halfband filter. A noncausal halfband filter with
phase and significantly smaller processing delay than previously poles on the imaginary axis of the plane can be realized as
reported implementations.
Index Terms—Fixed point arithmetic, halfband filters, IIR dig-
ital filters, linear phase filters, multiplierless filter. (2)

where and are causal allpass subfilters

I. INTRODUCTION with the frequency responses and
. The halfband filter-frequency response
F IR halfband filters require many times more multipli-
cations per output sample to satisfy sharp magnitude
response specifications than IIR filters. Real-time implemen-
can be expressed as a product of the amplitude function
and the exponential factor
tations of linear-phase IIR filters have large average output
sample delays. Powell and Chau made significant reductions of
the storage requirements using two identical transfer functions (3)
, and the time-re-
versed operation in the subfilter [1]. An improvement is where is the phase response. The passband is obtained
presented for [2]. The filters introduced in [1], for (i.e., for or ),
[2] yield only approximate linear phase design because of the while , , or gives
finite section length and finite wordlength. a stopband. Evidently, an equiripple behavior of the amplitude
An approximate linear phase halfband filter can be realized response simultaneously produces an equiripple behavior of the
as a parallel connection of the delay line and the cascaded con- phase response and vice versa.
nection of two subfilters [3], where We propose the real-time implementation of using
and have different poles. In this paper, we show the Powell and Chau technique. The causal realization requires
that by using and as allpass IIR subfilters from the an -sample delay in the upper branch of Fig. 1. The causal
minimum phase solution [4], the length of the sequence for real implementation of the filter is based
time implementation is considerably reduced. Furthermore, the on the block processing technique [1]. The infinite length input
constants in and are represented as simple combi- sequence is divided into -length sequences, and each sequence
nations of powers of two, thus providing the approximate linear is filtered separately as follows.
phase, low-complexity halfband filter.
1) The input -length sequence is stored in last-in first-out
For custom fixed-point implementations such as VLSI or
(LIFO) register.
FPGA, the reduction of the number of multipliers and the
2) The time-reversed sequence is filtered using filter ,
storage blocks saves in the chip area and increases the pro-
yielding -length output sequence.
cessing speed [5]. In this paper, we suggest the multiplierless
3) The sum of the last output samples and the first output
linear phase design with considerably smaller processing
samples of the previous sequence (delayed samples)
delays than previously reported implementations.
is a new sequence .
4) The -length sequence of is time reversed using the
II. HALFBAND FILTER LIFO register and is processed using subfilter .
An ideal halfband filter is defined as a DTLTI system with The halfband filter poles are placed on the imaginary axis
the frequency response of the complex plane [3], [4]. Hence, the allpass subfilters
and can be implemented by cascade connection
(1) of the second-order sections
where is the square magnitude of the pole . The phase re-
sponse can be expressed in the form
Manuscript received June 14, 1999. The associate editor coordinating the re-
view of this manuscript and approving it for publication was Prof. R. Shenoy.
M. D. Lutovac is with IRITEL Telecommunications and Electronics Institute,
Belgrade, Yugoslavia (e-mail: lutovac@[Link]).
Lj. D. Milić is with the Mihajlo Pupin Institute, Belgrade, Yugoslavia.
Publisher Item Identifier S 1070-9908(00)02073-3. (4)
S1070-9908/00$10.00 © 2000 IEEE
LUTOVAC AND MILIĆ: APPROXIMATE LINEAR PHASE MULTIPLIERLESS IIR HALFBAND FILTER 53

Fig. 1. Two-pass filtering halfband filter: cascade connection of two subfilters %H_a(z) and H_b(z) and two LIFO registers.

where sign is for subfilter , while sign is for subfilter .

The group delay of the approximate linear phase halfband filter
is

(5)

where the sign is for subfilter , while sign is for subfilter .

The maximal value of the group delay of the th section occurs at
the middle of the transition region , i.e.,
. Therefore, in the passband, the
group delay variation is very small.
The direct procedure for the calculation of the coefficients Fig. 2. Phase tolerance for L = 45 and 12-bits wordlength..
and the multiplierless realization of subfilters was presented in
[4], [5]. If the subfilter has the largest , then can be
several times smaller (i.e., the processing delay is reduced). ification, we develop a direct procedure for the multiplierless
FIR realization, calculated using the MATLAB program, design with the smallest length of the time-reversed sequence
requires 26 multipliers while IIR realization, proposed in this and consequently, with a small processing delay.
paper, requires only four multipliers (for stopband specifi-
cation , rad, dB, and : ACKNOWLEDGMENT
, , : The authors are grateful to the anonymous reviewer for his
, . The thorough review and constructive suggestions.
phase tolerance for IIR filter is shown in Fig. 2. For 12-bits
wordlength, the nonzero length of the impulse response of
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