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BCS302 Model Question Paper 2022

This document is a model question paper for the Third Semester B.E Degree Examination in Digital Design and Computer Organization, effective from 2022. It outlines the structure of the exam, including modules and questions that require students to simplify Boolean functions, write Verilog descriptions, and explain concepts related to Hardware Description Language (HDL). The paper consists of multiple-choice questions and requires students to answer five full questions, ensuring coverage of all modules.

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57 views2 pages

BCS302 Model Question Paper 2022

This document is a model question paper for the Third Semester B.E Degree Examination in Digital Design and Computer Organization, effective from 2022. It outlines the structure of the exam, including modules and questions that require students to simplify Boolean functions, write Verilog descriptions, and explain concepts related to Hardware Description Language (HDL). The paper consists of multiple-choice questions and requires students to answer five full questions, ensuring coverage of all modules.

Uploaded by

soniyaeofficial
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

lOMoARcPSD|51081091

Model Question Paper- I with effect from 2022

Third Semester B.E Degree Examination


Digital Design and Computer Organization (BCS302)
TIME: 03 Hours [Link]
1. Note: Answer any FIVE full questions, choosing at least ONE question from each MODULE
2. M: Marks, L: Bloom’s level, C: Course outcomes.

Module - 1 M L C
Q.1 a Simplify the following Boolean functions, using four-variable K-maps and 10 L3 CO1
draw the NAND-NAND circuit for the simplified expression:
F (w, x, y, z) = ∑(1, 4, 5, 6, 12, 14, 15)
F (w, x, y, z) = ∑ (0, 2, 4, 5, 6, 7, 8, 10, 13, 15)
b Write a Verilog gate-level description of the circuit shown in Fig. 1(b) 5 L2 CO1

Fig. 1(b)
c Explain User Defined Primitive with an HDL Example. 5 L2 CO1
OR

Simplify the following Boolean expressions, using four-variable maps:


Q.2 a (a) A’B’C’D + AC’D’ + B’CD’ + A’BCD + BC’D 10 L3 CO1
(b) x’z + w’ xy’ + w(x’y + xy’)
Define Hardware Description Language (HDL). Explain an HDL identifiers
b and keywords with the help of circuit and Verilog code. 7 L2 CO1

Explain test bench with an HDL Example.


c 3 L2 CO1
Module - 2

Q.3 a 6 L2 CO1

b 7 L2 CO1

c 7 L3 CO1

OR

Q.4 a 6 L2 CO1

b 7 L2 CO1

Downloaded by SONIYA E (soniyaeofficial@[Link])


lOMoARcPSD|51081091

Model Question Paper- I with effect from 2022

c 7 L3 CO1

Module - 3
Q.5 a 6 L2 CO1

b 7 L2 CO1

c 7 L3 CO1

OR
Q.6 a 6 L2 CO1

b 7 L2 CO1

c 7 L3 CO1

Module - 4
Q.7 a 6 L2 CO1

b 7 L2 CO1

c 7 L3 CO1

OR
Q.8 a 6 L2 CO1

b 7 L2 CO1

c 7 L3 CO1

Module - 5
Q.9 a 6 L2 CO1

b 7 L2 CO1

c 7 L3 CO1

Downloaded by SONIYA E (soniyaeofficial@[Link])

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