CK College of Engineering and Technology

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Jayaram Nagar, Chellangkuppam, Cuddalore 607 003
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QUESTION BANK
(From previous year Anna University Question Papers)

Program: U.G Degree: B.E Department: EEE

Multilevel Power Converters EE3011
Course name: Course Code:
Year: III Semester VI Course type: LCT
Course L T P C
Regulation: 2021 PEC Contact details
category 3 0 0 3

UNIT-I MULTILEVEL TOPOLOGIES

Introduction – Generalized Topology with a Common DC bus – Converters derived
from the generalized topology – symmetric topology without a common DC link –
Asymmetric topology
Q. No. Question BKL
1.1 Introduction – Generalized Topology with a Common DC bus
1 What is multilevel inverter? What are its significance?(2) L-1
2 Classify the Multilevel inverters. L-1
3 Why THD is low in Multilevel inverters? (2) L-2
4 Define the terms: (i) Switching loss (ii) THD (ii) Common mode voltage. L-1
5 Define forbidden state. L-2
6 Define reduant state. L-2
7 What are the drawbacks of three level inverter? L-2
8 Define basic cell. Draw its schematic diagram. L-1
9 State the relation between the capacitor voltage and no. of basic cells in L-1
generalized topology.
10 Discuss the operation of three level generalized symmetric topology with L-3
a common dc bus.
11 Discuss the necessity and features of multilevel converters. L-3
Converters derived from the generalized topology
1.2
1 How will be the number of voltage levels increased in generalized L-1
topology?
2 What is the significance of increase in number of voltage levels in L-1
generalized topology?
3 What is common mode voltage. L-2
4 What is the impact of common mode voltage in the performance of L-1
multilevel converter fed induction motor drive?
5 State the significance of clamping diodes in neutral point clamped L-1
inverter.
6 What are the applications of diode clamped inverter topology? L-3
7 What is the role of flying capacitor in flying capacitor MLI? L-1
8 State the methods of charging and discharging of capacitors in flying L-1
capacitor MLI.
9 How will you balance the voltage across flying capacitor cells? L-1
 10 Describe the operation of three level diode clamped topology with neat L-3
diagram and its switching states.
11 Describe the operation of four level diode clamped topology with neat L-3
diagram and its switching states.
12 Describe the operation of five level diode clamped topology with neat L-3
diagram and its switching states.
13 Describe the operation of three level flying capacitor topology with neat L-3
diagram and its switching states.
14 Describe the operation of four level flying capacitor topology with neat L-3
diagram and its switching states.
15 Describe the operation of five level flying capacitor topology with neat L-3
diagram and its switching states.
1.3 symmetric topology without a common DC link-Asymmetric topology
1 What is symmetric topology? L-2
2 What are the drawbacks of cascading H- Bridge cells in cascaded MLI? L-2
3 What is the blocking voltage of H- Bridge cell in Cascaded topology? L-2
4 How will you size the cascaded cells in CHBMLI in terms of voltage
L-2
levels?
5 What is asymmetric topology? L-2
6 what happen to the switches with the input sources values are different? L-2
7 Explain the operation of five level CHBMLI with equal input dc sources L-3
and its switching states.
8 Explain the operation of seven level CHBMLI with neat circuit diagram. L-3
9 Compare symmetric and asymmetric topologies of MLI. L-3
UNIT II CASCADED H-BRIDGE MULTILEVEL INVERTERS
Introduction-H-Bridge Inverter, Bipolar Pulse Width Modulation, Unipolar Pulse
Width Modulation. Multilevel Inverter Topologies, CHB Inverter with Equal DC
Voltage, H-Bridges with Unequal DC Voltages – PWM, Carrier-Based PWM Schemes,
Phase-Shifted Multicarrier Modulation, Level Shifted Multicarrier Modulation,
Comparison Between Phase- and Level-Shifted PWM Schemes- Staircase
Modulation.
2.1 Introduction-H-Bridge Inverter, Bipolar Pulse Width Modulation, Unipolar
Pulse Width Modulation.
1 Define frequency modulation index. L-1
2 Define amplitude modulation index. L-1
3 List out modulation strategies used in cascaded H- Bridge MLI. L-1
4 What is Unipolar modulation?Mention the device switching frequency L-1
with carrier frequency.
5 Define bipolar [Link] the device switching frequency L-1
with carrier frequency.
6 What is meant by over modulation? L-1
7 Explain about unipolar and bipolar PWM in H- Bridge inverters. L-2
8 Define blanking time in inverter. L-2
Multilevel Inverter Topologies, CHB Inverter with Equal DC Voltage, H-
2.2
Bridges with Unequal DC Voltages
1 What is cascaded multilevel inverter topology? L-1
2 Give the relation between no. of voltage levels, switches and dc sources L-2
for symmetrical CHBMLI.
3 How the switch count decreases in Asymmetrical CHBMLI in terms of L-2
voltage levels?
 4 Write the expression to compute the total number of active switches L-2
required for an m-level CHB inverters.
5 How many carrier reference waves are required to produce phase-shift L-2
multi-carrier modulation for an m-level inverter? Write the expression
for their phase shift.
6 Write the expression of inverter switching frequency in the phase- L-2
shifted modulation related to the device switching frequency.
7 What are the dominating harmonics in the phase voltages of inverter L-2
uses level-shifted modulation?
8 What is meant by the rotation of switching patterns? Where is it used? L-2
9 List the features of staircase modulation. L-2
10 List the advantages and disadvantages of CHB inverters. L-2
11 Expalin the working principle of seven level CHBMLI. L-3
12 Expalin the working principle of Nine level CHBMLI. L-3
13 Explain the operation of asymmetrical CHBMLI with two cells seven L-3
level and Nine level topology.
14 Explain about level shifted and Phase shifted PWM in 5- level L-3
CHBMLI.
15 Explain stiar case Modulation in 7- level CHBMLI L-3
16 Compare phase shifted and level shifted PWM. L-3
UNIT III DIODE CLAMPED MULTILEVEL CONVERTER
Introduction – Converter structure and Functional Description – Modulation of
Multilevel converters – Voltage balance Control – Effectiveness Boundary of voltage
balancing in DCMC converters – Performance results.
3.1 Introduction – Converter structure and Functional Description
1 What is diode clamped inverter? L-1
2 State the merit of diode clamped inverter. L-2
3 Explain the operation of five level diode clamped inverter. L-2
4 A single phase diode clamped inverter has m=5. find the peak voltage L-3
and current ratings of the diodes and switching devices if
io= 50sin(θ-π/3), Vdc=5kV.
5 Explain in detail about switching logic of diode clamped inverter. L-3
Modulation of Multilevel converters– Voltage balance Control –
3.2
Effectiveness Boundary of voltage balancing in DCMC converters –
Performance results.
1 Define Modulation. L-2
How will you classify the modulation methods in terms switching
2 L-2
frequency of power devices?
Explain level shifted and phase shifted PWM for diode clamped MLI.
3 L-3
Explain the operation of 5- level diode clamped MLI.
4 L-3
5 Explain the method to calculate the voltage deviations of the DC bus L-3
for the different switching combinations.
6 Explain the Effectiveness Boundary of voltage balancing in DCMC L-3
converters.
7 Explain in detail about the performance of five level diode clamped L-3
multilevel converter connected to power grid through coupling
inductor.
UNIT IV FLYING CAPACITOR MULTILEVEL CONVERTER
Introduction – Flying Capacitor topology – Modulation scheme for the FCMC –
Dynamic voltage balance of FCMC.
4.1 Introduction – Flying Capacitor topology

1 What is capacitor clamped MLI? L-2

 What are the disadvantages of flying capacitor MLI?
2 L-2
Why should the net charge variation in flying capacitor be null?
3 L-2
What are the advantages of FCMC?
4 L-1
Write the equation for the output voltage of n-level FCMC and the
5 L-1
average voltage across each capacitor.
Discuss the features of flying capacitors MLI by comparing with other
6 L-3
types
A single phase flying capacitors MLI has m=5. find the number of
7 L-3
capacitors, peak voltage and current ratings of the diodes and switching
devices if Vdc= 5kV.
4.2 Modulation scheme for the FCMC – Dynamic voltage balance of FCMC.
List the modulation techniques used for FCMC.
1 L-1
How the carrier triangular waves displaced in phase-shift carrier pulse
2 L-2
width modulation?
Mention the features of FCMC.
3 L-1
Write the merits and demerits of phase-shifted pulse width modulation
4 L-2
(PSPWM).
What is the imbalance voltage in flying capacitor?
5 L-2
How is the dynamic behavior of voltage across the flying capacitor
6 L-2
treated?
A single phase flying capacitors MLI has m=5. find the generalized
7 L-4
fourier series and THD of the phase voltage
Compare the performances of diode clamped, flying capacitors and
8 L-4
CHBMLI if m=7.
UNIT V MULTILEVEL CONVERTER WITH REDUCED SWITCH
COUNT
Multilevel inverter with reduced switch count-structures, working principles and
pulse generation methods.
How are the reduced switch count multilevel converter topologies
1 L-2
classified?
2 What are the factors considered while choosing the modulation strategy L-2
for multilevel
converters?
3 Define fault tolerant ability of MLI. L-2
4 List the merits of cascaded basic blocks multilevel inverter (Series L-2
connection fundamental blocks inverter (SCFBI) based MLI).
5 What are the drawbacks of T-type multilevel inverter? L-2
6 How are the reduced switch count MLIs classified L-2
7 List the advantages of reduced switch count in multilevel converter. L-2
8 What are the advantages and disadvantages of Cascaded half-bridge- L-2
based multilevel dc-Link (MLDCL) inverter?
9 Mention the merits and demerits of packed U-cell topology. L-2
10 What are the modulation schemes used in the reduced count inverter L-2
topologies?
11 Explain the working principle and structure of MLI with reduced L-3
switch count.
12 Discuss different PWM methods associated with MLI L-3

Prepared by HOD/EEE