CHAPTER 20

Advanced DC to DC Converters
- Switched-Mode

Chapter 19 introduced a single-switch, single-diode, first quadrant, dc-to-dc converter that employed two
inductors and two capacitors, specifically the boost-buck Cuk converter. Many other converter variations
exist that employ multiple capacitors and inductors, for example the zeta, ±Luo, CSC, Landsman, and
sepic converters. A circuit based systematic concept can unifying the thirty three existing single
switch/diode topologies, where three of the thirty three are the basic buck, boost, and buck-boost
topologies considered in Chapter 19. The extra reactive components yield topologies having new transfer
functions, for example the zeta converter produces a non-inverting buck-boost voltage output function.
Other converter properties considered in this chapter are the discontinuous/continuous conduction
boundary of the boost converter and current source dc to dc converters.

20.1 Basic generic smps transfer function mapping

The three basic smps, viz., the buck, boost and buck-boost converters, utilise a switch, diode and
inductor, as shown in figure 20.1a, to realise their fundamental dc-to-dc conversion function.
Figure 20.1b shows a general form of the circuit in figure 20.1a, where the function of the two switching
elements have not been prejudged to be a diode and a unidirectional voltage and current switch.
If the switch T1 in the configuration of the circuit in figure 20.1a is controlled with an on-state duty cycle of
δ, then the transfer functions associated with the buck, boost and buck boost converters are realised, as
decoded in the table in figure 20.1. Although each transfer function is fixed, the output function can be
modified by mapping the control parameter. For example, if the complement of the duty cycle δ is used to
control T1, namely 1-δ, then in the case of the boost converter, the output voltage tracks -δ /1-δ, the buck-
boost transfer function. The mapped transfer functions of the three basic converters, when controlled by
the duty cycle complement 1-δ, are shown in Table 20.1 and are plotted in figure 20.2.

transfer
converter ports nodes
function
C forward
B/A δ xy/xz
/buck
boost A/C 1 / (1- δ) xz/yz
buck-
-B/C -δ/ (1- δ) yx/yz
boost

Figure 20.1. Circuit elements of basic smps:

(a) circuit diagram; (b) generalised functional circuit; and (c) specific circuit components.

BWW
Chapter 20 Advanced dc-dc smps 856

Generally, if the duty cycle is encoded by f(δ), any effective transfer function can be generated within the
0≤δ≤1 voltage range of the basic converter. For example, in the case of the buck converter, any
monotonically increasing output voltage profile can be produced in the range between zero volts and the
input voltage magnitude. A lookup table mapping approach provides total flexibility.

Table 20.1: Mapped transfer functions

duty cycle mapping 0<δ<1 0 < 1-δ < 1 0 < f(δ) < 1
buck  1 f  
1 1 1
boost
1  1  f  
buck-boost  1 f  
  
1  1  f  

5 1 1
4  1
3
transfer function

0
0 0 .2 5 0 .5 0 . 75 1
-1

-2

-3

-4 1 
 
-5  1
-6

δ on-state duty cycle

Figure 20.2. The transfer functions of the three basic converters in terms of δ
and their complementary transfer functions in terms of 1- δ.

20.2 Basic generic current sourced smps

The smps considered in chapter 19 are based on a voltage source input, and are termed voltage-sourced
converters. A switch, diode and inductor are T (tee) connected between the voltage source on the input
and the capacitor-shunt decoupled load at the output, as shown in figure 20.3a. The three smps in figure
20.3b are current-sourced equivalents (duals) to the considered voltage-sourced buck, boost, and buck-
boost converters and each has the same corresponding voltage and current transfer ratio. The current
transfer functions are shown plotted in figure 20.4, with various circuit operating conditions shown in
Table 20.2. In these circuits, figure 20.3b, the smps capacitor C is equivalent to the inductor L in a
voltage-sourced smps, and the switch, diode and capacitor are π (pi) connected between the input
current source and the series-inductor filtered output load. Just as the inductor is designed for a specific
ripple current and continuous or discontinuous current conduction, the capacitor C in figure 20.3b is the
dual, being designed to have a specific ripple voltage and may or may not reach zero charge within each
cycle. The current boost circuit in figure 20.3b-ii is complementary to the voltage boost circuit in figure
20.3a-iii, in the sense of continuous input power. The voltage boost smps circuit can ensure continuous
current (hence continuous input power) from a dc voltage (energy) source, while the current boost smps
circuit can ensure a continuous non-zero voltage (hence continuous input power) at the output of a
current (energy) source.
Just as the three basic voltage-sourced smps produce a voltage-sourcing output (due to output shunt
capacitor Co in figure 20.3a), the three dual current-sourced smps in figure 20.3b produce a current-
sourcing output, because of the series output inductor Lo. In each current-sourcing case, bidirectional
energy flow is achieved by using parallel diode/switch combinations, just as with the voltage-sourced
converters, where bipolar capacitor voltages arise in the boost-buck case. In observing power
conservation, the voltage transfer function is the inverse of the current transfer function.
The current boost-buck converter in figure 20.3b-iv is the generic root of the Cuk converter (better
generically called the boost-buck converter), where the current source input in figure 20.3b-iv is replaced
by an equivalent series voltage source and inductor, as shown in figure 20.3c-iv. This same input
conversion from a current source input to a voltage source input (with a series inductor) can be applied to
the other two current source converters, specifically giving figures 20.3c.
 857 Power Electronics

Tee canonical cell Pi canonical cell Pi canonical cell

Ii Io Ii Io Ii Io
Zin Zout Zx Zx
Vo Ii
(i) +  Ei Lo Li Lo
Ei Zx Co R Vo Ei Io Zin Zout Zout
Ii R Vo Ei Zin R Vo
f   
vL dt = L × Δi ic dt = C × Δv ic dt = C × Δv & vL dt = L × Δi
Ii Io Ii Io Ii Io
L + Vo Ii
(ii)  Ei + T Lo Li + T Lo
T D Co Vo Ei Io Ii C D R Vo Ei C D R Vo
Ei

R
vL dt = ton × (Ei-Vo) = toff × Vo Voltage BUCK ic dt = ton × (Io- Ii) = toff × Ii Current BOOST
 Current BOOST  Voltage BUCK
Ii Io Ii Io Ii Io
Vo Ii
L D +  Ei D + Lo Li D + Lo
(iii) T Co Vo Ei Io C R Vo Ei C R Vo
Ii
Ei T T
 1 /1 
R
vLdt = ton × Ei= toff × (Vo – Ei) Voltage BOOST Current BUCK
ic dt = ton × Io= toff × (Ii - Io)
 Current BUCK  Voltage BOOST
Ii Io Ii + Io Ii + Io
Vo Ii

(iv)
D Ei Io Ei C Lo Li C Lo
T L Co Vo Ii D R Vo Ei D R Vo
Ei +   / 1   T T
R Voltage BUCK-BOOST Current BOOST-BUCK
vL dt = ton × Ei = - toff × Vo ic dt = ton × Io= - toff × Ii
 Current BOOST-BUCK  Voltage BUCK-BOOST
(a) (b) (c)

Figure 20.3. Three basic converters: (a) voltage sources, (b) current sources, and
(c) current source converted to equivalent voltage source plus series inductor.
Chapter 20 Advanced dc-dc smps 858

Table 20.2: Three current-sourced single switch smps

Current-sourced converters
Characteristic Current step-up Current step-down Current reversal
Buck voltage Boost voltage step up/down
v C  Io - Ii I Io I -I Io I
t T  i ( - t T ) tT  i o (  tT ) t T  i (  t T )
tT  t off   C C C C C C
Io E i
 
I i Vo  1 1
 1 
0  1 tT  
E i I i  Vo I o
I o  I i thus Vo  Vi I o  I i thus Vo  Vi Io  0
Ii Io Vo I
v C 

 Ei  ½  - t T  V o  ½ t   ½ o tT

  V C  ½v C C C T  C
v C   R 1         1    R  
 Ii  2    I i 1    R   Ii 
 2C   2C     2C 
Vo
Rcrit 
Io (1   ) 2   2
I i (1   ) 2C 2C 2C
  v C 1 v C  2 v C
I0 2C  ½ 2 ½ ½

Ii 1   Ii 1   Ii
when v C  0
input/output continuous input voltage discontinuous input voltage discontinuous input voltage
voltage discontinuous output voltage continuous output voltage discontinuous output voltage

current 1 1 1 1

1 1   
   
reversibility
1 1  
voltage     
1 1 1 1
apparent load
resistance
1   
2
1
1   
2
 Io 
2
Ro Ro Ro
Ri    Ro  2
2
 Ii 

Figure 20.4 shows that the output current magnitude monotonically decreases as the duty cycle δ
increases. If required, monotonic current magnitude increase with increasing δ can be achieved by
mapping δ with 1 - δ, as considered in section 20.1. The current transfer functions for the current-sourced
converters are then the same as for the voltages sourced converter voltage transfer functions.
Nine voltage sourced dc-to-dc converters, offering continuous input and output current, can be found in
section 20.6, figure 20.7.

1

Current transfer ratio

1

1



Figure 20.4. The current transfer functions of three basic current sourced converters in terms of δ.
859 Power Electronics

20.3 Generic current sourced converters, converted to voltage sourced converters

The inputs of the three basic current source converters in figure 20.3b can be made compatible with
voltage sources by interposing inductance as shown in figure 20.3c. The three resulting converters offer
continuous input and output current operation due to series inductance on the input and output. This
continuous input energy possibility is essential for renewable energy source interfacing, such as with
photovoltaic arrays, if large, unreliable electrolytic capacitor decoupling is to be avoided.

The output voltage Vo (and current Io) of each converter is controlled by varying the switch T on-state
duty cycle, δ = tT / τ, usually assuming a fixed (voltage or current) energy-source, and continuous energy
flow (continuous conduction mode, CCM) in the canonical pi or tee cell reactive component is also
assumed.
Analysis of the voltage-sourced circuits in figure 20.3a, in determining their voltage transfer function, Vo /
Ei, in a CCM, involves equating the volt-second (Vxt) of the inductor during switch T on-period, tT, and off-
period, τ-tT. The average inductor voltage ∫[Link] is zero if the instantaneous current is the same at the
beginning and the end of the integration period τ, even if there is a constant dc bias current through the
inductor. The inductor L is referred to as the controlling element in the sense that it controls the ripple
current magnitude, hence energy transfer magnitude, whilst the switch T induced inductor voltage duty
cycle specifies the energy transfer rate, hence the voltage transfer function, f(δ).

Analysis, Io / Ii, of the current-sourced converters in figures 20.3b and 20.3c, is centred on the capacitor
charge (Ixt) over one cycle, τ, under steady-state switch duty cycle δ and input/output conditions. The
average capacitor current ∫[Link] is zero if the instantaneous voltage is the same at the beginning and the
end of the integration period τ, even if the capacitor holds a dc bias voltage. The capacitor C is referred to
as the controlling element since it controls the ripple voltage magnitude, hence energy transfer
magnitude; whilst the switch T induced capacitor current duty cycle specifies the energy transfer rate,
hence the current transfer function, 1/f(δ).

The result of the mesh analysis is that each voltage-source transfer function has a current source
equivalent (a dual) with the identical transfer function, as shown in figure 20.3. In each corresponding
case, the voltage transfer function is the reciprocal of the current transfer function, that is f(δ) = Vo / Vi = Ii /
Io, since Ei x Ii = Vo x Io, that is, the average power in (from the energy source) is equal to average power
out (into the load R). The instantaneous powers need not be equal since the canonical pi or tee cell
reactive L/C temporarily and cyclically stores energy during the energy transfer process.

20.4 Thirty-three dc-to-dc voltage source converters

Figure 20.5 tabulates thirty-three dc-to-dc converters, which use one switch, one diode and no more than
two capacitors and two inductors. Family ′A′ is the three basic converters, namely the buck – A1, boost -
A2 and buck-boost – A5 converters considered in Chapter 19. Family ′C′ are the three converters in
figure 20.3c, derived from the current source converters in figure 20.3b. Family ′G′ produces transfer
functions other than the basic three functions, amongst the converters, the zeta converter, G6, which
produces the positive (non-inverting) buck-boost function. Family ′P′ comprises converters that produce
the basic three transfer functions with zero average capacitor voltage, as considered in section 20.5.
Nine of the thirty-three converters in figure 20.5 offer continuous input and output current (topologies
including all of family ′D′). Just as continuous output voltage topologies usually employ a shunt capacitor
Co across the output (as with family ′A′, the basic three converters) continuous output current topologies
usually employ a series output inductor, Lo.
If two diode//switch pairs are used, all thirty-three converters are reversible, whilst the converters in
series G (other than the zeta converter G6) require the reversible pairs for operation over the full duty
cycle range, 0≤δ≤1, in either direction of power flow.

Topologies in any column are cyclically related by repeatedly flipping (output port becomes the second
port) and inversing (input and output ports are interchanged). The mathematical transfer function is also
generated by this process (see section 20.10), without recourse to circuit analysis.

By duality, thirty-three current source converter equivalent circuits exist.

 A C D E F
L + Li + + Io Li Io
1-TF Li C Li
+ C
+ + +
Co R Co Ro Co Ro Co Ro Co Ro
C D D Lo D C
L + T
1 Lo + T D Lo
Io Io
A1: Buck δ C1: δ -δ /1-δ 1/1-δ δ

L 1-TF + D Lo Io + C Lo Io +C Lo + Io
+ + Lo D + Io
Co R C + Co Ro T D Co T Li Co Ro C T Co Ro
2 T Li Li +Ro D Li

A2: Boost 1/1-δ C2: 1/1-δ -δ /1-δ δ 1/1-δ

Io D Io + C Io
Li + + Li +
Co Ro Co Ro Co Ro
T C Li + C T Lo
3 Lo Lo + D

1/1-δ -δ /1-δ δ

Lo + Io T Lo D Io Li C + Lo + Io
+T
C D Co Ro + Co Ro D Co Ro
4 Li C Li + T

δ -δ /1-δ 1/1-δ
+ Io
1-TF Li TF + Lo Li Lo TF
L Co Lo T + + Li +
1-TF C R C
L Co R D C Co R
+ Co Lo Co +R
5 R
+
A5: Buck-Boost -δ /1-δ C5: Cuk -δ /1-δ 1/1-δ δ -δ /1-δ

Li + + Lo 1-TF Io
1-TF Li + Lo + Lo
C C Li
6 R T Co R C + Co +R

δ 1/1-δ -δ /1-δ -ve Luo

BWW
 G P
+ Li + L + Io
Co Ro
C D C Lo Co Ro
1 L + Io D

-δ /1-2δ P1: δ

Lo + D Io Li Lo D Io
+
2 C Co Ro +C Co Ro
T Li + T

1-2δ /1-δ P2: 1 /1-δ

Li +
Co Ro
C L
3 D +
Io

-δ /1-2δ

Li D Lo Io
+
4 C Co Ro
T +

1-2δ /1-δ

+ Io DTF
L C TF
+ C
Li
5 Lo Co R Lo Co R
+
sepic δ /1-δ P5: -δ /1-δ
Io
C TF + Lo
Li
6 R

+ve Luo/zeta δ /1-δ

Figure 20.5. The thirty-three possible single-switch, single-diode dc to dc converters.

SMPS operate on ac circuit theory properties, specifically the dc input, dc output and zero voltages are at
the same ac potential (short circuit all dc voltage sources). Thus specific topology remain operational
(with a voltage transfer function change), when component connection to a dc potential is changed to
another dc potential, including 0V. This concept is exploited in example 19.4 and can be applied to the
C5 Cuk converter, as in example 20.1. The ground connected input switch can be connected to the
output to create the G3 converter. If the output diode is connected to the input, the G4 converter is
formed. Example 20.1 shows that factors, such as voltage transfer function, reversibility, etc. remain
internal consistent.

Example 20.1: C5 (Cuk) converter topological conversion to G3 and G4 topologies

The ground connection of the switches in the C5 converter are reconnected as follows.

i The output diode ground connection is moved to the input forming a G4 converter
ii The input switch ground connection is moved to the output forming a G3 converter

Based on the C5 voltage transfer function, establish the G3 and G4 transfer functions

BWW
Chapter 20 Advanced dc-dc smps 862

+ Io
Connect Li D Lo Io
L Co Lo +
1-TF
o/p diode Co Ro
R to input T C +
+
C5: Cuk -δ /1-δ → G4: 1-2δ /1-δ

+ Io Connect Li +
L Co Lo input Co Ro
1-TF L
C
switch to D +
R Io
+ o/p
C5: Cuk -δ /1-δ → G3: -δ /1-2δ

Solution

The voltage transfer function of the C5 buck-boost converter is

vo 

Ei 1

i If the output side diode of C5 is connected to the input, then the G4 topology is created.

The C5 transfer function can be rearranged as


v o  E i
1
The output diode reconnection to the input Ei, increases the output voltage by the input voltage. That is

     1  2 
vo  Ei  Ei  Ei   1  E i  1 
1 1     
That is
v o 1  2

Ei 1
which the G4 converter transfer function. The output inductor in both topologies filters the discontinuous
voltage at its input and creates an output current source.

ii If the input switch of C5 is connected to the output, then the G3 topology is created.

The C5 transfer function can be rearranged as

1
Ei vo

The input side switch reconnection to the output vo, increases the input voltage by the output voltage, viz.
1 1     1  2 
Ei vo v o v o   1  v o  
      
That is
vo 

E i 1  2
which the G3 converter transfer function. The input inductor in both topologies filters the discontinuous
voltage at the inductor’s output and creates an input current source.

Example 20.1 illustrates two cases where the port dc voltage is additive. But the port voltage can also be
subtractive, depending on the relative polarity of the input and output voltage and when reversing the
connection changing process. Example 20.2 illustrates the zeta G6 and sepic G5 converters reconfigured
to create converters C1 and C2.
863 Power Electronics

Example 20.2: C1 and C2 converter topological conversion to G5 and G6 topologies

The switch and diode connection in the C1 and C2 converters are reconnected as follows.

i C1 converter:- the switch terminal connected to the output is grounded to form G5

ii C2 converter:- the diode anode connected to the input is grounded, forming a G6 converter

Based on the C1 and C2 voltage transfer function, establish the G5 and G6 transfer functions,
respectively.

Li + Connect + Io
L C TF
+
Co Ro switch to
C D
L + ground Lo Co R
Io
C1: δ → G5: sepic δ /1-δ

Io
D Lo Io Connect
+ C TF + Lo
+ Co diode to Li
C Ro
T Li ground R

C2: 1 /1-δ → G6: zeta δ /1-δ

Solution

The voltage transfer function of the C1 converter is

vo

Ei
i If the switch in C1 is connected to ground, then the G5 sepic topology is created.

The C1 transfer function can be rearranged as

1
Ei vo

The switch reconnection means the input is no longer added to the output, that is, it is subtracted:

1 1  1   
Ei vo v o  v o   1  v o  
     
That is
vo 

Ei 1  
which the G5 sepic converter transfer function.

ii If the diode of C2 is connected to ground, then the G6 zeta topology is created.

The C2 transfer function can be rearranged as


vo  Ei
1
With the diode grounded, the input component no longer opposes the output voltage. That is
1  1    
vo  Ei  Ei  Ei   1  E i  
1  1    1   
That is
vo 

Ei 1  
which the G6 zeta converter transfer function.
♣
 Chapter 20 Advanced dc-dc smps 864

20.5 Converters with zero average capacitor voltage

The last family of three dc-to-dc converter topologies in figure 20.6, (family ′P′ in figure 20.5), with buck,
boost, and buck-boost voltage transfer functions, offer operation with zero average voltage across the
controlling capacitor C. These three single-switch, single-diode, converters offer the same features as
basic dc-to-dc converters, such as the buck function with continuous output current and the boost
function with continuous input current, but both with zero average capacitor voltage.
Figure 20.6 shows the two switch states, namely the current loops when the switch T is alternating on
and off. Transfer function analysis is based on the capacitor C voltage ripple Δvc, assuming constant
current in the two circuit inductors Li and Lo.
In each case, the average capacitor voltage is zero, since the capacitor is in a Kirchhoff voltage loop
involving two inductors, which each have an average voltage of zero. The average inductor currents are
related to the input and output currents. Thus as the load current decreases, the input current ripple
decreases, whence the inductor currents decrease. As the energy transfer decreases, the capacitor
ripple voltage (energy transfer) decreases, eventual reaching DCM, when the capacitor voltage has zero
voltage periods.

Ii Io Ii Io Ii Io
converters
sourced
voltage
Basic

+ Co Ei Li D Io D cct
T Lo + Ei T
Ei D
Vo Vo Lo Co R Vo O
R
T Co R
+
A1 A2 A5
1 (a) (b) (c)
fv    cct
f i   Voltage BUCK  Current BOOST Voltage BOOST  Current BUCK
Voltage BUCK-BOOST
 Current BOOST-BUCK
P1 P2 P5
Ii Io Ii Io Ii Io
converters
sourced
voltage

Li Lo D Io
New

T + Co Ei Li T C TF cct
Vo + Vo Li Vo A
Ei C Lo Ei Lo Co
R
C Co R R
D T +
switch T switch T switch T switch T switch T switch T
switch T state
ON OFF ON OFF ON OFF
Io Ii Ii Io Ii Io Io Ii Io Io Ii+Io Io Io Ii Ii+Io Io
operating
stages

Io + Co + Co Co
Two

Io - Ii Li Lo Li C C Co C cct
Ei Ei Ei Li Lo Li Lo B
R R R R + R + R
Io - Ii C Ii Io Io C Ii-Io Ii-Io Ii Ii Io

Loop eqn
C×Δvc = ic dt = ton × (Io- Ii) = toff × Ii C×Δvc = ic dt = ton × Io= toff × (Ii - Io) C×Δvc = ic dt = ton × Io= toff × Ii
equations 1
current
Ei Io 1 1 Ei Io 1 Ei Io 1 1
f i    f i    f i   
transfer eqn
    1    
function, Vo Ii  fv   Vo Ii fv   Vo Ii  fv   2
fi(δ)
voltage
Vo I Vo I i 1 Vo I i 
transfer fv      i  fv      fv     
eqn
function, E i Io Ei Io 1   Ei Io 1   3
fv(δ)
P1 P2 P5
(a) (b) (c)

Figure 20.6. Three dc-to-dc converters with zero average capacitor voltage: topologies, operating
stages, and transfer functions.
865 Power Electronics

Figure 20.6B shows the two states created by operation of the switch T, namely the current loops when
the switch T is on, ton and when T is off, toff, (such that ton+toff =τ ). Energy transfer (voltage and current
transfer function) analysis is based on the capacitor C voltage ripple Δvc, specifically C×Δvc = ic dt, (eqn 1
in figure 20.6), assuming constant current in the two circuit inductors Li and Lo (large inductance). The
three basic converter transfer functions result, viz., buck, boost, and buck-boost, which are only switch
on-state duty cycle δ dependent, as shown by equations 2 and 3 in figure 20.6. The average input
inductor Li current is always equal to the average input current, while the average output inductor Lo
current is always equal to the average output current.

Circuit component average voltages and currents are given in Table 20.3. In practice, the average
capacitor voltage depends on the voltage difference of the resistive voltage drops associated with the
inductor windings. Although the two inductor resistive voltages counter each other, they only cancel to
zero at specific conditions, including duty cycle.

This near zero capacitor voltage can be exploited to create a transformer isolated version of the buck-
boost converter P5 by splitting the capacitor into series capacitors and inserting a shunt transformer, as
is done with the transformer coupled Cuk converter (see section 20.7). But unlike the Cuk transformer
coupled version, large dc decoupling capacitors are needed to minimise any core dc bias. The important
coupled circuit feature is that energy is transfer by transformer action, with no energy temporarily stored
in the core, as is the case with the basic isolated buck-boost topology. Therefore energy transfer is not
limited by the magnitude of energy that can be stored in the core volume.

If the capacitance C is large, ac wise, for analysis purposes, the two inductors Li and Lo are in parallel
and each of the three P sequence converters effectively reduce (degenerate) to the corresponding basic
converters in sequence A.
Chapter 20 Advanced dc-dc smps 866

Table 20.3: DC-to-dc converter normalized component ratings

voltage buck boost buck-boost

Figure 20.6 / cct A (a) A (b) A (c)
topology P1 P2 P5
1 
Voltage TFv Vo / Ei δ
transfer 1 1
function 1 1
Current TFi Io / Ii 1-δ
 
voltage VT / Ei 1-δ 1 1
T
(ave) 
current IT / Io 2 2
Switch 1
1 1
T voltage VT / Ei 1
T 1 1
(max) 1 1
current IT / Io 1
1 1
 
voltage VD / Ei δ
D 1 1
(ave)
Diode current ID / Io  1    1 1
1 1
D voltage VD / Ei 1
D 1 1
(max) 1 1
current ID / Io 1
1 1
ton IC / Io 1-δ 1 1
current 
τ - ton IC /Io δ δ
Capacitor 1

C average VC / Ei 0 0 0
voltage CΔvC /τIo  1     
ripple
CΔvC /τIi 1  1    1

  
ILi / Io
Li 1 1
ILi / Ii 1
average  1
current 1 1
ILo / Io 1
Lo 1 1
ILo / Ii 1
 
Inductor
Δ I Li  I Lo
current 2  1 2  1
inductor VLi - VLo 2  1
Ii  
voltages
IL

dc I Li2  I Lo2 2 2  2  1 2 2  2  1
Li + Lo 2 2  2  1
losses Ii 2
 2
2

Li Li ΔILi /τEi  1    δ δ
ripple
current Lo Lo ΔILo /τEi  1    δ ≈δ
Discontinuous Continuous Discontinuous
input/output input Ii Li ΔIi
0, Io 2δτEi 0, Io /(1-δ)
ripple Continuous Discontinuous Discontinuous
current output into Co // R Lo ΔIo
2(1-δ)τVo 0, Io /(1-δ) 0, Io /(1-δ)
867 Power Electronics

20.6 Converters with continuous input and output current (continuous power)

Of the three basic voltage-sourced dc-to-dc converters (buck A1, boost A2, and buck-boost A5) shown in
the three parts of figure 20.7A, only the boost converter, figure 20.7A-b, offers continuous input current,
but with a voltage sourcing output. Many renewable interfacing stages employ this topology or an energy
conversion stage based on its functionality concept, or alternatively resort to a converter large input
filtering stage. The three basic voltage-sourced converters (A1, A2, and A5) in figure 20.7A have current
sourced duals, as shown in figure 20.7B. Both converter source types (current and voltage) have the
same transfer function, relating the input voltage Ei and current Ii to the output voltage Vo and current Io,
based on a lossless converter, that is, power conservation gives Ei×Ii = Vo×Io. In the dc voltage source
case, the input current for energy conservation is the average input current, whilst in the dc current
source case, the input voltage for energy conservation is the average input voltage.

Analysis to derive the current transfer function, fi(δ)= Io / Ii, of the current-sourced converters in figure
20.7B, is based on the capacitor C charge Ixt over one cycle, τ, under steady-state switch on-state duty
cycle, δ, and input/output conditions. The average capacitor current ∫[Link] is zero if the instantaneous
voltage is the same at the beginning and the end of the integration period τ, even if the capacitor holds a
dc bias voltage. The switch T and diode D on/off energy transfer paths (whence transfer function) are
summarized in the three parts of figure 20.7C. The capacitor C is referred to as the controlling element in
the sense that its ripple voltage magnitude Δvc, controls the energy transfer magnitude; whilst the switch
T induced capacitor current duty cycle specifies the energy transfer rate, hence current (whence voltage)
transfer function. Because the transfer function is based on dc circuit conditions and the energy transfer
is an ac function, any of or combination of the reactive components, the input inductance L i, the output
inductance Lo, and C, can be controlling elements. That is, irrespective of the inductor ac voltage wave
shape, in a steady-state inductor CCM, the dc current at the beginning of a cycle period is the same as at
the end of the cycle. The same applies to a capacitor, but with voltage and current interchanged. This
means any reactive component can be used to track any desired input current reference or profile.

Continuous current alone from an energy source is insufficient to ensure continuous power from that
source. Short-circuiting a current source means zero delivered power, although the source remains
functional current wise. Depending on the topology, an electromagnetic alternative is to temporarily
stored the source energy in a shunt capacitor (for a current source) or a series inductor (in the case of a
voltage source). A PV cell exhibits both current and voltage source property, in which case either or both
reactive component types can be used to temporarily store energy.

The controlling element, that is the element experiencing the ripple associated with ac energy being
transferred from the input to the output, is the capacitor C. The capacitor voltage ripple Δvc, is given by
eqn 1 in figure 20.7 and is dependent on the load current magnitude. But if the input inductance L i is low
such that it experiences a significant current ripple, then the transfer function becomes dependent on
both Li and C, whence the input current can vary so as to track the current profile necessary to follow the
energy source operational maximum power point. One of the two energy transfer stages (T on, period ton
or T off, period τ-ton, with CCM) in figure 20.7C remains dependent only on C, while the other stage will be
dependent on both Li and C and their energy variations. Both controlling elements produce the same
transfer function, so both stably contribute to the energy being transferred at the same transfer function
level. Alternatively, if C is increased to experience minimal ripple, operational properties are dependent
on Li, as in basic voltage source dc-to-dc converter analysis. Any input current profile can be tracked,
with a response related to the inverse of the input inductance, Li.

Although circuit topologies E in figure 20.7 have no inductor at the input, as with the other topologies in
figure 20.7, the input current is continuous. This transferable continuous current property is readily
understood from Kirchhoff’s current law. In figure 20.8, the sum of the three currents at the canonical cell
terminals x, y, and z must be zero. Therefore if the currents at any two terminals are continuous, then the
current must be continuous (or continuously zero) at the third terminal. All the topologies in figure 20.7
have inductance at two of the three terminal, hence current can be continuous at the third terminal.

The topologies in figure 20.7E (and figure 20.7F) indicate an output voltage sourcing mode by the
addition of the output filter capacitor Co. For a current-source output, the presence of Lo allows Co to be
removed. Similarly, adding the same load shunt capacitance C o across R in the topologies in figure
20.7D, converts the current sourcing output into a voltage sourcing output. Current sourcing outputs are
amenable to stable parallel connection, while voltage sourcing outputs are applicable to stable series
connection.
Chapter 20 Advanced dc-dc smps 868

20.6.1 Converter component ratings

Based on the transfer function Vo /Ei = Ii /Io, component average voltages and currents can be normalized
with respect to the input voltage Ei and output current, Io, (or Vo and = Ii) as appropriate. The average
inductor voltage and average capacitor current are both zero in steady state, so in conjunction with
Kirchhoff’s laws, the various component dc voltages and currents in tables 20.4 and 20.5 can be
expressed in terms of the voltage transfer function, and more generally in terms of the switch T on-state
duty cycle, δ.
For a given transfer function, independent of topology, the switch and diode average voltages and
currents are the same, as are the capacitor dc and ripple voltages, provided the inductor ripple currents
are minimal. Given the capacitor ripple voltage is the same, as is the dc offset, the maximum load
resistance, specifically critical resistance, is the same for a given transfer function independent of
topology, as summarized in Table 20.4. Transposition of the inductors in the different topologies, for a
given transfer function, results in different inductor average currents (and ripple), as shown in Table 20.5.
When capacitor voltage ripple dominates (large inductances for L i, and Lo), the component peak currents
are similar to their average currents but the peak voltages can significantly differ from component
average voltages. This is particularly true for low or high duty cycles. The peak inductor current being
similar to the average current implies minimal input and output current ripple.
The converse is applicable when inductor ripple current dominates, with large C hence minimal ripple
voltage. The capacitor peak voltages are similar to their average voltages but the peak currents can
significantly differ from capacitor average currents within the switch T on and off periods.
Each converter design is the same as for its generic converter since each topology with the same
transfer function, has the same component ratings, stresses, and maximum resistance for CCM, as
shown in Table 20.4. The inductors are dimensioned to produce the required ripple currents and/or I2R
losses, according to Table 20.5.

The performance factors of efficiency, voltage and current regulation, and current ripple are strongly
related to converter transfer function. With reference to tables 20.4 and 20.5:
i. Efficiency: Boost converters have the highest efficiency because for a given power they have the
lowest output current hence lowest diode on-state voltage and copper I2R losses, whilst the buck
converter has the highest output current whence the highest diode conduction voltage and I2R losses.
Converters where inductor current comprises the input and output current have the highest I2R losses,
hence lowest efficiency.
The copper losses of converter pairs (D5, D2), (C2, C5), and pair (D3, D1) would be expected to be
the same because they are the same converter, but with power drawn from the other port. That is, the
I2R loss function of D5 is the same as D2 (  2   2  / 1   2  from Table 20.4 since they are the same
converter but with power drawn from complementary output ports P o and P1. On this basis the overall
efficiency of the converter pairs would be expected to be the same.
ii. Voltage and current regulation: Similarly for output voltage regulation; the buck converter has the
lowest output voltage (and increased output current), whence the diode voltage which is the largest of
the three basic converters, represents a more significant proportion of the output voltage. Hence buck
converters should employ silicon Schottky diodes. Mitigating the poor output voltage regulation of the
buck converter, it has the best current regulation, with the boost converter having the poorest current
regulation at low current. That is, in open loop, the buck converter is best for accurately tracking the
current transfer ratio, (with an efficiency sacrifice), which is a fundamental control aspect of current
source input and output converters. Generally good current regulation is expected because the current
transfer function is independent of input and output voltages, which are effectively reduced due to
series component voltage drops, thus affect voltage regulation.
iii. Ripple current: Also because of the higher circuit voltages, the boost converter tends to have the
highest ripple current, whilst the buck converters have the lowest voltages, hence the lowest ripple
currents. Although converters where the two inductors are effectively in series with the output or input
tend to have a lower ripple current. Constant input ripple current, for a given δ, occurs when an
inductor experiences only the input voltage, otherwise ripple current is regulation and/or capacitor
voltage ripple dependent. Converters with significant ripple current increase at higher currents, have a
capacitor voltage swing which tends to become exponentially shaped, which affects open loop
regulation.

Generally the boost converter is used when continuous source current is required, without the use of
energy source decoupling capacitance. It is therefore commonly interfaced to renewable sources. The
disadvantage of the boost converter is that the controlled output voltage is always greater than the input
voltage. The presented buck-boost converters offer not only continuous input and output current but
controlled voltage down to zero, but with voltage polarity inversion. Nevertheless the buck-boost
topologies offer an alternative first stage for PV and fuel cell applications. The buck converters, in a
reversible form, may be viable in battery dc link backup systems of grid connected PV and fuel cell
applications.
 869 Power Electronics

1 Voltage BUCK  Current BOOST Voltage BOOST  Current BUCK

fv    Voltage BUCK-BOOST
f i   (a) (b)  Current BOOST-BUCK (c) cct

Ii Io Ii Io Ii Io
converters
sourced
Voltage

L + L D + D cct
T D Co R Vo T Co Vo T L Co Vo A
Ei Ei R Ei + R

voltage Vo Ii Vo Ii 1 Vo Ii 
transfer fv        : A1 fv       : A2 fv       : A3
function, fv(δ) Ei Io Ei Io 1 Ei Io 1

Ii Io Ii Io Ii + Io
converters
sourced
Current

Ei + T Lo Ei D + Lo Ei C Lo cct
Ii C D R Vo Ii C R Vo Ii D R Vo B
T T

switch T ON switch T OFF switch T ON switch T OFF switch T ON switch T OFF

operating

Ii Ii Ii Ii
stages

Ii + C Io Ii + C Io cct
Two

+ + L + L + L
Io C L Io C D Io T C Io T L L
C D C
R R R R R R
eqn
loop equations C×Δvc = ∫ic dt = ton × (Io- Ii) = toff × Ii C×Δvc = ∫ic dt = ton × Io= toff × (Ii - Io) C×Δvc = ∫ic dt = ton × Io= toff × Ii 1
converters

+1-TF C
controlled
Li and Lo

Li
sourced
Voltage

+
current

Li
+ 1-TF Lo Io TF + Lo Io Li Lo Io cct
C
C R D
R R +

Ei Io 1 1 Ei Io 1 Ei Io 1 1
current f i       f i     1  f i      
transfer Vo Ii  fv   Vo Ii fv    Vo Ii  fv  
function, fi(δ) : D5 (boost)
: D6 : C3 (Cuk)
complementary 1 - fv(δ) =1 - δ 1 - fv(δ) = 1 - 1/1- δ 1 - fv(δ) = 1 - -δ/1- δ
output Voltage BUCK  Current BOOST Voltage BUCK-BOOST
1 - fv(δ) TD  Current BOOST-BUCK Voltage BOOST  Current BUCK
converters
controlled

Lo
sourced

Lo + Io + C Lo Io Lo Io
Voltage
current

+T + cct
Lo

C D Co R T D Co
+R C + Co R E
Li Li T Li
voltage Vo Ii Vo Ii  Vo Ii 1
transfer fv        : D4 fv       : D2 fv       : C2
function, fv(δ) Ei Io Ei Io 1 Ei Io 1

inverse TD: δ  1/ 1- δ TD: -δ/ 1- δ  -δ/ 1- δ TD: 1/ 1- δ  δ

converters
controlled

Io + + Io
sourced

C
Voltage

current

Li D + + Li Li + cct
Co Co Co
Li

R R R
C T D C D F
Lo Lo + Lo
Io
voltage Vo Ii 1 Vo Ii  Vo Ii
transfer fv       : D3 fv       : D1 fv        : C1
function, fv(δ) Ei Io 1 Ei Io 1 Ei Io

(a) (b) (c)

Figure 20.7. DC-to-dc current-sourced and voltage-sourced topologies, operating stages, and conversions.
 Chapter 20 Advanced dc-dc smps 870

Table 20.4: DC-to-dc converter normalized component ratings

Figure 1 / cct Voltage Critical Capacitor C
transfer load Switch T Diode D
topology
(ave) (ave) current voltage
function resistance
TFv Rc voltage current voltage current ton Τ - ton average ripple
Vo / Ei τRc / 2LTFv VT / Ei IT / Io VD / Ei ID / Io IC / Io IC /Io VC / Ei CΔvC /τIo
D-a D6
E-a D4  1   1 1  1  1   
F-c C1
D-b D5
1
E-c C2 δ(1-δ)
F-a D3 1      1
1 1 1 
D-c C5
 1 1 1 1
E-b D2
F-b D1 1
Ratings for boost and buck-boost converters are the same since one topology is the flip of the other, as
seen in figure 20.8 (complementary outputs of the same topology).

Table 20.5: DC-to-dc converter normalized inductive component ratings

Voltage Current
Figure 1 / cct

Inductor Total inductor Inductor Li Lo Input/Output

transfer transfer
topology

average current Copper loss ripple current ripple current

function function
TFv TFi Li Lo Li + Lo ΔILi ΔILo ΔIi Lo /R»τ
Vo / Ei Ii / Io ILi / Io ILo / Io I 2
Li
2

 I Lo / I o 2
Li ΔILi / τ Lo ΔILo / τ Li ΔIi / τ LoΔIo /τ
Cct
D6  1 2 1 ½(1-δ)ΔVc (1-δ)Vo ½(1-δ)ΔVc (1-δ) Vo
D-a
Cct
D4  1 1 1  2  2  2 ½(1-δ)ΔVc (1-δ)Vo δ(1-δ)Ei (1-δ)Vo
E-a 
Cct
C1  1  2  2  1 δ(1-δ)Ei (1-δ)Vo δ(1-δ)Ei δδ' Σ1/L
F-c
Cct
D5
1
1
 2    / 1   
2 2

δEi ¼(1-δ)ΔVc δEi ¼(1-δ)ΔVc

D-b 1
1 
Cct
E-c
C2
1
1
1
1 1 / 12   δEi (1-δ)Vo δ Σ1/L (1-δ)Vo

1 
Cct
D3 1    / 1   
2 2
δEi ¼(1-δ)ΔVc δEi (1-δ)Vo
F-a 1 1

Cct
D-c
C5
1
1 1 / 12   δEi (1-δ) Vo δEi (1-δ)Vo

 1 1
Cct
D2 1  2    / 1   
2 2
δEi
E-b 1  1
 1
Cct
D1 1    / 1   
2 2
δEi ΣL (1-δ) Vo δEi ΣL (1-δ) Vo
F-b 1 1

1  f   +
I1 Port 1, P1
y I1 Io
Ii V1 +
+ x Ismps
Ei f(δ) Vo f  
Ei 1
Ei + Vo + V1 = 0 Port 0, Po
z

Figure 20.8. Basic converter functional block shown as a three-port block with two outputs Po and P1
shown.
871 Power Electronics

Table 20.6: Transformer isolated buck-boost dc-dc converters

Ii Io Ii + Io Ii + Io Ii + Io Ii + Io
voltage L Co Lo
D 1-TF C + Lo C
sourced T L + C
Ei Lo Co R Vo
converters R Ei L Lo Co R
R Ei L Lo Co R
+ + +
Classification
A5 C5 G6 G5 P5
name BUCK-BOOST Cuk ZETA SEPIC NEW

voltage (a) (b) (c) (d) (e)

transfer
function     
fv  
1 1 1 1 1

Discontinuous input current Continuous Discontinuous input current Continuous input current Discontinuous input current
features
voltage source output input and output current Continuous output current voltage source output voltage source output

Ii Io Ii + + Io Ii + + Io Ii + + Io Ii + + Io
Io Io
Magnetic LT ½Co ½Co D Lo T L ½Co ½Co D Lo
D L + T
coupling Ei T Lo Lo Co R Vo
+
R
R Ei T Lo Co R Ei L Lo Co +R
+ +
Coupling
Magnetic storage coupling Transformer coupling Transformer coupling Transformer coupling Transformer coupling
mechanism
Average
capacitor NA Ei +Vo Vo Ei 0
voltage
Primary dc
δIi Ei 0 Ei 0
bias
Secondary dc
Vo Vo 0 0
bias
20.7 Transformer isolated buck-boost dc-dc converters

duty cycle δ

Figure 20.9. Gain loss at high duty cycles due to circuit parasitic resistance/loss elements

Converter gain factors above 4 to 5 for boost and buck boost converters are practically challenging, due
to circuit loss elements, as illustrated in figure 20.9. Converter transformer coupling for voltage matching
alleviates this problem, particularly for buck boost type dc to dc converters.
The basic buck-boost converter A5 can be readily isolated via a coupled magnetic circuit as shown in
Chapter 19.8, figure 19.22 and Table 20.6. Additional features to isolation are voltage matching and
better semiconductor utilization, but the limitation is energy is temporarily stored in the coupled circuit
core. Thus for a given magnetic material, maximum energy transfer is limited by core volume, viz.
½BH×Volume. This is the case not only for the buck-boost converter but also the inductor coupled
versions of the sepic and zeta converters, as in figure 20.10. All smps inductive components must be
able to operate with a current (flux) bias, but when coupled windings are used, the windings must be
closely coupled, meaning air gap energy storage cannot be exploited.
Ii + Io Ii + Io

Li C C + Lo
+
Lo Co R Ei Li
R

average transformer
magnetising current
output current input current
Ii + Io Ii + Io
Io Io
Lp T Cp D Co T Cs D Lo +
R R
+
(a) (b)
Figure 20.10. Inductor coupled circuit magnetizing dc bias current of (a) sepic and (b) zeta converters.

The core volume is utilized differently (better) if magnetic energy transfer is through transformer action
rather than intermediate energy storage. If energy is transferred from the source to the load solely via the
ripple current through a series capacitor, as with buck-boost converters C5, C6, G5 and P5, then that
capacitor can be split so as to facilitate an interposed high magnetizing inductance transformer as shown
in figure 20.11 and Table 20.6. A series capacitor blocks dc, so the ac circuit can be transformer coupled
as shown in figure 20.11b. The table shows that the Cuk, sepic, zeta, and new buck-boost converters, all
with a buck-boost magnitude transfer function, fulfil the series energy transfer capacitor requirement. The
transformer acts in a current controlled mode where the voltages and currents adjusts to meet the
transformer equation (Iin / Iout = Vout / Vin = Nout / Nin) but simultaneously through the input current, the
converter current/voltage transfer function (Ii / Io = Vo / Ei =δ/ 1-δ) is enforced since both equations must
comply with energy conservation. This operation is not to be confused with the problematic so called
‘verge of coupled circuit and transformer operation’. In the Cuk, sepic and zeta cases the series split
capacitor pair must fulfil the important function of blocking and supporting a dc component from the

BWW
873 Power Electronics

magnetic coupling circuit. Table 20.6 shows the dc component each of the split capacitors must block,
which is independent of capacitance. Whereas the Cuk converter experiences a dc component on both
windings (Ei and Vo), the sepic (Ei) and zeta (Vo) only experience dc voltage on one winding (secondary
and primary respectively). The dc component is catered for, blocked, by using large capacitance. The
new buck-boost converter P5 develops no dc component on the primary or the secondary, because each
is in parallel with inductance, which as for the zeta primary and sepic secondary, has zero average
voltage. Large capacitance is therefore not necessary. In practice, any dc voltage bias is modified
(increased or decreased) due to component voltage drops, including inductor and transformer winding
resistance associated voltages.

Ii C Io Ii C C Io

Ii Io

Ii Io Ii Io

Figure 20.11. AC equivalent circuits.

The capacitance technically is not split, not halved or doubled for a 1:1 turns ratio transformer. The
capacitor on the secondary emulates the primary capacitor, ac wise, via the transformer.

The energy transferred is independent of the transformer turns ratio and the capacitance magnitude, and
is the load power Vo Io (and input power Ei Ii) over the switching cycle period τ, which must equate to
change in Since the capacitor on the zero average-voltage-side does not need significant dc blocking
capability, the capacitance is dimensioned based on any circuit instantaneous voltage restrictions (as
opposed to average voltage values).
In all cases, the capacitance magnitude, in conjunction with the energy to be transferred, determines the
ripple voltage magnitude superimposed on the blocked dc voltage. The dc bias on each capacitor is not
the same (except for topology P5, where both are zero biased). This is of particular advantage with the
Cuk converter, where the input side capacitor is bias by Ei and the output side capacitor voltage bias is
Vo. The capacitor voltage stressing in the uncoupled Cuk is associated with a bias voltage of Ei +Vo.
Because of the isolated coupling, the output voltage can be either polarity, with respect to the input, so all
the topologies in Table 20.6 have the same buck-boost transfer function.
With capacitor coupling, each capacitor has a dc bias (a stored electrical energy bias) and operation
relies on zero average capacitor current (otherwise the capacitor will over-volt). With inductor coupling,
as in figure 20.10, the inductor has a dc bias current (a stored magnetic energy bias) and operation relies
on zero average inductor voltage (otherwise the core will saturate). Without coupling the inductor can
utilise an optimised air gap to store energy, but if used in a coupled mode, any air gap adversely
decreases the coupling factor and increases leakage.
Observe that transformer action involves a series capacitor transferring energy between the converter
input and output, while inductor coupling action involves modification to a shunt inductor. Figure 20.12
shows two buck-boost topologies (from figure 20.7, topologies D1 and D2) that fulfil both coupling
concepts, viz. series capacitor and shunt inductor, without any other path between the input and output.

+ C + C Lo Io
Li
Co R
T D T D C
Lo + Li o
+R
Io

R R

+ +

(a) (b)
Figure 20.12. Inductor and transformer coupling (a) D1 and (b) D2 converters.
Chapter 20 Advanced dc-dc smps 874

Like the Cuk buck-boost converter, these two buck-boost converters have continuous input and output
currents. The only redeeming feature of these two complex topologies, over the same function with an
isolated Cuk converter, is that the input or output current ripple is less than with the same components in
a Cuk converter. The core operates in both transformer and storage coupled circuit modes.
This coupling circuit concept for isolation, can be applied to some of the tapped inductor topologies in
section 20.10, specifically (like T3+ and T3-), buck-boost topologies S3± and S3-.

20.8 Capacitor ripple voltage

Output capacitor ripple voltage for the basic converters was considered in chapter 19. Two main
components that specify the ripple are the output capacitor equivalent series resistance voltage and the
voltage change due to charging and discharging within the switching period, where discontinuous
conduction increases the ripple.
The charge change, whence voltage change in a capacitor is given by
Q  i t
v c  
C C
Generally two capacitor charge state regimes occur depending on if the capacitor provides the full load
current for any period, or not.

Case I
Figure 20.13a shows the typical capacitor charge regime for the buck, forward, Cuk, and zeta converters.
Analysis is based on charge balance, that is, the output capacitor operates with a steady state dc
voltage, with a constant load condition. Thus the hatched area (charge) above the average output current
Io = Vo /R must equal the (charge) area below Io.

Figure 20.13. Case I capacitor current waveforms.

For continuous conduction

Q  ¼ I o  I 1  (20.1)
while for discontinuous conduction
Q  ¼ I o  2     2  (20.2)
where I o  ½ 1   2  I 1  I 2 

Case II
Figure 20.14 shows the four typical capacitor charge regime for the boost, buck-boost and sepic
converters, where output current only flows from the capacitor when the diode does not conducts.

For continuous conduction I1 ≥ Io (a and b when I1 = Io = Vo /R)

1 Vo
Q  I o  V   (20.3)
C R

On the conduction boundary in (c), δ1 + δ2 = 1 and I1 = 0

Q  ½t 2 I o  I 1  where t 2   2 1  ½ 2  (20.4)
while for discontinuous conduction figure 20.14d, δ1 + δ2 < 1
Io
Q  ¼ (20.5)
2   
2
2

where the average output current is I o  ½ 2 I 1  I 2   Vo / R

875 Power Electronics

Figure 20.14. Case II capacitor current waveforms.

20.9 Current-Doubler Rectifier

Section 19.9 considered transformer isolated smps with full wave rectifier output stages involving a
centre tapped transformer secondary, as shown in figure 20.15.

Figure 20.15. Transformer centre-tapped secondary full-wave rectifier.

The current-doubler rectifier in figure 20.16a is an alternative rectification method which offers a simple
structure and better secondary utilization of the isolation transformers in push-pull, half-bridge and bridge
power stages where usually full-wave rectification of bipolar phase shifted rectangular voltage waveforms
are produced on the transformer secondary side. The current doubler rectifier is composed of one
transformer secondary winding, which is not centre tapped, two rectifier diodes, two identical filter
inductors and an output capacitor, as shown in figure 20.16a.

Where as with centre-tapped windings each has a 50% duty cycle at half the total secondary voltage, the
current doubler winding has double the duty cycle at the total secondary voltage level. The net effect is
the current doubler secondary winding carries half the current of the tapped configuration windings.
Chapter 20 Advanced dc-dc smps 876

(a)

(b)

Vsec 0

½Io

Isec 0

- ½Io

VL1
0

½Io
IL1
0

VL2
0

½Io
IL2 0
Io
Iout
0
1 2 3 4 1
interval

Figure 20.16. Secondary winding current doubler rectifier: (a) circuit and (b) waveforms.

With reference to figure 20.16b waveforms, current double operation of figure 20.16a is as follows:

Interval 1:- When the voltage across the transformer secondary winding, VSEC is positive, current flows in
the positive direction in both filter inductors, L1 and L2, as shown in figure 20.16b. During this period D1 is
forward biased while D2 is biased off by VSEC and the current in L1 charges the output capacitor Co
through D1; a path not involving the transformer secondary winding. The current in inductor L2 flows
through the transformer winding and D1 into the output capacitor. Hence the output current is the sum of
the dc components of the two inductor currents, whilst the transformer secondary experiences only half of
the load current. During this period, the voltage across L1 is negative and equal to the output voltage,
causing the current in L1 to decrease. VL2 across L2 is positive, forcing the current in L2 to increase.
877 Power Electronics

Interval 2:- During the primary circuit freewheeling period, no voltage is induced across the secondary
winding, VSEC=0. The voltage across L2, VL2 becomes negative, and equal to the output voltage
magnitude, producing a negative slope in the current IL2. Because of transformer leakage, IL2 continuous
through the secondary, rather than through D2. The conditions for L1 do not change.

Interval 3:- With a negative voltage across the transformer output, D1 turns off while D2 becomes forward
biased. The secondary current rapidly changes direction, being forced to equal the current in L1. The
current in L2 commutates to D2, into the output capacitor, and decreases at a rate determined by the
inductance and the output voltage. With VL1 positive across L1, current starts building up in L1.

Interval 4:- With VSEC=0, -Vo is impressed across L1 causing its current to decrease and there is no
change in the condition of L2.

The characteristics of the current-doubler rectifier are:

 primary side operation, including duty cycle, is unchanged
 no transformer center-tap, so simpler structure – but same total number of secondary turns
 transformer secondary carries approximately half of the output current
 diode and output capacitor stresses are identical to the full-wave technique
 additional filter inductor required
 each filter inductor carries only half the dc output current, hence quarter the I2R loss/inductor
 ripple currents cancel in output capacitor Co
 current-mode control to ensure equal inductor currents

20.10 Tapped inductor operation

By tapping the converter inductor, different variations of the basic converters can be realised, as shown
in figure 20.17. The tapping point can be referenced with respect to the diode, switch or input/output
terminals, with the resultant transfer function shown in Table 20.7, where tap turns ratio is defined by
N=n1/n1+n2 when the windings are cumulatively connected and N=n1/n1-n2 if n1<n2 when differentially
connected. The complete permutation of possibilities is shown in figure 20.18.
The resultant characteristics, with respect to the basic converters, can be summarised as follows.
The switch tap versions give higher conversion magnitudes than the basic converters.
The diode tap versions give lower conversion magnitudes than the basic converters.
The rail tap versions give both higher and lower conversion magnitudes than the basic converters.

Thus it is possible to increase the gain in order to obtain higher output voltage magnitudes. As with any
single ended coupled circuit, semiconductor over-voltage, due to leakage stored energy, is a problem.
N<0

S D S D
S D + S D
Ei Ei
+
Ei Vo Ei Vo n2 n2
n1 n2 n1 n2
n1 C Vo n1 C Vo
C C + +
 N'  N'  
    N  N
1 N 1 N 1 1
n1 n1 n1 n1
N  N  N  N 
n1  n 2 n1  n 2 n1  n 2 n1  n 2
(a) (b) (c) (d)

n1 n2 n1 n2 n1 Vo n1 Vo
Ei Vo Ei Vo Ei Ei
n2 D C n2 D C
S D C S D C
S S

(e) (f) (g) (h)

Figure 20.17. Tapped inductor seeding buck-boost converters (a) terminal inductor tap connection
converter T3+, (b) differentially connected inductor tap converter T3-, (c) diode connected,
cumulative inductor tap converter S3, (d) diode connected, differentially inductor tap converter S3-,
and (e), (f), (g), and (h) positive rail reference versions of (a), (b), (c), and (d).
Chapter 20 Advanced dc-dc smps 878

Different viable seeding topologies（those shown in figure 20.17）can generate other sequences of
different viable converter topologies, by repeated flipping (output becomes the second output port) and
inverse operations (interchange the input and output ports), eventually cycling back to the original
topology as shown in Table 20.7. The two flip/inverse sequencing processes are summarized
mathematically as follows:

i. The flipped transfer function is unity minus the transfer function.

ii The transfer function for inverse operation can also be defined mathematically. The inverse
transfer function is derived by interchanging δ and δ’, then invert the function. Interchanging the on-
state and off-state duty cycles reflects the switch and diode interchange, while inverting reflects the
reversing of the input and output ports of the converter (that is Vo /Ei becomes Ei /Vo). This
mathematical transformation is applicable to inductor tapped circuits, provided the tap connected
element is an internal canonical cell component, specifically the diode or the switch. The canonical
cell derivation assumes a Tee cell arrangement. The inductor tap connected to an external cell dc
voltage bias (not the common input to output reference, 0V) inhibits internal cell element rotation,
and this restriction is accounted for by interchanging N and N’, in addition to δ and δ’, before
inverting the function to give the inverse transfer function. The inversion process is not necessarily
commutative if asymptotes exist in the transfer function.

The significance of these two sequencing processes is that topologies and transfer functions can be
determined mathematically without recourse to circuit analysis.

Flipping a topology may results in a configuration requiring interchange of D and S, whence δ and δ’ are
also interchanged (effectively necessitating two switch/diode pairs, which guarantees CCM). Such
interchanging of the switch and diode in any sequence is always avoided if a pair of bidirectional switches
are employed.
The columns in figure 20.18 shows numerous inductor tapped topologies and their vertical sequence
flip/inverse order, while Table 20.7 shows the corresponding voltage transfer functions (assuming ideal
components) and the associated sequence order, for five sequence groups. All previous publications
have assumed the tapped inductor is cumulatively winding connected which gives two major classes of
topologies (viz., columns headed Scum and Tcum in figure 20.18). Here topologies are incorporated into a
general matrix of topologies and transfer functions, with two mirroring classes when the tapped inductor
windings are differentially connected (viz., columns Sdiff and Tdiff in figure 20.18).

The critical load resistance, defining the CCM-DCM boundary, for each of the three T diff (and five Tcum)
topologies, in terms of the voltage transfer function, TF, is given by the unified equation:
2
N ' 2L 1 L n2  N 
Ro crit  TFv   where 1  12   (6)
N  ' L2 n2  N ' 

Analysis assumes a losses circuit, where the output power is equal to the input power, EiIi=voIo, whence
impedance transfers in the ratio of the voltage transfer function TF, squared, Ro= Ri×TF2. The critical load
resistance, defining the CCM-DCM boundary, for each of the Sdiff (and the six Scum) topologies, in terms
of the voltage transfer function, TF, is given by
2
1 2L 1 L1 n12  N 
Ro crit  TFv   where   (7)
N  ' L2 n22  N ' 

Because some transfer functions have asymptotes, switch diode pairs, or even a pair of bidirectional
(ideal) switches are needed if the full duty cycle range is to be exploited. Such topologies (requiring more
than one diode and one switch) are shown in Table 20.8.
879 Power Electronics

Figure 20.18. Tapped inductor converters.

 Chapter 20 Advanced dc-dc smps 880

Table 20.7: Voltage transfer functions of converters, including inductor tapped converters.

Sequence A Sequence Sdiff Sequence Scum/Sdiff Sequence Tdiff Sequence Tcum

Basic Switch/Diode tap Switch/Diode tap i/o & 0V tap i/o & 0V tap
(no tap) G sequence TF N = -1 A sequence, N = 1 A sequence TF, N = ½ G sequence TF, N=½
flip  ' N  N  ' N '  δ↔δ’
boost  D↔S
N N '
flip
S4b- (G2/4) boost T2b+
1>δ>1/(1-N) input tap (G4/2)

inverse
inverse
N ' N '
buck 
 N ' N  ' N ' 
S5b- (G1/3) buck T1b+
0<δ<N/(N-1) flip output tap (G3/1)
δ↔δ’
flip

flip
  D↔S N ' N '
flip  flip 
D↔S  N '  N ' N  ' N '  D↔S N  ' N ' 
S1- (G1/3) buck S1± buck T1- buck T1+
inverse

buck A1

inverse

inverse
inverse

inverse
0<δ<N/(N-1) switch tap (A1) (A1) output tap (G1/3)
1 N   ' N   ' N  ' N '  N  ' N ' 
1 ' '  'N  'N
S2- (G2/4) boost S2± boost T2- boost T2+
boost A2
1>δ>1/(1-N) diode tap (A2) (A2) input tap (G4/2)

flip
flip

flip

flip
flip

    N'  N'
  N  N   
1 1 1 1 N 1 N
inverse inverse inverse
buck-boost S3- buck-boost S3± buck-boost T3- buck-boost T3+
inverse

inverse

buck-boost A3
(G5/6) 1>δ>0 diode tap (A3) (A3) ground tap (G5/6)
 1  1  N  N
     
1 N 1 N 1 N ' 1 N'
buck-boost S3b- buck-boost S3b± buck-boost T3p- buck-boost T3p+
(G6/5) 1>δ>0 switch tap (A3) ground tap ground tap
flip

flip

differential coupling  N '  N '

n1  'N  'N
N  cumulative coupling
n1  n 2 S4- (G4/2) boost S4±
n1
inverse
inverse

1>δ>N/(N-1) switch tap (A2)

N 
N N n1  n 2
n1  n 2
 N   ' N   '
N 0 differential coupling
S5- (G3/1) buck S5±
diode tap (A1) δ↔δ’ n1
0<δ<1/(1-N)
N 
flip

' D↔S n1  n 2
buck 
N  ' flip
n1  n 2

inverse

S1b- (G3/1)
0<δ<1/(1-N) N 0
N  ' 
boost 

flip S2b- (G2/4)
1>δ>N/(N-1)
subscript p denotes diode/switch antiparallel connect pairs subscript d denotes bidirectional conducting and blocking switches
 881 Power Electronics

Table 20.8: Topology constraints and simplifications

number of Switch/diode Bidirectional δasym

turns Degenerate
sequence topologies pairs switches asymptote
restriction sequence
min/max p b (1 switch 1 diode)
not
A 3/3 A1, A2, A3 - none not applicable
applicable
T1+/T1b+ <N, >N 0<N<1 N = ½, n1 = n2 
Tcum 3/6 T2+/T2p+ none N≠1: n2≠0 G sequence
T3+/T3p+ none N≠0: n1≠0 not G topology
T1- none 0<N<1 N = ½, n1 = n2 
Tdiff 3/3 T2- 0 none n2 and/or n2 A sequence
T3- none ≠0 not A topology
S1± none
S2± none cum and diff N = 1, n2 = 0 
Scum 5/5 S3±/S3p± 0 none N>0 A sequence
S4± none A topology
S5± none
S1-/S1b- δ<N/(N-1), δ<1/(N-1) N = -1, n1 /n2 =½ 
S2-/S2p- δ>1/(N-1), δ>N/(N-1) diff G sequence
Sdiff 5/10 S3-/S3p- none N<0 N = 1, n2 = 0 
S4-/S4p- δ>N/(N-1), δ>1/(N-1) n1≠n2 A sequence
S5-/S5b- δ<1/(N-1), δ<N/(N-1) A topology

The transformer coupled topologies (namely Cuk, sepic and zeta topologies) in Table 20.6 can also be
tapped inductor connected, with capacitor and winding possibilities as shown in Table 20.9. A myriad of
topologies and transfer functions are generated by performing sequential flipping/inversion operations,
when the windings are cumulatively and differentially connected.

Table 20.9: Other tapped inductor configurations

converter Independent C Independent C Series i/p C Series o/p C

Cs Cs

Cp Cs Ns Ns Ns
Cp Cp
Step up Vy Vy Vy
Vx Np Ns Vy Np Np
Vx Np Vx Vx
Cs Cp

average dc voltage Vx Vy Vx Vy Vx Vy Vx Vy
C5 Cuk Ei -Vo Ei -Vo Ei -Vo Ei -Vo
G6 zeta 0 +Vo 0 +Vo 0 +Vo 0 +Vo
G5 sepic Ei 0 Ei 0 Ei 0 Ei 0
P5 new 0 0 0 0 0 0 0 0
Capacitor dc offset bias VCp VCs VCp VCs VCp VCs VCp VCs
C5 Cuk Ei -Vo Ei -Vo Ei+Vo -Vo Ei -Vo-Ei
G6 zeta 0 Vo 0 Vo Ei Vo 0 Vo
G5 sepic Ei 0 Ei 0 Ei 0 Ei Ei
P5 new 0 0 0 0 0 0 0 0
Cp Cp

Cp Cs Ns Ns Ns
Cs Cs
Step down Vx Vx Vx
Vx Np Ns Vy Np Np
Np Vy Cs
Vy
Cp
Vy
Chapter 20 Advanced dc-dc smps 882

20.10i Reversible tapped inductor smps

The twenty-four tapped inductor converters in figure 20.18 are reversible if two switch/diode pairs are
employed, as shown in the buck-boost bidirectional converters (BDCs) on the left in figure 20.19. The
switch/diode combination need not be parallel connected, as in the circuits on the right. Generally, either
or both diode/switch pairs can be separated, although some of the generated topologies may require the
use of RBIGBTs and/or SCRs.

differentially-connected coupled-circuit buck-boost BDCs, Sdiff

forward inverse: buck-boost inverse: buck-boost
buck-boost switch/diode pairs 2 switches + 2 diodes
DR DF TF TR
n2 S3p- S3-
S3-  switch tap + n2 + diode tap
diode N n1 n1
1 + +  1 Ei Vo 
tap TF TR  DR DF N
Ei Vo 1 N 1
⇄ S3p- ⇄ S3-
+
S3- → S3-
+
← S3p- S3- ← S3-
DR DF DR DF
n2 S3- S3p-
S3p-  1 diode tap switch tap
 n1 + TF TnR2 +
switch + +  n1  1
1 N Ei

tap TF TR  N Vo
Ei Vo 1 + 1 N
S3p- → S3p-
+
⇄ S3- ← S3- S3p- ⇄ S3p- ← S3p-
n1<n2 N=n1 /n1-n2 N<0

Figure 20.19. Switch/diode connected, differentially-formed tap, S2/S4 buck-boost BDCs.

A feature of splitting the diode/switch pair is the generation of unusual forward and reverse transfer
function pairs. Consider the bottom right bidirectional buck converter in figure 20.19. The input and output
voltage polarity is the same, with respect to the zero reference. Also the voltage transfer function is the
same in both directions, namely
 1
 (20.8)
1 N

20.10ii Coupled circuit leakage inductance

Magnetically coupled circuits, in single ended topologies suffer from stress energy associated with
leakage inductance. Release of leakage energy usually manifests itself as an over voltage on
semiconductor devices. At lower power, dissipative clamping circuits may be effective and viable. An
alternative is to use an asymmetrical bridge configuration.
The diode-tap buck converter S5± in figure 20.18 is shown in figure 20.20a, where leakage energy
stresses the switch S at switch turn-off. A convention clamp is ineffective because at switch turn-off,
theoretically the switch experiences the supply voltage Ei plus the voltage induce across n2 because of
conditions on n1, Vo n2 /n1. The leakage energy creates of voltage in excess of Ei + Vo n2 /n1. Thus
clamping the stressed device to the voltage rail Ei would undesirably load the coupled circuit winding n2.

n2 n1 S
S n2 n1
D
Ei a
Ei
D C + a
R Vo D C +
R Vo
b
b
D
(a) (b)
S

Figure 20.20. Tapped inductor buck converter S5±: (a) basic topology and (b) asymmetrical bridge
input stage to clamp leakage energy release voltage.
883 Power Electronics

In the asymmetrical bridge in figure 20.20b, the topology is energised through the two bridge switches,
then leakage energy reset occurs through the two bridge diodes, back into the dc rail. The voltage
releasing the leakage energy is Ei - Vo n2 /n1, while the two switch off-state voltages are constrained to
within dc voltage rails. The two switches must be both on or both off, simultaneously. Phase shifting leg
signals by 180° to reduce the switching losses is not possible. In creating alternating 0V loops, the
winding n2 induced voltage Vo n2 /n1 would be short circuited. The penalties incurred are two additional
diodes, one switch and its gate drive, plus the input and output voltage no longer share a common dc
reference. The asymmetrical bridge arrangement caters for converter reverse operation, with the output
(former input) being sourced through the two bridge diodes.

20.11 HV referenced dc to dc converter

Derivation of low voltage dc supplies from sources greater than a hundred volts can be inefficient,
particularly at over 1kV. The extremely low duty cycle requirement implies the need of transformer
matching. At 10kV, as with submarine cables, a Zener diode plus resistor approach offers low efficiency,
below 1%, so such an approach is limited to a start-up function. The availability of a normally-on SiC
1200V 45mΩ JFET means series smps circuits, based on current source topologies can be employed as
shown in figure 20.21. In a default mode current is conducted by the normally on JFET. By turning off
JFET T, current is diverted to the bulk storage capacitor C, which is maintained charged in a burst mode.
Start-up energy is sourced by the Zener diode-resistor across the high voltage supply, which is
deactivated once C has charged. The deactivation function is achieved with a normally-closed contact of
a high voltage relay (see Chapter 33, Table 33.14 for a 70kV, 10A dc relay).

T HV

0V
I
Gate drive
D ±6V

f/b PWM 5V
controller

+ C

10V
SMPS SMPS
±6V +5V
0V
nc
+5V -5V

-6V +6V

Figure 20.21. HV referenced low-voltage dc to dc converter.

20.12 Current sourced dc to dc converters

Three multiple switch current sourced converters are shown in figure 20.22. Such multiple switch current
sourced dc to dc voltage converters are characterised by switch overlap operation, so as to always
provide a current path for the current source.
Chapter 20 Advanced dc-dc smps 884

Table 20.10 Current source dc to dc converter characteristics

Current source TF semiconductor
i/p & o/p
converter inductance utilisation factor
capacitance
boost Vout I in
  vCinCin  QCin iL1 Li  vLi t Prated
uf 
Text figure Ein I out
vCinCout  iCout t Δ is p-p Vmax I rms
∀Si
number
Half bridge
1 iL1  2  1
L1=L2 N 
1  
1:N 2    1  2 
 ½ I out   ½ 
Fig 20.22b
Full bridge
Ein
1:N
1 2   1
Fig 20.22c N iL1
1  2 2 2     2   1 
Push pull I out
 ½
1:1:N

Fig 20.22a

1 : 1 : N

Ein

(a)

1:N

Ein

(b)

1:N
Ein

(c)

Figure 20.22. Isolated multi switch, current sourced dc to dc converters:

(a) push-pull, (b) half-bridge, and (c) full-bridge.
885 Power Electronics

20.13 Analysis of non-continuous inductor current operation

Operation with constant input voltage, Ei

In applications were the input voltage Ei is fixed, as with rectifier ac voltage input circuits and battery
supplies, the output voltage vo can be controlled by varying the duty cycle.
In the continuous inductor conduction region, the transfer function for the three basic converters is
determined solely in terms of the on-state duty cycle, δ. Operation in the discontinuous inductor current
region, for a constant input voltage, can be characterised for each converter in terms of duty cycle and
the normalised output or input current, as shown in figure 20.27. Region and boundary equations, for a
constant input voltage Ei, are summarised in tables 20.11 and 20.12.

Operation with constant output voltage, vo

In applications were the output voltage vo is fixed, as required with regulated dc power supplies, the
effects of varying input voltage Ei can be controlled and compensated by varying the duty cycle.
In the inductor continuous current conduction region, the transfer function is determined solely in terms of
the on-state duty cycle, δ. Operation in the discontinuous region, for a constant output voltage, can be
characterised in terms of duty cycle and the normalised output or input current, as shown in figure 20.28.
Region and boundary equations, for a constant output voltage vo, are summarised in tables 20.13 and
20.14.
Because of the invariance of power, the output current I o characteristics for each converter with a
constant input voltage Ei , shown in figure 20.24, are the same as those for the input current I i when the
output voltage vo is maintained constant, as shown in figure 20.28. [That is, the right hand side of each
plot in figures 20.27 and 20.28 (or figures 20.23 and 20.24) are the same.]
Generalised characteristics, with operating condition k (=Rτ/L), for the three basic converters, are
summarised in Table 20.15. The associated monographs in figures 20.30, 20.31, and 20.32, with a
specific load condition, k, for each converter, yield the inductor current waveforms for any on-state duty
cycle δ. The three graphs illustrate operational boundaries between continuous inductor current at high δ
and discontinuous inductor current at lower δ.

The graphs for the boost converter in figure 20.31 highlight a little appreciated feature that, if k > 13½,
then discontinuous inductor current having appeared, disappears at lower and higher duty cycles.
Specifically, continuous inductor current occurs for low duty cycles, where the same theoretical equation
is interpreted to the contrary. That is, from Table 19.2, the roots of
2
 1    
2
(20.9)
k
are not interpreted correctly. The correct interpretation of δ and k (= Rτ/L) gives:

 for k < 13½, discontinuous inductor current never occurs, independent of δ (equation
(20.9) has two imaginary roots)
 for k = 13½, discontinuous inductor current occurs at only δ = ⅓ (equation (20.9) has
three roots, two of which are coincident at δ = ⅓)
 for k > 13½, discontinuous inductor current occurs for δ around ⅓ as given by the two (of
the three) real roots of equation (20.9) associated with the local minimum turning point of
the cubic equation (20.9).
 Chapter 20 Advanced dc-dc smps 886

Io  4 1   
1
step-down vo /Ei
Io buck 4
5
0.8
vo
 
vo 3
5 Ei
0.6
Io Ei
δ  ½  1,½
vo 2

0.4 Io 1
5

Ei
discontinuous continuous
0.2
1
5

Io /Io
0
0 0.2 0.4 0.6 0.8 1.0

1
Io  4 1    step-up
Io boost 5 vo
0.8 1
Ei
 
vo
0.6
2½ Ei
δ v
Io  1,½
 ½   o  1
I o  Ei 
0.4
123
discontinuous continuous
0.2
1¼
Io /Io
0
0 0.2 0.4 0.6 0.8 1.0
1
step-up/down
Io  4 1    buck-boost vo
0.8 Io -4
Ei
 
vo
0.6 1
Ei
δ Io vo -1½
 ½  1,½
0.4 Io Ei
- 23
discontinuous continuous
0.2
-¼
Io /Io
0
0 0.2 0.4 0.6 0.8 1.0

Figure 20.23. Characteristics for three dc-dc converters with respect to I o ,

when the input voltage Ei is held constant. See Table 20.11.
887 Power Electronics

Table 20.11: Transfer functions with constant input voltage, Ei, with respect to I o

converter
Ei
constant step-down step-up step-up/down
(buck) (boost) (buck-boost)
reference equation (19.4) (19.50) (19.80)

vo vo 1 vo 
  
Ei Ei 1   Ei 1  
continuous inductor vo vo
current conduction 1
v Ei Ei
(and change of variable)   o    
Ei vo vo
1
Ei Ei

reference equation (19.21) (19.65) (19.96)

vo 1
discontinuous inductor  vo  2E i  vo  2E i 
Ei 1 
1  22LI o
current conduction
Ei 2LI o Ei 2LI o
 E i

normalised
vo vo 1
  vo vo
Ei I
 1  4 2 / o
I
  4 2 / o
Ei 1
1  Io Ei Ei
where 4 2  Io Io
 E i Io
Io 
8L

 vo vo vo
I o  I o  1pu @ δ = ½; ½ δ = ½; 2 δ = ½;  1
Ei Ei Ei
 vo 
1   I o  4 2  1 I o  4 2  1
change of variable
Io  Io Ei 
 4  
2 
vo
1

vo
 
vo Io Io
Io Io Ei Ei
Ei
change of variable
δ= vo
v  v
  ½ Io 
Ei   ½ Io   o  1    ½ Io  o
all with a boundary
v E Ei
  ½  ½ 1  I o Io 1 o Io  i  Io
Ei
Io

conduction boundary I o  4  v o 1  v o  v o  vo
    1

Ei  Ei  Io E I o  4  Ei
Io 
 4 i 2  2

Io v o  Io  vo 
 1  
  ½  ½ 1  I o  
Ei   Ei 
Io  4 1     4 1   
 4 1   
 Chapter 20 Advanced dc-dc smps 888

1 buck
Ii  4
27  1     2 step-down vo /Ei
Ii 4
5
0.8 vo
Ii  
1, 2 3 3
Ei
5
0.6 Ii
  4
×
δ vo
27
discontinuous continuous
1 2
5
0.4 Ei

0.2
1
5

Ii /Ii
0
0 0.2 0.4 0.6 0.8 1.0

1 step-up
vo Ii   boost vo
1 + 1
Ii Ei Ii 5 Ei
0.8     
vo vo
Ii
Ei Ei
0.6
2½
δ discontinuous continuous
0.4
123

0.2
1¼
Ii /Ii
0
0 0.2 0.4 0.6 0.8 1.0

buck-boost
1 Ii vo
step-up/down  2
Ii Ei
-4  
0.8
Ii vo
  1
Ei
Ii
0.6
discontinuous continuous -1½
δ
0.4
- 23

0.2
-¼
Ii /Ii
0
0 0.2 0.4 0.6 0.8 1.0

Figure 20.24. Characteristics for three dc-dc converters with respect to I i ,

when the input voltage Ei is held constant. See Table 20.12.
889 Power Electronics

Table 20.12: Transfer functions with constant input voltage, Ei, with respect to I i

converter
Ei
constant step-down step-up step-up/down
(buck) (boost) (buck-boost)
reference equation (19.4) (19.50) (19.80)
vo vo 1 vo 
  . 
Ei Ei 1   Ei 1  
continuous inductor vo vo
current conduction 1
vo E Ei
(and change of variable)     i  
Ei vo vo
1
Ei Ei

reference equation (19.20) (19.66) (19.96)

vo 1
vo 2LI  v o v o 2
discontinuous inductor 1 2 i Ei E  2 
current conduction Ei  E i 1 i Ei 2LI i
2LI i
vo 1
vo 4 I  1  2 /
Ii
1  i Ei   
normalised Ei 27 2
Ii 1   /  I i
2
 Ii
 
I i 
vo where
 where where
Ei 
4 E i E i
Ii   

27 2L
 E Ii 
Ii  i 2L
2L
 vo 2 vo vo
I i  I i  1pu @ δ = ⅔;  3 δ = 1;  δ = 1;  
Ei Ei Ei

change of variable
vo
Ii  I i  27  2  1  v o  Ii   2  Ei Ii  2
 4   

Ii  Ei  
v o  Ii
Ii Ii   1
E
 i 
vo
change of variable Ii 1 1
  4
27    I E   Ii
v   i  i 
δ= I i 1 o vo Ii
Ei Ii
Ei
2
2
v o   vo 
I i  27   1  v o   v o    1  
 4    E
Ii   i  Ii   Ei 
conduction boundary Ii  Ei Ei 

vo 
v
Ii I i  o  1 
Ei  Ei 
 27
4
2
1      2
I i  27  2 1     I i Ii
conduction boundary  4     
Ii Ii Ii
 Chapter 20 Advanced dc-dc smps 890

1 Io 1 step-down vo /Ei

Io buck 4
5
0.8 vo
 
3 Ei
5
0.6
Io
δ 2

0.4 vo Io
5

 
Ei vo
1
Ei discontinuous continuous
0.2
1
5

Io /Io
0
0 0.2 0.4 0.6 0.8 1.0
1
step-up vo
Io ×  1   
2
 4
27 boost 5 1
0.8 Io Ei
 
vo
0.6 Ei
2½
δ Io  vo vo
0.4
  4
× 1  
Ei  Ei
27

Io  1 23
1, 1
3
discontinuous continuous
0.2
1¼
Io /Io
0
0 0.2 0.4 0.6 0.8 1.0

1
buck-boost
step-up/down vo
Io  1   
2
-4
0.8 Ei
Io  
vo
1
0.6 Ei
δ -1½

0.4 vo Io
  - 23
Ei Io discontinuous continuous
0.2
-¼
Io /Io
0
0 0.2 0.4 0.6 0.8 1.0

Figure 20.25. Characteristics for three dc-dc converters with respect to I o ,

when the output voltage vo is held constant. See Table 20.13.
891 Power Electronics

Table 20.13: Transfer functions with constant output voltage, vo, with respect to I o

converter
vo
constant step-down step-up step-up/down
(buck) (boost) (buck-boost)
reference equation (19.4) (19.50) (19.80)

vo vo 1 vo 
  
Ei Ei 1   Ei 1  
continuous inductor vo vo
current conduction 1
vo E Ei
(and change of variable)     i  
Ei vo vo
1
Ei Ei

reference equation (19.20) (19.66) (19.96)

vo 1
discontinuous inductor vo 2LI  v o v o 2
current conduction 1 2 i Ei E  2 
Ei  E i 1 i Ei 2LI i
2LI i
2
vo 1 I v  v 1
1  o   o  o   v 
Ei 4 2
E E  2
 vo   2 I
/  o  o 
normalised I o  i  i 1  27  2 /  I o   v o   E i  Ei 
4   Io 
 E 
vo Io  i  

Ei where where
where v o
 v  
Io  o 
4 v o Io 
2L Io   2L
27 2L
 vo vo vo
I o  I o  1pu @ δ = 0; 0 δ = ⅓;  1½ δ = 0; 0
Ei Ei Ei
 vo 
change of variable 1   I o  27  2  1 Io   2  1
Io Ei 
Io   2   4  2

v o vo v o 


v o 
2
Io   1 Io  
Io Io   E
 i  Ei Ei 
Ei 
vo Io  1 v o v
 Io  
change of variable
    4  1 o vo Io
 v  
Ei Ei  Ei
27
δ= Io 1 o Io Ei 
Ei Io

Io  1  vo v o  Io  1
  1 2

Ei Io E 
 vo 
Io 
 27 4   i 3  Io  1  
conduction boundary Io v o   Ei 
 
Ei 
 27 4  1     1   
2 2
1

  1  I o I o  27  1   2
conduction boundary  4     1  Io
Io Io Io
 Chapter 20 Advanced dc-dc smps 892

Ii  4 1   
1
step-down vo /Ei
Ii buck 4
5
0.8 vo
 
vo 3
Ei
5
0.6
Ii Ei
δ  ½  1,½
vo 2

0.4 Ii 1 5

Ei
discontinuous continuous
0.2
1
5

Ii /Ii
0
0 0.2 0.4 0.6 0.8 1.0
1
Ii  4 1    step-up vo
Ii boost 5 1
0.8 Ei
 
vo
0.6 Ei
v 
Ii 2½
δ  ½   o  1
I i  Ei
1,½
0.4 
123
discontinuous continuous
0.2
1¼
Ii /Ii
0
0 0.2 0.4 0.6 0.8 1.0

1 buck-boost
Ii  4 1   
vo
step-up/down
0.8 Ii -4 Ei
 
vo
1
0.6 Ei
δ Ii vo -1½
 ½  1,½
0.4 Ii Ei
- 23
discontinuous continuous
0.2
-¼
Ii /Ii
0
0 0.2 0.4 0.6 0.8 1.0

Figure 20.26. Characteristics for three dc-dc converters with respect to I i ,

when the output voltage vo is held constant. See Table 20.14.
893 Power Electronics

Table 20.14: Transfer functions with constant input voltage, vo, with respect to I i

converter
vo
constant step-down step-up step-up/down
(buck) (boost) (buck-boost)
reference equation (19.4) (19.50) (19.80)

vo vo 1 vo 
  
Ei Ei 1   Ei 1  
continuous inductor vo vo
current conduction 1
v Ei Ei
(and change of variable)   o    
Ei vo vo
1
Ei Ei

reference equation (19.21) (19.65) (19.96)

vo 1
discontinuous inductor  vo  2v o vo  2v o
Ei 1 
1  22LI i
current conduction
Ei 2LI i Ei 2LI i
 v o

normalised
vo vo 1
  vo I vo I
Ei Ei 1  1  4 2 /  i   4 2 /  i
1  Ii Ei Ei
where 4 2  Ii Ii
Ii
 v o
Ii 
8L
 vo vo vo
I i  I i  1pu @ δ = ½; ½ δ = ½; 2 δ = ½;  1
Ei Ei Ei

change of variable  vo 
1   I i  4 2  1 I i  4 2  1
Ii  I i  4 2   Ei  
vo 
vo
 
vo Ii 1 Ii
Ii Ii Ei Ei
Ei
change of variable
δ= vo
v  v
  ½ I i 
Ei   ½ I i   o  1    ½ I i  o
all with a boundary
vo E Ei
  ½  ½ 1  I o Ii 1 E Ii  i  Ii
Io i

conduction boundary I i  4 v o 1  v o  v o  vo
    1

Ei  Ei  Ii  4   Ei  I i  4  Ei
Ii  2  2

Ii  v  Ii  vo 
o
1  
  ½  ½ 1  I o  
E
 i   Ei 
Io  4 1     4 1     4 1   
 Chapter 20 Advanced dc-dc smps 894

 
1
vo
δ2 0
Ei vo
4 1
Ei
vo

 
1 0
2
Ei vo
vo Ei
Ei
v

2

4 2
o

E i
δ=½ δ=½
vo
1
v 2
o
1 Ei
boost E
vo 1 i
vo 1
 
Ei 1 Ei 1

δ=¼ δ=¼
discontinuous

2
 vo  vo 
4 1  E  E 
27
δ=0 1 δ=0
δ=1  i  i  δ=1

δ=¾ δ=¾

vo

 
buck  v 
δ=½ 2 v 4 2 1 o  Ei δ=½
4 1
27 o  Ei 
½
vo E vo
δ=¼
 i
Ei
δ=¼
Ei discontinuous
v  
v
δ=0 4 o E 1 o E  δ=0
i i
 

1 0
I i / Ii 1 Io / Io

δ=¼ δ=¼
-½

v  
o
 v o

E i 1 E i 1
-1  4 2

δ=½ vo δ=½
Ei
buck-boost
continuous

2 discontinuous
 vo  4
vo
 Ei  Ei
 
 
2
v vo
1
 o E 1  -2
Ei
 i  

Ei constant I i / Ii Ei constant

 0
2
1 0

Figure 20.27. Characteristics for three dc-dc converters, when the input voltage Ei is held constant.
 895 Power Electronics

 
vo
 
0 0
vo
27 vo Ei 4 1
4 1 Ei
Ei
 
2
0 vo
3
vo Ei
Ei

4 2
boost vo
δ=½
1 δ=½
Ei
2
discontinuous
vo 1 1
 vo

Ei 1 Ei 1

27 2

 
δ=¼ δ=¼
v v
o
1 o

E i
E i

δ=0 1 δ=0
δ=1 δ=1
vo
δ=¾
 δ=¾
Ei
vo
buck δ=½
1  v
4 2 1 o

Ei  δ=½
Ei ½

vo
Ei
vo
δ=¼ Ei    v
 2 1 o E 
 δ=¼
 i
2 v  
 vo  4 oE 1vo 
 E  Ei 
δ=0  i
i  δ=0



1
2
0
Io / I 1

 
o 2
I i / Ii
v o

E i

δ=¼ δ=¼
-½


v  v o

o
 E i 1
E i 1
-1 4 2
δ=½ vo δ=½
Ei
buck-boost

continuous vo
4
Ei
1
 
discontinuous 2
vo
1

 
2 Ei
vo
1 -2
Ei

vo
- 0 0
vo constant 0 Ei vo constant

Figure 20.28. Characteristics for three dc-dc converters, when the output voltage vo is held constant.
 Table 20.15: Converter parameters for discontinuous and continuous inductor conduction regions and boundaries
Converter
R t Forward (buck) Flyback (boost) Flyback (buck-boost)
k  ;0   T 1
L  step-down step-up step-up/down
discontinuous continuous discontinuous Continuous discontinuous continuous

2 2 2 2
critical k    1  1 k  27  1  1
k k 2 k k
2 v 2
k  27
k   o 2 2 2 2 2
k  k   1    2 k  k 
 1    E i k 2 2
1 1 1    1   
vo I R  8 
k ,    i  I o  ¼k  2  1  1   1 
Ei E  ½ 1  1  2k  2   ½k
Io i  k  2    1 1

vo
1 1 1
t Ei  
D  D  1 vo 1 vo 1
 vo 1
Ei Ei
Ei
vo vo
t 1 1
x  x 1  Ei Ei
 vo 0 1-  0 1  0
vo vo
 1     D  Ei 1
Ei Ei
  v
R R  vo  vo 1 1 v
IL , IL  k  1  ,0  ½k  1    k,0  o  ½k  k,0  o  ½k 
Ei Ei  E i  Ei 1   Ei 1   Ei
R vo
IL  vo vo
Ei 1 1
Ei vo Ei 1 v Ei 1 v
 ½k  2  ½k  2   o ½k  2   o
  vo Ei vo 1   Ei vo 1   Ei
I L = ½  i L  i L     D  1
  Ei Ei Ei
t
t tT   / k D t
t tT  ½  t
t tT  t
t tT  t
t tT  t
t tT 
2
 2 2 v  1  1
 1 k   o  1  1    1
 vo  k 1   Ei  vo  k  k 
Ic  0  t  Ei   E 
  D 1  if k  2 then  i 2 v
 k  t   1 
D
 k   o
i L   t     D   I o t  D  1   v   k  1   Ei
tT t  k
t
tT t   ½ 1      t
tT t  = ½ 1 -    o  
Ei /k   vo
t = ½ 1 -   
tT t 
Ei
tT  t   /k
tT  t   tT  t   tT  t  
 Vo/V1

δ=1

δ = 0.8 Vo

δ = 0.6

Io

δ = 0.4

δ = 0.2

δ=0

Figure 20.29. Voltage transfer characteristics for the dc-dc converter output reversible,
in terms of the output current Io.
 Chapter 20 Advanced switched-mode dc-dc power supplies 898

1.2


i L  1.12

1.0

I L  0.85
0.8
inductor current IL

δ = 0.85


iL 
0.6 i L  0.6
time

i L  0.49
iL
IL

iL
iL 
iL
0.2 I L  0.19

δ = 0.15 δ = 0.85 δ = 0.15

0 0.2 0.4 0.6 0.8 1 0 0 0.2 0.4 0.6 0.8 1 time

  tT   tT D  t D x  t x
   
1

δ=
0.85
0.8 
 D
 0.64

0.6

δcrit =
δ ½
on

0.4
i
at
sl
an
tr

0.2
δ=
  0.64
D 0.15
vo 
vo x
E i  0.19 E i  0.85
 0.21
0
0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1
vo
  tT D  t D x  t x
Ei   

Figure 20.30. Step-down (buck) converter normalised performance monogram for k = 4, giving
discontinuous inductor conduction for δcrit ≤ ½. Inductor time domain current waveforms for
δcont = 0.85 (continuous inductor current) and δdis = 0.15 (discontinuous inductor current).
 899 Power Electronics

16

i L  15.31

14

12

iL
iL
inductor current IL


iL

iL
I L  8.16

8

i L  6.6 δ = 0.65


IL iL
4
I L  2.6


δ = 0.3 δ= i L  1.01
0.65 δ = 0.3 time
2

0 ¼ ½ ¾ 1 0 ¼ ½ ¾ 1 time

  tT   tT D  t D x  t x
   
10

1
1 0.8
δIc=0 = 0.7
δ=

D 0.65
δcrit =
0.6  0.64
0.62

0.4   0.49  δ=
D x
0.3
n
io

¼, 0.78  0.21
at
sl

vo
E i  1.61
an

δcrit =
tr

1 0.2 0.12
1

0 1 2 3 4 0 ¼ ½ ¾ 1
vo
  tT D  t D x  t x
0

Ei   
Figure 20.31. Step-up (boost) converter normalised performance monogram for k = 22,
giving discontinuous inductor current for 0.12 ≤ δcrit ≤ 0.62. Inductor time domain current waveforms
for δcont = 0.65 (continuous inductor current) and δdis = 0.3 (discontinuous inductor current).
Capacitor discharge in switch-off period when δ ≤ 0.7.
 Chapter 20 Advanced switched-mode dc-dc power supplies 900


i L  6.15
6

4
I L  3.75
inductor current IL

 
iL δ = 0.6
iL iL iL

iL

2 iL  2


IL i L  1.35
1 time

I L  0.75
δ = 0.25 δ = 0.6 δ = 0.25
0
0 ¼ ½ ¾ 1 0 ¼ ½ ¾ 1 time

  tT   tT D  t D x  t x
   
1

0.8

1
δIc=0 = 0.61 δ=
  0.4 0.6
0.6 D
n
io

δ
at
sl
an

0.4
tr

  0.5  δ=
D x
¼
0.2  0.25
vo vo
Ei  1.5
Ei

 0.5

0 1 2 3 4 0
0 ¼ ½ ¾ 1
vo
Ei   tT D  t D x  t x
  

Figure 20.32. Step-up/down (buck-boost) converter normalised performance monogram for k = 8,

giving discontinuous inductor current for δcrit ≤ ½. Inductor time domain current waveforms for δcont
= 0.6 (continuous inductor current) and δdis = ¼ (discontinuous inductor current).
Capacitor discharge in switch-off period when δ ≤ 0.61.
901 Power Electronics

Reading list

Fisher, M. J., Power Electronics,

PWS-Kent Publishing, 1991.

Hart, D.W., Introduction to Power Electronics,

Prentice-Hall, Inc, 1994.

Hnatek, E. R., Design of Switch Mode Power Supplies,

Van Nostrand Reinhold, 1981.

Mohan, N., Power Electronics, 3rd Edition,

Wiley International, 2003.

Thorborg, K., Power Electronics – in theory and practice,

Chartwell-Bratt, 1993.

[Link]
 Chapter 20 Advanced switched-mode dc-dc power supplies 902

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