ADDRESSING MODES 107
11. Register indirect addressing allows data to be addressed at the memory location pointed to
by either a base (BP and BX) or index register (DI and SI). In the 80386 and above,
extended registers EAX, EBX, ECX, EDX, EBP, EDI, and ESI are used to address memory
data.
12. Base-plus-index addressing often addresses data in an array. The memory address for this
mode is formed by adding a base register, index register, and the contents of a segment reg-
ister times 10H. In the 80386 and above, the base and index registers may be any 32-bit reg-
ister except EIP and ESP.
13. Register relative addressing uses a base or index register, plus a displacement to access
memory data.
14. Base relative-plus-index addressing is useful for addressing a two-dimensional memory
array. The address is formed by adding a base register, an index register, displacement, and
the contents of a segment register times 10H.
15. Scaled-index addressing is unique to the 80386 through the Core2. The second of two regis-
ters (index) is scaled by a factor of 2*, 4*, or 8* to access words, doublewords, or quad-
words in memory arrays. The MOV AX,[EBX+2*ECX ] and the MOV [4*ECX],EDX are
examples of scaled-index instructions.
16. Data structures are templates for storing arrays of data and are addressed by array name and
field. For example, array NUMBER and field TEN of array NUMBER is addressed as
[Link].
17. Direct program memory addressing is allowed with the JMP and CALL instructions to any
location in the memory system. With this addressing mode, the offset address and segment
address are stored with the instruction.
18. Relative program addressing allows a JMP or CALL instruction to branch forward or
backward in the current code segment by ;32K bytes. In the 80386 and above, the 32-bit
displacement allows a branch to any location in the current code segment by using a dis-
placement value of ;2G bytes. The 32-bit displacement can be used only in protected
mode.
19. Indirect program addressing allows the JMP or CALL instructions to address another por-
tion of the program or subroutine indirectly through a register or memory location.
20. The PUSH and POP instructions transfer a word between the stack and a register or mem-
ory location. A PUSH immediate instruction is available to place immediate data on the
stack. The PUSHA and POPA instructions transfer AX, CX, DX, BX, BP, SP, SI, and DI
between the stack and these registers. In the 80386 and above, the extended register and
extended flags can also be transferred between registers and the stack. A PUSHFD stores
the EFLAGS, whereas a PUSHF stores the FLAGS. POPA and PUSHA are not available
in the 64-bit mode.
3–5 QUESTIONS AND PROBLEMS
1. What do the following MOV instructions accomplish?
(a) MOV AX,BX
(b) MOV BX,AX
(c) MOV BL,CH
(d) MOV ESP,EBP
(e) MOV RAX,RCX
2. List the 8-bit registers that are used for register addressing.
108 CHAPTER 3
3. List the 16-bit registers that are used for register addressing.
4. List the 32-bit registers that are used for register addressing in the 80386 through the Core2
microprocessors.
5. List the 64-bit registers available to the 64-bit mode of the Pentium 4 and Core2.
6. List the 16-bit segment registers used with register addressing by MOV, PUSH, and POP.
7. What is wrong with the MOV BL,CX instruction?
8. What is wrong with the MOV DS,SS instruction?
9. Select an instruction for each of the following tasks:
(a) copy EBX into EDX
(b) copy BL into CL
(c) copy SI into BX
(d) copy DS into AX
(e) copy AL into AH
(f) copy R8 into R10
10. Select an instruction for each of the following tasks:
(a) move 12H into AL
(b) move 123AH into AX
(c) move 0CDH into CL
(d) move 1000H into RAX
(e) move 1200A2H into EBX
11. What special symbol is sometimes used to denote immediate data?
12. What is the purpose of the .MODEL TINY statement?
13. What assembly language directive indicates the start of the CODE segment?
14. What is a label?
15. The MOV instruction is placed in what field of a statement?
16. A label may begin with what characters?
17. What is the purpose of the .EXIT directive?
18. Does the .MODEL TINY statement cause a program to assemble as an execute (.EXE)
program?
19. What tasks does the .STARTUP directive accomplish in the small memory model?
20. What is a displacement? How does it determine the memory address in a MOV
DS:[2000H],AL instruction?
21. What do the symbols [ ] indicate?
22. Suppose that DS = 0200H, BX = 0300H, and DI = 400H. Determine the memory address
accessed by each of the following instructions, assuming real mode operation:
(a) MOV AL,[1234H]
(b) MOV EAX,[BX]
(c) MOV [DI],AL
23. What is wrong with a MOV [BX],[DI] instruction?
24. Choose an instruction that requires BYTE PTR.
25. Choose an instruction that requires WORD PTR.
26. Choose an instruction that requires DWORD PTR.
27. Select an instruction that requires QWORD PTR.
28. Explain the difference between the MOV BX,DATA instruction and the MOV BX,OFFSET
DATA instruction.
29. Suppose that DS = 1000H, SS = 2000H, BP = 1000H, and DI = 0100H. Determine the
memory address accessed by each of the following instructions, assuming real mode
operation:
(a) MOV AL,[BP+DI]
ADDRESSING MODES 109
(b) MOV CX,[DI]
(c) MOV EDX,[BP]
30. What, if anything, is wrong with a MOV AL,[BX][SI] instruction?
31. Suppose that DS = 1200H, BX = 0100H, and SI = 0250H. Determine the address accessed
by each of the following instructions, assuming real mode operation:
(a) MOV [100H],DL
(b) MOV [SI+100H],EAX
(c) MOV DL,[BX+100H]
32. Suppose that DS = 1100H, BX = 0200H, LIST = 0250H, and SI = 0500H. Determine
the address accessed by each of the following instructions, assuming real mode operation:
(a) MOV LIST[SI],EDX
(b) MOV CL,LIST[BX+SI]
(c) MOV CH,[BX+SI]
33. Suppose that DS = 1300H, SS = 1400H, BP = 1500H, and SI = 0100H. Determine the
address accessed by each of the following instructions, assuming real mode operation:
(a) MOV EAX,[BP+200H]
(b) MOV AL,[BP+SI-200H]
(c) MOV AL,[SI-0100H]
34. Which base register addresses data in the stack segment?
35. Suppose that EAX = 00001000H, EBX = 00002000H, and DS = 0010H. Determine the
addresses accessed by the following instructions, assuming real mode operation:
(a) MOV ECX,[EAX+EBX]
(b) MOV [EAX+2*EBX],CL
(c) MOV DH,[EBX+4*EAX+1000H]
36. Develop a data structure that has five fields of one word each named Fl, F2, F3, F4, and F5
with a structure name of FIELDS.
37. Show how field F3 of the data structure constructed in question 36 is addressed in a program.
38. What are the three program memory-addressing modes?
39. How many bytes of memory store a far direct jump instruction? What is stored in each of
the bytes?
40. What is the difference between an intersegment and intrasegment jump?
41. If a near jump uses a signed 16-bit displacement, how can it jump to any memory location
within the current code segment?
42. The 80386 and above use a ____________-bit displacement to jump to any location within
the 4G-byte code segment.
43. What is a far jump?
44. If a JMP instruction is stored at memory location 100H within the current code segment, it
cannot be a ____________ jump if it is jumping to memory location 200H within the current
code segment.
45. Show which JMP instruction assembles (short, near, or far) if the JMP THERE instruction is
stored at memory address 10000H and the address of THERE is:
(a) l0020H
(b) 11000H
(c) 0FFFEH
(d) 30000H
46. Form a JMP instruction that jumps to the address pointed to by the BX register.
47. Select a JMP instruction that jumps to the location stored in memory at the location TABLE.
Assume that it is a near JMP.
48. How many bytes are stored on the stack by a PUSH AX?
110 CHAPTER 3
49. Explain how the PUSH [DI] instruction functions.
50. What registers are placed on the stack by the PUSHA instruction? In what order?
51. What does the PUSHAD instruction accomplish?
52. Which instruction places the EFLAGS on the stack in the Pentium 4 microprocessor?
53. Is a PUSHA available in the 64-bit mode of the Pentium 4 or the Core2?