[2] TCS–305/TBD–305/TML–305/TEC–303
(j) Illustrate the term Rise time. (CO4)
Roll No. …………………..
(k) Illustrate Sequential Logic circuits. (CO3)
(l) Distinguish Synchronous counter and
Asynchronous counter. (CO3)
TCS–305/TBD–305/ Section—B
TML–305/TEC–303 (Short Answer Type Questions)
2. Attempt all questions. Each question carries 4 marks.
B. Tech. (CSE) (Third Semester) (a) Determine the following subtractions using 9’s
EXAMINATION, 2020-21 complement method : (CO1)
DIGITAL ELECTRONICS
(i) (24)10 – (18)10
Time : Three Hours
Maximum Marks : 60 (ii) (35)10 – (46)10
Note : Question paper has three Sections. Read carefully Or
instructions for each Section. Determine the following subtractions using 7’s
Section—A complement method :
(Very Short Answer Type Questions) (i) (73)8 – (46)8
1. Attempt all questions. Each question carries 1 mark. (ii) (341)8 – (426)8
(a) Explain Excess-3 Code. (CO1) (b) Solve the Boolean function using K-map
(b) Describe basic laws of Boolean Algebra. (CO1) method : (CO1)
(c) Convert (A23.4E)16 into Binary. (CO1) Y (A, B, C, D) = m (1, 3, 5, 8, 9, 11, 15)
(d) Determine 2’s complement of (1101)2. (CO1) + d (2, 13)
(e) Determine 8’s complement of (75)8. (CO1) Or
(f) Explain combinational logic circuits. (CO2) Solve the Boolean function using K-map
(g) Illustrate Read-only Memories. (CO5) method :
(h) Classify Logic Families. (CO4) Y (A, B, C, D) = m (1, 2, 3, 8, 9, 10, 11, 14)
(i) Illustrate the term Noise Margin. (CO4) + d (7, 15)
P. T. O.
[3] TCS–305/TBD–305/TML–305/TEC–303 [4] TCS–305/TBD–305/TML–305/TEC–303
(c) Design and implement a 1-bit Magnitude Or
Comparator using Logic Gates. (CO2) Design BCD to Excess-3 code converter using
Or Logic Gates.
Design a combinational logic circuit with four (b) Implement the following Boolean function using
input variables that will produce logic 1 output 8 ×1 multiplexer : (CO2)
when the No. of 1’s in the Input is even. Y (A, B, C, D) = m (0, 2, 3, 6, 8, 9, 12, 14)
Or
(d) Design Full Adder circuit using half adder circuit.
(CO2) Design 16 : 1 Multiplexer using 4 : 1 Multiplexer.
(c) Design a Mod-5 Synchronous Counter using T
Or
flip-flop. (CO3)
Design full subtractor circuit using half subtractor
Or
circuit.
Design J-K flip-flop using S-R flip-flop.
(e) Construct J-K flip-flop using NAND Latch. Also
write its characteristic equation. (CO3)
Or
Construct S-R flip-flop using NOR Latch. Also
write its characteristic equation.
(f) Explain NMOS NAND gate with a circuit
diagram. (CO4)
Or
Explain CMOS NOR gate with a circuit diagram.
Section—C
(Long Answer Type Questions)
3. Attempt all questions. Each question carries 8 marks.
(a) Design Binary to Gray Code converter using
logic gates. (CO2)
TCS–305/TBD–305/TML–305/TEC–303
P. T. O.