1.

INTRODUCTION

1.1 Introduction
Signature verification is a common behavioral biometric to identify human
beings for purposes of verifying their identity. Signatures are particularly useful for
identification of a particular person because each person’s signature is highly unique.
The basic idea is to investigate a signature verification technique which is not costly
to develop, is reliable even if the individual is under different emotions, user friendly
in terms of configuration, and robust against imposters.
Humans usually recognize each other based on their various characteristics
for ages. We recognize others by their face when we meet them and by their voice as
we speak to them. These characteristics are their identity. To achieve more reliable
verification or identification we should use something that really recognizes the
given person. A dynamic signature verification system gets its input from data
acquisition device like a digital tablet or other, dynamic input device. The signature
is then represented as time-varying signals. The verification system focuses on how
the signature is being written rather than how the signature was written. This
provides a better means to grasp the individuality of the writer.

In general online signature verification system has different phases. These

phases are treated as an individual processes. The general system diagram for
signature verification is as given below in Figure

Stored Template
Biometric
Systems

Feature Template
Pre-Processing Matcher
Extraction Generation

Application
Sensor
Device

Fig.1.1.1:Biometrics Authentication System

1
The Figure shows the process used for development of system. Input is taken from a
digitizer or such kind of device like webcam.

1.2 Objective of the project

The objective of the project is to develop such a system which will help to
verify the signatures using automatic verification method. Signatures are particularly
useful for identification of a particular person because each person’s signature is
highly unique, especially if the dynamic properties of the signature are considered in
addition to the static features of the signature. The signatures are captured using the
web camera and are verified using Matlab code. Automatic signature verification has
the unique possibility of becoming the method of choice for identification in many
types of electronic transactions.

1.3 Organization of project

The proposed dissertation consists of 8 chapters including Introduction and

Conclusions. Chapter 1 presents introduction Chapter 2 emphasizes towards
literature survey, and Chapter 3 introduces online signature verification for secure
transactions Chapter 4 briefs methodology Chapter 5 explains design of system,
Chapter 6 involves implementation Chapter 7 expresses pseudo code Chapter 8
verifies results and discussions Chapter 9 shows conclusion and future enhancement.

2
 2. LITERATURE SURVEY

In human life security takes important role. Nowadays it’s the basic
fundamental of all systems developed. For this purpose, biometric authentication
system got a lot of importance. Biometric authentication systems are secure, easy to
use, easy to develop, uses basic techniques of signal processing and cheap to build.
This improves the familiarity of biometric authentication system. Among these
techniques signature verification is the most famous one because of cheap data
acquisition devices. We can see the use of on-line signature verification in every
kind of real time applications, such as credit card transactions, document flow
applications, and identity authentication prior to access of sensitive resources. There
have been several studies on on-line signature verification algorithms.

This portion of thesis is to describe about the previous work in the field of
signature verification. The on-line signature verification techniques can be classified
into two broad areas.
1. Using features extracted from the visible parts of the signature.
2. Using features extracted from virtual strokes or invisible parts of the signature (the
parts that are not created but are imagined to be created).

To improve the efficiency of the signature verification systems, researchers

have tried different methods with various approaches. Some of them have employed
two or three expert systems that evaluate the signature in two/three different ways
and verify whether it is genuine or forgery.

J. B. Fasquel and M. Bruynooghe [20] proposed one offline signature

verification system combining some statistical classifiers. The signature verification
system consisted of three steps – the first step is to transform the original signatures
using the identity and four Gabor transforms, the second step is to intercorrelate the
analyzed signature with the similarly transformed signatures of the learning database
and then in the third step verification of the authenticity of signatures by fusing the
decisions related to each transform. The proposed system allowed the rejection of
62.4% of the forgeries used for the experiments when 99% of genuine signatures
were correctly recognized.

3
 Sharifah Mumtazah Syed Ahmad et al. [21] presented an automatic off-line
signature verification system built with several statistical techniques. They used
Hidden Markov Modeling (HMM) technique to build a reference model for each
local feature. The verification phase had three layers of statistical techniques. In the
first layer, HMM-based log-likelihood probability match score was computed. In the
second layer this score was mapped into soft boundary ranges of acceptance or
rejection through the use of z-score analysis and normalization function. Then
Bayesian inference technique was used for deciding acceptance or rejection of the
given signature sample. For random and skilled forgeries FAR were 22% and 37%
respectively.

H. Baltzakis and N. Papamarkos [10] proposed system was based on global,

grid and texture features. For each one of the feature sets a special two stage
Perceptron OCON (one-class-one-network) classification structure was
implemented. In the first stage, the classifier combined the decision results of the
neural networks and the Euclidean distance obtained using the three feature sets. The
results of the first-stage classifier feed a second-stage radial base function (RBF)
neural network structure, which made the final decision. FAR was 9.81% and FRR
was 3%.

Abhay Bansal, Divye Garg, Anand Gupta [22] proposed a contour matching
algorithm. They used the geometrical properties of the signature and considered the
inevitable intrapersonal variations for the user set A. The system was trained with 8
original signatures and given a test sample. Verification was done by a triangle
matching algorithm. FAR in case of Random Forgery was found to be 0.08% and in
case of Simple and Skilled forgery it was 13.02%. FRR was 2.64%.

To tackle the problem of detecting skilled forgeries in off-line signature

verification B. Fang et al. [23] proposed an approach based on a smoothness
criterion. They observed that skilled forgery signatures consisting of cursive graphic
patterns are less smooth on a detailed scale than the genuine ones. They derived a
smoothness index from such signatures and was combined with other global shape
features and used for verification.

4
 H.N. Prakash and D. S. Guru [29] proposed an approach for offline signature
verification based on score level fusion of distance and orientation features of
centroids. The proposed method used symbolic representation of offline signatures
using bi-interval valued feature vector. Distance and orientation features of centroids
of offline signatures were used to form bi-interval valued symbolic feature vector for
representing signatures. With 9 training samples per class 31 centroids and
Threshold = 233, they achieved FRR of 27.77% and FAR of 26.11%, with 63
centroids and threshold = 977, FRR and FAR were 20.22% and 29.51% respectively.

Madasu Hanmandlu et al. [30] proposed an offline signature verification and

forgery detection approach based on fuzzy modeling that used a model called the
“Takagi–Sugeno (TS) model”. The TS model involved structural parameters in its
exponential membership function. Signature verification and forgery detection were
carried out using angle features extracted from box approach. They tried the TS
model with fixed and adapted consequent coefficients and observed that TS model
with fixed consequent coefficients performed better.

Hai Rong Lv et al. [31] used HMM approach to offline signature verification.
They represented each of the signature images as landmark point set, which included
turning points, isolated points, trifurcate points, intersection points and termination
points on signature skeleton. They proposed a deformable grid partition technique.
Based on landmark point matching, they built the matching relations between planar
regions to get the deformable grids, and then extract grid features from them. To
represent the grids of a signature image, they used features like pixels Density
(numbers of pixels inside the cell), gravity center (gravity center distance in each
cell), stroke curvature (curvature angle of the bigger stroke inside the cell), slant
(predominant slant inside the cell) and grid area. By using HMM the proposed
method produced an EER rate of 6.4%.

5
 3. ONLINE SIGNATURE VERIFICATION

3.1 Existing system

In the online signature verification on touch interface-based mobile devices

a simple and effective method for signature verification is developed. An online
signa-ture is represented with a discriminative feature vector derived from attributes
of several histograms that can be computed in linear time. The resulting signature
template is compact and requires constant space. The algorithm was first tested on
the well-known MCYT-100 and SUSIG data sets. The results show that the
performance of the proposed technique is comparable and often superior to state-of-
the-art algorithms despite its simplicity and efficiency. In order to test the proposed
method on finger drawn signatures on touch devices, a data set was collected from
an uncontrolled environment and over multiple sessions. Experimental results on this
data set confirm the effectiveness of the proposed algorithm in mobile settings. The
results demonstrate the problem of within-user variation of signatures across
multiple sessions and the effectiveness of cross session training strategies to alleviate
these problems.

3.2 Proposed system

With modern technology, there is need to develop fast algorithms for

signature verification. There are various approaches to signature verification with a
lot of scope of research. The fact that the signature is widely used as a means of
personal identification tool for humans require that the need for an automatic
verification system.
This signature verification system is designed using MATLAB. MATLAB is
a high-performance language for technical computing. This has been tested and
found suitable for its purpose.
The project is to develop an authentication system based on personal
signatures. Signature verification is an important research topic in the area of
biometric authentication. In this project the work is done in such a way that the
signatures are captured using webcam. The results show that the performance of the
6
planned technique is comparable and sometimes superior to progressive algorithms
despite its simplicity and potency. In that user signature is compared with the
database signature and the authenticated persons are allowed for required
transactions. The user get the message alert for the unauthorized usage to access the
user account. This study aims to reduce to a minimum the cases of forgery in
business transactions.

Advantages of proposed work:

 Automatic verification is done

 Signature verification system is designed using MATLAB

 Easy soft programming through Embedded c language

 GUI representation

 High accuracy

 GSM technique used

 Low cost and high performance

3.3 Block diagram & Explanation

I/O DEVICE

WEB CAMERA
ARM PROCESSOR GLCD

TOUCH SCREEN

SIGNATURE

PIR SENSOR

VOICE
ZIGBEE

Fig.3.3.1:Block Diagram of Security Unit

7
 ZIGBEE GSM

Fig.3.3.2:Block Diagram of Server Section

Fig.3.3.3:User Section

ARM 7 lpc2148 is used in this project. GLCD is a 20 pin I/O device. It’s data
pins are connected to PIN 0.16 to 0.23 of the processor. The control pins of GLCD
are connected to PIN 1.16 to 1.22. A buzzer is connected to the Port1 30 th pin. Xbee
module is connected to the UART0 which is present in P0.0 and P0.1. Buzzer will be
activated through a base resistance of 1k. Crystals are connected to the PIN 61 and
62 of LPC2148. MAX IC is used to convert the voltage levels between the IC and

8
 4. METHODOLOGY

4.1 Introduction

Signature verification is a common behavioral biometric to identify human

beings for purposes of verifying their identity. Signatures are particularly useful for
identification of a particular person because each person’s signature is highly unique,
especially if the dynamic properties of the signature are considered in addition to the
static features of the signature. Even if skilled forgers can accurately reproduce the
shape of signatures, but it is unlikely that they can simultaneously reproduce the
dynamic properties as well.

4.2 Working of the Project

This project is a signature verification system, which can be applied in
banking sector .If any valid account is detected, the details will be displayed in the
GLCD. Then the user wants to sign the pad in front of camera unit. Then camera
captures the signature and sends the data to server section through wireless
communication network. In server unit some database is already stored with their
account number. If the present captured signature and entered account number are
matched then only further processing is continued in this section. If any
unauthenticated user is try to access the others account then gives a message alert to
original account holder and processing is aborted.

The signature verification is only processed in MATLAB. MATLAB is a high-

performance language for technical computing. It integrates computation,
visualization, and programming in an easy-to-use environment where problems and
solutions are expressed in familiar mathematical notation. Typical uses include

 Math and computation

 Algorithm development
 Data acquisition
 Modeling, simulation, and prototyping
 Data analysis, exploration, and visualization
 Scientific and engineering graphics
 Application development, including graphical user interface building

9
 A graphical user interface (GUI) is a graphical display in one or more
windows containing controls, called components that enable a user to perform
interactive tasks. The user of the GUI does not have to create a script or type
commands at the command line to accomplish the tasks. Unlike coding programs to
accomplish tasks, the user of a GUI need not understand the details of how the tasks
are performed.

The Zigbee will transfer the data between microcontroller and PC. If the
unauthorized to access your account, then the GSM connected to the PC will
transfer the alert message to the account holder.

Inputs and outputs of system

For an on-line signature verification system, input is dynamic. This input is

normally captured through a web camera. This input is digitized and fed for
processing. First of all pre-processing is done on the input received and then some
features are extracted from the captured online data on the basis of which the
signature is validated.

The output obtained from an online signature verification system is a

decision if the person providing the signature is authorized or not.

10
 5. HARDWARE DESCRIPTION
5.1 LPC 2148 Microcontroller
5.1.1 Introduction:

LPC2148 microcontroller board based on a 16-bit/32-bit ARM7TDMI-S

CPU with real-time emulation and embedded trace support, that combine
Microprocessors with embedded high-speed flash memory ranging from 32 kB to
512 kB. A 128-bit wide memory interface and unique accelerator architecture enable
32-bit code execution at the maximum clock rate. For critical code size applications,
the alternative 16-bit Thumb mode reduces code by more than 30% with minimal
performance penalty. The meaning of LPC is Low Power Low Cost microcontroller.
This is 32 bit Microprocessor manufactured by Philips semiconductors (NXP).

Fig.[Link]:Block diagram of lpc 2148

Due to their tiny size and low power consumption, LPC2148 is ideal for
applications where miniaturization is a key requirement, such as access control and
point-of-sale.

11
5.1.2 Features:

 16-bit/32-bit ARM7TDMI-S Microprocessor in a tiny LQFP64 package.

 8 kB to 40 kB of on-chip static RAM and 32 kB to 512 kB of on-chip flash
memory; 128-bit wide interface/accelerator enables high-speed 60 MHz
operation.
 In-System Programming/In-Application Programming (ISP/IAP) via on-chip
boot loader software, single flash sector or full chip erase in 400 ms and
programming of 256 B in 1 ms Embedded ICE RT and Embedded Trace
interfaces offer real-time debugging with the on-chip Real Monitor software
and high-speed tracing of instruction execution.
 USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM.
In addition, the LPC2148 provides 8 kB of on-chip RAM accessible to USB
by DMA.
 One or two (LPC2141/42 Vs, LPC2144/46/48) 10-bit ADCs provide a total
of 6/14 analog inputs, with conversion times as low as 2.44 ms per channel.
 Single 10-bit DAC provides variable analog output (LPC2148 only)
 Two 32-bit timers/external event counters (with four capture and four
compare channels each), PWM unit (six outputs) and watchdog.
 Low power Real-Time Clock (RTC) with independent power and 32 kHz
clock input
 Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus
(400 kbit/s), SPI and SSP with buffering and variable data length capabilities.
 Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64
package.
 Up to 21 external interrupt pins available.
 60 MHz maximum CPU clock available from programmable on-chip PLL
with settling time of 100 ms.
 On-chip integrated oscillator operates with an external crystal from 1 MHz to
25 MHz and Power saving modes includes idle and Power-down.
 CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V
tolerant I/O

12
 Internal state of the ARM core can be examined using a JTAG interface to
allow the insertion of instructions into core pipeline and avoid using external data
bus. ARM7TDMI core includes an internal functional unit known as the Embedded
ICE logic. The Embedded ICE logic is configured to monitor the ARM7TDMI core
actively for specific instruction fetches and data accesses. The ARM7TDMI core
consists of a 32-bit data path and associated control logic. This data path contains 31
general-purpose 32-bit registers, 7 dedicated 32-bit registers coupled to a barrel-
shifter, Arithmetic Logic Unit, and multiplier. In ARM state, 16 general registers and
one or two status registers are accessible at any one time. The ARM state register set
contains 16 directly accessible registers: R0 to R15. All of these except R15 are
general-purpose, and may be used to hold either data or address values.

5.1.3 Architectural overview:

The LPC2148 microcontroller Architecture includes ARM7TDMI-S is a

general purpose 32-bit microprocessor, which offers high performance and very low
power consumption. The ARM architecture is based on Reduced Instruction Set
Computer (RISC) principles, and the instruction set and related decode mechanism
are much simpler than those of micro programmed Complex Instruction Set
Computers (CISC). This simplicity results in a high instruction throughput and
impressive real-time interrupt response from a small and cost-effective processor
core.
Pipeline techniques are employed so that all parts of the processing and
memory systems can operate continuously. Typically, while one instruction is being
executed, its successor is being decoded, and a third instruction is being fetched
from memory. The ARM7TDMI-S processor also employs a unique architectural
strategy known as Thumb, which makes it ideally suited to high-volume applications
with memory restrictions, or applications where code density is an issue. The key
idea behind Thumb is that of a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
 The standard 32-bit ARM set.
 A 16-bit Thumb set.

13
 Fig.[Link] Lpc 2148 pcb

This is possible because Thumb code operates on the same 32-bit register set
as ARM code. Thumb code is able to provide up to 65 % of the code size of ARM,
and 160 % of the performance of an equivalent ARM processor connected to a 16-bit
memory system.
The particular flash implementation in the LPC2141/42/44/46/48 allows for
full speed execution also in ARM mode. It is recommended to program performance
critical and short code sections (such as interrupt service routines and DSP
algorithms) in ARM mode. The impact on the overall code size will be minimal but
the speed can be increased by 30% over Thumb mode. If more than one request is
assigned to the FIQ class, the FIQ service routine will read a word from the VIC that
identifies which FIQ source(s) is (are) requesting an interrupt. Vectored IRQs have
the middle priority. Sixteen of the interrupt requests can be assigned to this category.

14
On-chip static RAM:

On-chip static RAM may be used for code and/or data storage. The SRAM
may be accessed as 8-bit, 16-bit, and 32-bit. The LPC2141, LPC2142/44 and
LPC2146/48 provide 8 kB, 16 kB and 32 kB of static RAM respectively. In case of
LPC2146/48 only, an 8 kB SRAM block intended to be utilized mainly by the USB
can also be used as a general purpose RAM for data storage and code storage and
execution.

Interrupt controller:

The Vectored Interrupt Controller (VIC) accepts all of the interrupt request
inputs and categorizes them as Fast Interrupt Request (FIQ), vectored Interrupt
Request (IRQ), and non-vectored IRQ as defined by programmable settings. The
programmable assignment scheme means that priorities of interrupts from the
various peripherals can be dynamically assigned and adjusted. Fast interrupt request
(FIQ) has the highest priority. If more than one request is assigned to FIQ, the VIC
combines the requests to produce the FIQ signal to the ARM processor. The fastest
possible FIQ latency is achieved when only one request is classified as FIQ, because
then the FIQ service routine does not need to branch into the interrupt service routine
but can run from the interrupt vector location. If more than one request is assigned to
the FIQ class, the FIQ service routine will read a word from the VIC that identifies
which FIQ source(s) is (are) requesting an interrupt. Vectored IRQs have the middle
priority. Sixteen of the interrupt requests can be assigned to this category. Any of the
interrupt requests can be assigned to any of the 16 vectored IRQ slots, among which
slot 0 has the highest priority and slot 15 has the lowest.
Non-vectored IRQs have the lowest priority. The VIC combines the requests
from all the vectored and non-vectored IRQs to produce the IRQ signal to the ARM
processor. The IRQ service routine can start by reading a register from the VIC and
jumping there. If any of the vectored IRQs are pending, the VIC provides the address
of the highest-priority requesting IRQs service routine, otherwise it provides the
address of a default routine that is shared by all the non-vectored IRQs. The default
routine can read another VIC register to see what IRQs are active. Each peripheral
device has one interrupt line connected to the Vectored Interrupt Controller, but may
have several internal interrupt flags.

15
 The pin connect block allows selected pins of the Microprocessor to have
more than one function. Configuration registers control the multiplexers to allow
connection between the pin and the on chip peripherals.
Peripherals should be connected to the appropriate pins prior to being
activated, and prior to any related interrupts being enabled. Activity of any enabled
peripheral function that is not mapped to a related pin should be considered
undefined.
The Pin Control Module with its pin select registers defines the functionality
of the Microprocessor in a given hardware environment. After reset all pins of Port 0
and 1 are configured as input with the following exceptions: If debug is enabled, the
JTAG pins will assume their JTAG functionality; if trace is enabled, the Trace pins
will assume their trace functionality. The pins associated with the I2C0 and I2C1
interface are open drain.
Fast general purpose parallel I/O (GPIO):
Device pins that are not connected to a specific peripheral function are
controlled by the GPIO registers. Pins may be dynamically configured as inputs or
outputs. Separate registers allow setting or clearing any number of outputs
simultaneously. The value of the output register may be read back, as well as the
current state of the port pins.

LPC2141/42/44/46/48 introduces accelerated GPIO functions:

 GPIO registers are relocated to the ARM local bus for the fastest possible I/O
timing.
 Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
 All GPIO registers are byte addressable.
 Entire port value can be written in one instruction.
Features:
 Bit-level set and clear registers allow a single instruction set or clear of any
number of bits in one port
 Direction control of individual bits
 Separate control of output set and clear
 All I/O default to inputs after reset

16
10-bit ADC:
The LPC2141/42 contains one and the LPC2144/46/48 contains two analog
to digital converters. These converters are single 10-bit successive approximation
analog to digital converters. While ADC0 has six channels, ADC1 has eight
channels.
Therefore, total number of available ADC inputs for LPC2141/42 is 6 and for
LPC2144/46/48 are 14.
Features:
 10 bit successive approximation analog to digital converter.
 Measurement range of 0 V to VREF (2.0 V ≤ VREF ≤ VDDA).
 Each converter capable of performing more than 400,000 10-bit samples per
Second.
 Every analog input has a dedicated result register to reduce interrupt
overhead.
 Burst conversion mode for single or multiple inputs.
 Optional conversion on transition on input pin or timer match signal.
 Global Start command for both converters (LPC2142/44/46/48 only).

UART:
The LPC2141/42/44/46/48 each contains two UARTs. In addition to standard
transmit and receive data lines, the LPC2144/46/48 UART1 also provide a full
modem control handshake interface. Compared to previous LPC2000
Microprocessors, UARTs in LPC2141/42/44/46/48 introduce a fractional baud rate
generator for both UARTs, enabling these Microprocessors to achieve standard baud
rate such as 115200 with any crystal frequency above 2 MHz
Features:
 16 byte Receive and Transmit FIFO.
 Register locations conform to 550 industry standard.
 Receiver FIFO triggers points at 1, 4, 8, and 14 bytes
 Built-in fractional baud rate generator covering wide range of baud rates
without a need for external crystals of particular values.
 Transmission FIFO control enables implementation of software
(XON/XOFF)
 Flow control on both UARTs.

17
General purpose timers/external event counters:
The Timer/Counter is designed to count cycles of the peripheral clock
(PCLK) or an externally supplied clock and optionally generate interrupts or perform
other actions at specified timer values, based on four match registers. It also includes
four capture inputs to trap the timer value when an input signals transitions,
optionally generating an interrupt.
Multiple pins can be selected to perform a single capture or match function,
providing an application with ‘or’ and ‘and’, as well as ‘broadcast’ functions among
them. The LPC2141/42/44/46/48 can count external events on one of the capture
inputs if the minimum external pulse is equal or longer than a period of the PCLK.
In this configuration, unused capture lines can be selected as regular timer capture
inputs, or used as external interrupts.

5.1.4 Pin diagram:

Fig.5.3: LPC2148 Microcontroller Pin Diagram

18
5.2. ARM7 Microprocessor
5.2.1 Introduction:

The ARM7 family includes the ARM7TDMI, ARM7TDMI-S, ARM720T,

and ARM7EJ-S processors. The ARM7TDMI core is the industry’s most widely
used 32-bit embedded RISC microprocessor solution. Optimized for cost and power-
sensitive applications, the ARM7TDMI solution provides the low power
consumption, small size, and high performance needed in portable, embedded
applications.

The ARM7TDMI-S core is the synthesizable version of the ARM7TDMI

core, available in both VERILOG and VHDL, ready for compilation into processes
supported by in-house or commercially available synthesis libraries. Optimized for
flexibility and featuring an identical feature set to the hard macro cell, it improves
time-to-market by reducing development time while allowing for increased design
flexibility, and enabling >>98% fault coverage. The ARM720T hard macro cell
contains the ARM7TDMI core, 8kb unified cache, and a Memory Management Unit
(MMU) that allows the use of protected execution spaces and virtual memory. This
macro cell is compatible with leading operating systems including Windows CE,
Linux, palm OS, and SYMBIAN OS.

The ARM7EJ-S processor is a synthesizable core that provides all the

benefits of the ARM7TDMI – low power consumption, small size, and the thumb
instruction set – while also incorporating ARM’s latest DSP extensions and Jazelle
technology, enabling acceleration of java-based applications. Compatible with the
ARM9™, ARM9E™, and ARM10™ families, and Strong-Arm® architecture
software written for the ARM7TDMI processor is 100% binary-compatible with
other members of the ARM7 family and forwards-compatible with the ARM9,
ARM9E, and ARM10 families, as well as products in Intel’s Strong ARM and scale
architectures.

Fig.6.4 shows the ARM7TDMI-S Core Diagram. The ARM7TDMI core is

based on the Non Neumann architecture with a 32-bit data bus that carries
instructions and data. Load, store, and swap instructions can access data from
memory. Data can be 8-bit, 16-bit, and 32-bit

19
5.2.2 Architecture overview:

Fig.5.4: ARM7 TDMI-S Core Diagram

20
Instruction pipeline:

The ARM7TDMI core uses a three-stage pipeline to increase the flow of

instructions to the processor. This allows multiple simultaneous operations to take
place and continuous operation of the processing and memory systems.

The instructions are executed in three stages:

 fetch
 decode
 execute
Memory interface:

The ARM7TDMI memory interface is designed to allow optimum

performance potential and minimize memory usage. Speed critical control signals
are pipelined to allow system control functions to exploit the fast-burst access modes
supported by many memory technologies. The ARM7TDMI has four basic types of
memory cycle:

 Internal
 Non sequential
 Sequential
 Coprocessor registers transfer.
There is also the option to use either a single bidirectional data bus or two
separate unidirectional data input and output buses.

Memory formats:

The ARM7TDMI can be configured to treat stored words in either big-endian

or little-endian format. Performance, code density and operating states

The ARM7TDMI core supports two operating states and instruction sets:

 ARM state for 32-bit, word-aligned instructions

 Thumb state for 16-bit, half word-aligned instructions.

The ARM instruction set allows a program to achieve maximum performance

with the minimum number of instructions. The simpler thumb instruction set offers
much increased code density reducing memory requirement.

Operating modes:
21
The ARM7TDMI core has seven modes of operation:

 User mode is the usual program execution state

 Fast Interrupt (FIQ) mode supports data transfer or channel processes to
allow very fast interrupt processing and to preserve values across interrupt
calls
 Interrupt (IRQ) mode is used for general purpose interrupt handling
 Supervisor mode is a protected mode for the operating system
 Abort mode is entered after a data or instruction pre fetch abort
 System mode is a privileged user mode for the operating system
 Undefined mode is entered when an undefined instruction is executed.
Coprocessors:

 Up to 16 coprocessors can be connected to an ARM7TDMI system.

Debug features:

Internal state of the ARM core can be examined using a JTAG interface to
allow the insertion of instructions into core pipeline and avoid using external data
bus. ARM7TDMI core includes an internal functional unit known as the Embedded
ICE logic. The Embedded ICE logic is configured to monitor the ARM7TDMI core
actively for specific instruction fetches and data accesses.

Registers:

The ARM7TDMI-S core consists of a 32-bit data path and associated control
logic. This data path contains 31 general-purpose 32-bit registers, 7 dedicated 32-bit
registers coupled to a barrel-shifter, Arithmetic Logic Unit, and multiplier.

Modes and exceptions:

The ARM7TDMI-S supports seven modes of operation:

 User mode
 Fast Interrupt (FIQ)
 Interrupt (IRQ)
 Supervisor mode

All modes other than User are privileged modes. These are used to service
hardware interrupts, exceptions, and software interrupts. Each privileged mode has

22
an associated Saved Program Status Register (SPSR). This register is use to save the
state of the Current Program Status Register (CPSR) of the task immediately before
the exception occurs. In these privileged modes, mode-specific banked registers are
available.

These are automatically restored to their original values on return to the

previous mode and the saved CPSR restored from the SPSR. System mode does not
have any banked registers. It uses the User mode registers. System mode runs tasks
that require a privileged processor mode and allows them to invoke all classes of
exception.

Processor states:

The ARM7TDMI processor can be in one of two states:

ARM state:
 In ARM state, 16 general registers and one or two status registers are
accessible at any one time.
 The ARM state register set contains 16 directly accessible registers: R0 to
R15. All of these except R15 are general-purpose, and may be used to hold
either data or address values.
 The registers available to the programmer in each mode, in ARM state, are
illustrated

THUMB state:

The THUMB state register set is a subset of the ARM state set. The
programmer has direct access to eight general registers, R0-R7, as well as the
Program Counter (PC), a stack pointer register (SP), a link register (LR), and the
CPSR. There are banked Stack Pointers, Link Registers and Saved Process Status
Registers (SPSRs) for each privileged mode.

The registers available to the programmer in each mode, in THUMB state,

are illustrated in Fig.4.19 Register Organization in THUMB state.

23
 Fig.5.5: Register organization in thumb state

Exceptions:

The ARM7TDMI supports seven types of exception:

 FIQ – fast interrupt

 IRQ – normal interrupt
 .Data abort
 Pre fetch abort
 Software interrupt
 Undefined instruction
 Reset.

24
5.2.3 System issues:

This section contains:

 JTAG debug
 AMBA bus architecture

JTAG debug:
The internal state of the ARM7TDMI is examined through a JTAG-style serial
interface. This allows instructions to be serially inserted into the pipeline of the core
without using the external data bus. For example, when in debug state, a Store-
Multiple (STM) instruction can be inserted into the pipeline. This exports the contents
of the ARM7TDMI registers. This data can be serially shifted out without affecting
the rest of the system.

AMBA bus architecture:

The ARM7 Thumb family processors are designed for use with the Advanced
Microcontroller Bus Architecture (AMBA) multi-master on-chip bus architecture.
AMBA is an open standard that describes a strategy for the interconnection and
management of functional blocks that makes up a System-on-Chip (SoC).

The AMBA specification defines three buses:

 Advanced System Bus (ASB)

 Advanced High-performance Bus (AHB)
 Advanced Peripheral Bus (APB).
 ASB and AHB are used to connect high-performance system modules. APB
offers a simpler interface for low-performance peripherals.

5.2.4 Advantages:

 Small device
 Lower Power Consumption
 Simple decoding
 Higher performance
 Easy to implement an effective pipelined structure

45
5.3 GSM Modem:

5.3.1 Definition:

Global system for mobile communication (GSM) is a globally accepted

standard for digital cellular communication. GSM is the name of a standardization
group established in 1982 to create a common European mobile telephone standard
that would formulate specifications for a pan-European mobile cellular radio system
operating at 900 MHz.

5.3.2 GSM Network architecture:

GSM provides recommendations, not requirements. The GSM specifications

define the functions and interface requirements in detail but do not address the
hardware. The reason for this is to limit the designers as little as possible but still to
make it possible for the operators to buy equipment from different suppliers. The
GSM network is divided into three major systems: the switching system (SS), thebase
station system (BSS), and the operation and support system (OSS). The basic GSM
architecture is shown in below figure

Fig.5.6 :GSM Network Architecture

5.3.3 Operation:

A GSM modem is a wireless modem that works with a GSM wireless

network. A wireless modem behaves like a dial-up modem. The main difference
between them is that a dial-up modem sends and receives data through a fixed
telephone line while a wireless modem sends and receives data through radio waves.

26
 A GSM modem can be an external device or a PC Card / PCMCIA Card.
Typically, an external GSM modem is connected to a computer through a serial cable
or a U SB cable. A GSM modem in the form of a PC Card / PCMCIA Card is
designed for use with a laptop computer. It should be inserted into one of the PC Card
/ PCMCIA Card slots of a laptop computer. Like a GSM mobile phone, a GSM
modem requires a SIM card from a wireless carrier in order to operate.
As mentioned in earlier sections of this SMS tutorial, computers use AT
commands to control modems. Both GSM modems and dial-up modems support a
common set of standard AT commands. You can use a GSM modem just like a dial-
up modem.
In addition to the standard AT commands, GSM modems support an extended
set of AT commands.

Table.5.1:AT Commands of GSM

These extended AT commands are defined in the GSM standards. With the
extended AT commands, you can do things like:

 Sending SMS messages.

 Monitoring the signal strength.
 Monitoring the charging status and charge level of the battery.
 Reading, writing and searching phone book entries.
 Reading, writing and deleting SMS messages.

The number of SMS messages that can be processed by a GSM modem per
minute is very low -- only about six to ten SMS messages per minute.

27
5.3.4 GSM modem applications:

Fig.5.7:GSM Applications

5.4 Power supply:

5.4.1 Block diagram:

Transformer Rectifier Filter IC regulator Load

Fig.5.8: Block diagram of power supply

5.4.2 Descriptions:

The potential transformer will step down the power supply voltage (0-230V) to (0-
6V) level. Then the secondary of the potential transformer will be connected to the
precision rectifier, which is constructed with the help of op–amp. The advantages of

28
using precision rectifier are it will give peak voltage output as DC rest of the circuits
will give only RMS output.

When four diodes are connected as shown in figure, the circuit is called as bridge
rectifier. The input to the circuit is applied to the diagonally opposite corners of the
network, and the output is taken from the remaining two corners. Let us assume that
the transformer is working properly and there is a positive potential, at point A and a
negative potential at point B. the positive potential at point A will forward bias D3
and reverse bias D4. The negative potential at point B will forward bias D1 and
reverse D2. At this time D3 and D1 are forward biased and will allow current flow to
pass through them; D4 and D2 are reverse biased and will block current flow.

One-half cycle later the polarity across the secondary of the transformer reverse,
forward biasing D2 and D4 and reverse biasing D1 and D3. Current flow will now be
from point A through D4, up through RL, through D2, through the secondary of T1,
and back to point A.

This path is indicated by the broken arrows. Waveforms (3) and (4) can be
observed across D2 and [Link] current flow through RL is always in the same
direction. One advantage of a bridge rectifier over a conventional full-wave rectifier is
that with a given transformer the bridge rectifier produces a voltage output that is
nearly twice that of the conventional full-wave circuit.

The maximum voltage that appears across the load resistor is nearly-but never
exceeds-500 v0lts, as result of the small voltage drop across the diode. In the bridge
rectifier shown in view B, the maximum voltage that can be rectified is the full
secondary voltage, which is 1000 volts.
Therefore, the peak output voltage across the load resistor is nearly 1000 volts.
With both circuits using the same transformer, the bridge rectifier circuit produces a
higher output voltage than the conventional full-wave rectifier circuit.
Voltage regulator:

Voltage regulators comprise a class of widely used ICs. Regulator IC units contain
the circuitry for reference source, comparator amplifier, control device, and overload
protection all in a single IC. IC units provide regulation of either a fixed positive
voltage, a fixed negative voltage, or an adjustably set voltage.

29
 The regulators can be selected for operation with load currents from hundreds
of milliamperes to tens of amperes, corresponding to power ratings from milliwatts to
tens of watts. A fixed three-terminal voltage regulator has an unregulated dc input
voltage, Vi, applied to one input terminal, a regulated dc output voltage, Vo, from a
second terminal, with the third terminal connected to ground.

Circuit diagram:

D1
2

J1 U2
LM7805C/TO R1 D2
2 4 - + 1 1 3
1 IN OUT J1
220 ohm LED
CON1 1

GND
C1 2
C3 C4
3

470µ 100µ 0.01µ CON1

2

Fig.5.9: Circuit Diagram of Power Supply

5.5 LCD module

Dot matrix LCD (2X16 CHARACTER) modules is used for display the
parameters and fault condition.16 characters 2 lines display is used. It has controller
which interface data’s and LCD panel. Liquid crystal displays (LCD’s) have
materials, which combine the properties of both liquids and crystals. Rather than
having a melting point, they have a temperature range within which the molecules are
almost as mobile as they would be in a liquid, but are grouped together in an ordered
form similar to a crystal.

An LCD consists of two glass panels, with the liquid crystal material
sandwiched in between them. The inner surface of the glass plates are coated with
transparent electrodes which define the character, symbols or patterns to be displayed
polymeric layers are present in between the electrodes and the liquid crystal
molecules to maintain a defined orientation angle.

One each polarizer’s are pasted outside the two glass panels. These
polarizer’s would rotate the light rays passing through them to a definite angle, in a
particular direction When the LCD is in the off state, light rays are rotated by the two

30
polarizes and the liquid crystal, such that the light rays come out of the LCD without
any orientation, and hence the LCD appears transparent.

Fig.5.10: LCD Diagram

The LCD's are lightweight with only a few millimetres thickness. since the
LCD's consume less power, they are compatible with low power electronic circuits,
and can be powered for long durations .The LCD's don't generate light is needed to
read the display. By using backlighting, reading is possible in the dark .The LCD's
have long life and a wide operating temperature range.

One of the most popular output devices for embedded electronics is LCD. The
LCD interface has become very simple. This is due to the availability modules for
LCDs. The LCD along with necessary controller (LCD Controller) and mounting
facility is made available in the module itself. The LCD controller takes care of
everything necessary for the LCD. We communicate with the LCD controller with the
help of a command set.

31
 Table .5.2: LCD functions

No. Instruction Hex Decimal

1 Function Set: 8-bit, 1 Line, 5x7 Dots 0x30 48
2 Function Set: 8-bit, 2 Line, 5x7 Dots 0x38 56
3 Function Set: 4-bit, 1 Line, 5x7 Dots 0x20 32
4 Function Set: 4-bit, 2 Line, 5x7 Dots 0x28 40
5 Entry Mode 0x06 6
Display off Cursor off
6 (clearing display without clearing DDRAM 0x08 8
content)
7 Display on Cursor on 0x0E 14
8 Display on Cursor off 0x0C 12
9 Display on Cursor blinking 0x0F 15
10 Shift entire display left 0x18 24
12 Shift entire display right 0x1C 30
13 Move cursor left by one character 0x10 16
14 Move cursor right by one character 0x14 20
15 Clear Display (also clear DDRAM content) 0x01 1
Set DDRAM address or coursor position on
16 0x80+add* 128+add*
display
Set CGRAM address or set pointer to
17 0x40+add** 64+add**
CGRAM location

5.6 Zigbee module

The XBee/XBee-PRO RF Modules are designed to operate within the ZigBee

protocol and support the unique needs of low-cost, low-power wireless sensor
networks. The modules require minimal power and provide reliable delivery of data
between remote devices. The modules operate within the ISM 2.4 GHz frequency
band and are compatible with the following:

 XBee RS-232 Adapter

 XBee RS-232 PH (Power Harvester) Adapter
 XBee RS-485 Adapter
 XBee Analog I/O Adapter
 XBee Digital I/O Adapter
 XBee Sensor Adapter
 XBee USB Adapter
 XStick

32
  Connect Port X Gateways
 XBee Wall Router.
The XBee/XBee-PRO ZB firmware release can be installed on XBee modules.
This firmware is compatible with the ZigBee 2007 specification, while the ZNet 2.5
firmware is based on Ember's proprietary "designed for ZigBee" mesh stack
(EmberZNet 2.5). ZB and ZNet 2.5 firmware are similar in nature, but not over-the-
air compatible. Devices running ZNet 2.5 firmware cannot talk to devices running the
ZB firmware.

5.6.1 Features:

 High Performance, Low Cost

 Indoor/Urban: up to 300’ (100 m)
 Outdoor line-of-sight: up to 1 mile (1.6 km)
 Transmit Power Output: 100 mW (20 dBm) EIRP
 Receiver Sensitivity: -102 dBmRF Data rate: 250,000 bps.
 Advanced Networking & Security
 Retries and Acknowledgements
 DSSS (Direct Sequence Spread Spectrum)
 Each direct sequence channel has over 65,000 unique network addresses
available
 Point-to-point topology
 point-to-multipoint topology
 Self-routing, self-healing and fault-tolerant
 mesh networking
 Low Power
 TX Current: 295 mA (@3.3 V)
 RX Current: 45 mA (@3.3 V)
 Power-down Current: < 1 μA @ 25oC
 Easy-to-Use
 No configuration necessary for out-of box
 RF communications
 AT and API Command Modes for configuring module parameters
 Small form factor
 Extensive command set

33
  Free X-CTU Software (Testing and configuration software)

Mounting Considerations
The XBee modules were designed to mount into a receptacle (socket) and
therefore do not require any soldering when mounting it to a board. The XBee-PRO
Development Kits contain RS-232 and USB interface boards which use two 20-pin
receptacles to receive modules. Figure 4.7.2 XBee‐PRO Module Mounting to an RS‐
232 Interface Board. The receptacles used on Digi development boards are
manufactured by Century Interconnect. Several other manufacturers provide
comparable mounting solutions; however, Digi currently uses the following
receptacles:

 Through-hole single-row receptacles - Samtec P/N: MMS-110-01-L-SV (or

equivalent)
 Surface-mount double-row receptacles Century Interconnect P/N:
CPRMSL20-D-0-1
 Surface-mount single-row receptacles - Samtec P/N: SMM-110-02-SM-S

Fig.5.11:Zigbee Module Mounting to an RS232 Interface Board.

5.6.2 Pin Assignment of Zigbee Module:

34
 Table.5.3: Pin Assignment of Zigbee Module

5.6.3 Operation

Serial Communication:

The XBee OEM RF Modules interface to a host device through a logic-level

asynchronous serial port. Through its serial port, the module can communicate with
any logic and voltage compatible UART; or through a level translator to any serial
device.

UART Data Flow

Devices that have a UART interface can connect directly to the pins of the RF
module as shown inthe figure below.

35
 Fig.5.12:Zigbee UART Dataflow

Serial Data

Data enters the module UART through the DIN (pin 3) as an asynchronous
serial signal. The signal should idle high when no data is being transmitted. Each data
byte consists of a start bit (low), 8 data bits (least significant bit first) and a stop bit
(high). The following figure illustrates the serial bit pattern of data passing through
the module.

The module UART performs tasks, such as timing and parity checking, that
are needed for data communications. Serial communications depend on the two
UARTs to be configured with compatible settings (baud rate, parity, start bits, stop
bits, data bits).

Serial Buffers

The XBee modules maintain small buffers to collect received serial and RF
data, which is illustrated in the figure below. The serial receive buffer collects
incoming serial characters and holds them until they can be processed. The serial
transmit buffer collects data that is received via the RF link that will be transmitted
out the UART.

Serial Receive Buffer

When serial data enters the RF module through the DIN Pin (pin 3), the data is
stored in the serial receive buffer until it can be processed. Under certain conditions,
the module may not be able to process data in the serial receive buffer immediately. If
large amounts of serial data are sent to the module, CTS flow control may be required
to avoid overflowing the serial receive buffer.

36
 Fig.5.13: Internal Dataflow

Serial Transmit Buffer

When RF data is received, the data is moved into the serial transmit buffer
and sent out the UART. If the serial transmit buffer becomes full enough such that all
data in a received RF packet won’t fit in the serial transmit buffer, the entire RF data
packet is dropped.

5.6.4 Advantages

 Power saving, as a result of the short working period, low power consumption
of communication, and standby mode
 Reliability: Collision avoidance is adopted, with a special time slot allocated
for those communications that need fixed bandwidth so that competition and
conflict are avoided when transmitting data. The MAC layer adopts
completely confirmed data transmission, that is, every data packet sent must
wait for the confirmation from the receiver
 Low cost of the modules, and the ZigBee protocol is patent fee free
 Short time delay, typically 30 ms for device searching, 15 ms for standby to
activation, and 15 ms for channel access of active devices
 Large network capacity: One ZigBee network contains one master device and
maximum 254 slave devices. There can be as many as 100 ZigBee networks
within one area

37
  Safety: ZigBee provides a data integrity check and authentication function.
AES-128 is adopted and at the same time each application can flexibly
determine its safety property.

5.6.5 Zigbee applications:

Fig.5.14:Zigbee Applications

5.7 Relay:

A relay is an electrically operated switch. Current flowing through the coil of

the relay creates a magnetic field which attracts a lever and changes the switch
contacts. The coil current can be on or off so relays have two switch positions and
they are double throw (changeover) switches.
Relays allow one circuit to switch a second circuit which can be completely
separate from the first. For example a low voltage battery circuit can use a relay to
switch a 230V AC mains circuit. There is no electrical connection inside the relay
between the two circuits; the link is magnetic and mechanical.
Relays are very simple devices. There are four major parts in every realy. They are
 Electromagnet
 Armature that can be attracted by the electromagnet
 Spring

38
  Set of electrical contacts
When a current flows through the coil, the resulting magnetic field attracts an
armature that is mechanically linked to a moving contact. The movement either makes
or breaks a connection with a fixed contact. When the current to the coil is switched
off, the armature is returned by a force approximately half as strong as the magnetic
force to its relaxed position. Usually this is a spring, but gravity is also used
commonly in industrial motor starters. Most relays are manufactured to operate
quickly. In a low voltage application, this is to reduce noise. In a high voltage or high
current application, this is to reduce arcing.

Fig.5.15: Circuit symbol of a relay

5.8 Web camera

5.8.1 Introduction

A webcam is a video camera that feeds or streams its image in real time to or
through a computer to computer network. When "captured" by the computer, the
video stream may be saved, viewed or sent on to other networks via systems such as
the internet, and email as an attachment. When sent to a remote location, the video
stream may be saved, viewed or on sent there. Unlike an IP camera (which connects
using Ethernet or Wi-Fi), a webcam is generally connected by a USB cable, or similar
cable, or built into computer hardware, such as laptops.

Webcams typically include a lens, an image sensor, support electronics, and

may also include a microphone for sound. Various lenses are available, the most
common in consumer-grade webcams being a plastic lens that can be screwed in and
out to focus the camera. Fixed focus lenses, which have no provision for adjustment,
are also available. As a camera system's depth of field is greater for small image
formats and is greater for lenses with a large f-number (small aperture), the systems

39
used in webcams have a sufficiently large depth of field that the use of a fixed focus
lens does not impact image sharpness to a great extent.

Fig.5.16: Web Camera

Image sensors can be CMOS or CCD, the former being dominant for low-cost
cameras, but CCD cameras do not necessarily outperform CMOS-based cameras in
the low cost price range. Most consumer webcams are capable of providing VGA
resolution video at a frame rate of 30 frames per second. Many newer devices can
produce video in multi-megapixel resolutions, and a few can run at high frame rates
such as the PlayStation Eye, which can produce 320×240 video at 120 frames per
second.

Support electronics read the image from the sensor and transmit it to the host
computer. The camera pictured to the right, for example, uses a Sonix SN9C101 to
transmit its image over USB. Typically, each frame is transmitted uncompressed in
RGB or YUV or compressed as JPEG. Some cameras, such as mobile phone cameras,
use a CMOS sensor with supporting electronics "on die", i.e. the sensor and the
support electronics are built on a single silicon chip to save space and manufacturing
costs. Most webcams feature built-in microphones to make video calling and
videoconferencing more convenient.

The most popular use of webcams is the establishment of video links,

permitting computers to act as videophones or videoconference stations. Other
popular uses include security surveillance, computer vision, video broadcasting, and
for recording social videos.

40
5.9 PIR sensor

Passive Infrareds sensors (PIRs) are electronic devices which are used in some
security alarm systems to detect motion of an infrared emitting source, usually a
human [Link] pyro electric sensor is made of a crystalline material that generates a
surface electric charge when exposed to heat in the form of infrared radiation. When
the amount of radiation striking the crystal changes, the amount of charge also
changes and can then be measured with a sensitive FET device built into the sensor.
This radiation (energy) is invisible to the human eye but can be detected by electronic
devices designed for such a purposeThe actual sensor on the chip is made from
natural or artificial pyroelectric materials usually in the form of a thin film, out of
gallium nitride gallium nitride (GaN) caesium nitrate (CsNO 3) polyvinyl fluorides
derivatives of phenylpyrazine cobalt phthalocyanine Lithium tantalate (LiTaO 3) is a
crystal exhibiting both piezoelectric and pyroelectric properties

Fig.5.17:Block Diagram of PIR Sensor

Block process:

The PIR325 sensor has two sensing elements connected in a voltage bucking
configuration. This arrangement cancels signals caused by vibration, temperature
changes and sunlight. A body passing in front of the sensor will activate first one and
then the other element whereas other sources will affect both elements simultaneously
and be cancelled. The radiation source must pass across the sensor in a horizontal
direction when sensor pins 1 and 2 are on a horizontal plane so that the elements are
sequentially exposed to the IR source. A focusing device is usually used in front of
the sensor.

41
Operating principles

All objects with a temperature above absolute zero emit heat energy in the
form of radiation. Usually this radiation is invisible to the human eye because it
radiates at infrared wavelengths, but it can be detected by electronic devices designed
for such a purpose.

The term passive in this instance refers to the fact that PIR devices do not
generate or radiate any energy for detection purposes. They work entirely by detecting
the energy given off by other objects. PIR sensors don't detect or measure "heat";
instead they detect the infrared radiation emitted or reflected from an object

Operation

An individual PIR sensor detects changes in the amount of infrared radiation

impinging upon it, which varies depending on the temperature and surface
characteristics of the objects in front of the [Link] an object, such as a human,
passes in front of the background, such as a wall, the temperature at that point in the
sensor's field of view will rise from room temperature to body temperature, and then
back again. The sensor converts the resulting change in the incoming infrared
radiation into a change in the output voltage, and this triggers the detection. Moving
objects of similar temperature to the background but different surface characteristics
may also have a different infrared emission pattern, and thus sometimes trigger the
detector. PIRs come in many configurations for a wide variety of applications.

The most common models have numerous mirror segments, an effective range
of about ten meters (thirty feet), and a field of view less than 180 degrees. Models
with wider fields of view, including 360 degrees, are available—typically designed to
mount on a ceiling. Some larger PIRs are made with single segment mirrors and can
sense changes in infrared energy over one hundred feet away from the PIR

42
 SOFTWARE TOOLS

6.1 Overview of keil C

Keil software is the leading vendor for 8/16-bit development tools (ranked at
first position in the 2004 embedded market study of the embedded system and EE
times magazine).Keil software is represented world wide in more than 40 countries,
since the market introduction in 1988; the keil compiler is the de facto industry
standard and supports more than 500 current arm device variants. Now, keil software
offers development tools for ARM.

Keil software makes C compilers, macro assemblers, real-time kernels,

debuggers, simulators, integrated environments, and evaluation boards for ARM,
251, ARM and XC16x/C16x/ST10 Microprocessor [Link] arm Compiler allows
you to write ARM Microprocessor applications in C that, once compiled, have the
efficiency and speed of assembly language. Language extensions in the arm Compiler
give you full access to all resources of the arm.

There are several tasks involved in creating a new embedded project:

 Creating a Project File
 Using the Project Windows
 Creating Source Files
 Adding Source Files to the Project
 Using Targets, Groups, and Files
 Setting Target Options, Groups Options, and File Options
 Configuring the Startup Code
 Building the Project
 Creating a HEX File

43
 Screen.6.1 : Program window of Keil compiler

SIGNIFICANCE

• Nine basic data types, including 32-bit IEEE floating-point,

• Flexible variable allocation with bit, data, bdata, idata, xdata, and pdata memory
types,
• Interrupt functions may be written in C,
• Full use of the arm register banks,
• Complete symbol and type information for source-level debugging,
• Use of AJMP and ACALL instructions,
• Bit-addressable data objects,

6.2 Flash magic

Flash magic can control the entry into ISP mode of some Microprocessor
devices by using the COM port handshaking signals to control the device. In most of
the cases typically the handshaking signals are used to control such pins as
Reset, PSEN and VCC. The exact pins used depend on the specific device.

When this feature is supported, Flash Magic will automatically place the
device into ISP mode at the beginning of an ISP operation. Flash Magic will then

44
automatically cause the device to execute code at the end of the ISP operation.
Straightforward and intuitive user interface

Steps to do program:

The following are the simple steps to erasing and programming a device and
setting any options desired

 Programs Intel Hex Files

 Automatic verifying after programming
 Fills unused Flash to increase firmware security
 Ability to automatically program checksums. Using the supplied checksum
calculation routine your firmware can easily verify the integrity of a Flash
block, ensuring no unauthorized or corrupted code can ever be executed
 Program security bits
 Check which Flash blocks are blank or in use with the ability to easily erase
all blocks in use
 Read the device signature
 Read any section of Flash and save as an Intel Hex File

Screen.6.2: Programmer window of Flash magic

45
6.3 ORCAD

OrCAD is a proprietary software tool suite used primarily for electronic

design automation (EDA). The software is used mainly by electronic design
engineers and electronic technicians to create electronic schematics and electronic
prints for manufacturing printed circuit boards.

The name OrCAD is a portmanteau, reflecting the company and its software's
origins: Oregon + CAD.

6.3.1 Capture:

 OrCAD Capture is a schematic capture application, and part of the OrCAD

circuit design suite.
 Unlike NI Multisim, Capture does not contain in-built simulation features,
but exports netlist data to the simulator, Orcad EE. Capture can also export a
hardware description of the circuit schematic to Verilog or VHDL, and
netlists to circuit board designers such as OrCAD Layout, Allegro, and
others.
 Capture includes a component information system (CIS), that links
component package footprint data or simulation behavior data, with the
circuit symbol in the schematic.
 Capture includes a TCL/TK scripting functionality that allows users to write
scripts that allow customization and automation. Any task performed via the
GUI may be automated by scripts.
 The OrCAD Capture Marketplace enables customers to share and sell add-
ons and design resources. Such add-ons can customize the design
environment and add features and capabilities.
 Capture can interface with any database which complies
with Microsoft's ODBC standard etc. Data in an MRP, ERP, or PDM system
can be directly accessed for use during component decision-making process.

46
 Screen.6.3: OrCAD Capture window
6.3.2 PCB Design:
 OrCAD PCB Designer is a printed circuit board designer application, and
part of the OrCAD circuit design suite. The PCB designer includes various
automation features for PCB design, board-level analysis and design rule
checks (DRC).
 PCB design may be accomplished by manually tracing PCB tracks, or using
the Auto-Router provided. Such designs may include curved PCB tracks,
geometric shapes, and ground planes.
 The PCB designer integrates with OrCAD Capture, using the component
information system (CIS) to store information about a certain circuit symbol
and its matching PCB footprint.

Screen 6.4: OrCAD PCB Designer window

47
6.4 MATLAB

MATLAB (matrix laboratory) is a mult-paradigm numerical computing

environment and fourth-generation programming language. A proprietary
programming language developed by Math works, MATLAB allows matrix
manipulations, plotting of functions and data, implementation of algorithms, creation
of user interfaces, and interfacing with programs written in other languages,
including C, C++, Java, Fortran and Python. Although MATLAB is intended
primarily for numerical computing, an additional package, Simulink, adds graphical
multi-domain simulation and model-based design for dynamic and embedded
systems.

MATLAB is a high-performance language for technical computing. It

integrates computation, visualization, and programming in an easy-to-use
environment where problems and solutions are expressed in familiar mathematical
notation. Typical uses include

• Math and computation

• Algorithm development
• Data acquisition
• Modeling, simulation, and prototyping
• Data analysis, exploration, and visualization
• Scientific and engineering graphics
• Application development, including graphical user interface
building
MATLAB has evolved over a period of years with input from many users. In
university environments, it is the standard instructional tool for introductory and
advanced courses in mathematics, engineering, and science. In industry, MATLAB is
the tool of choice for high-productivity research, development, and analysis.

48
 MATLAB features a family of add-on application-specific solutions called
toolboxes. Very important to most uses of MATLAB, toolboxes allow you to learn
and apply specialized technology. Toolboxes are comprehensive collections of
MATLAB functions (M – files) that extend the MATLAB environment to solve
particular classes of problems. Areas in which toolboxes are available include signal
processing, control systems, neural networks, fuzzy logic, wavelets, simulation, and
many others.

MAT LAB system:

The MATLAB system consists of five main parts

 Development Environment:

This is the set of tools and facilities that help you use MATLAB functions and
files. Many of these tools are graphical user interfaces. It includes the MATLAB
desktop and command window, a command history, an editor and debugger, and
browsers for viewing help, the workspace, files, and the search path.

 The MATLAB Mathematical Function Library:

This is a vast collection of computational algorithms ranging from elementary

functions, like sum, sine, cosine, and complex arithmetic, to more sophisticated
functions like matrix inverse, matrix Eigen values, Bessel functions, and fast Fourier
transforms.

 The MATLAB Language:

This is a high-level matrix/array language with control flow statements,

functions, data structures, input/output, and object-oriented programming features. It
allows both “programming in the small” to rapidly create quick and dirty throw-away
programs, and “programming in the large” to create large and complex application
programs.

 Graphics:

MATLAB has extensive facilities for displaying vectors and matrices as

graphs, as well as annotating and printing these graphs. It includes high-level
functions for two-dimensional and three-dimensional data visualization, image

49
processing, animation, and presentation graphics. It also includes low-level functions
that allow you to fully customize the appearance of graphics as well as to build
complete graphical user interfaces on your MATLAB applications.

 The MATLAB Application Program Interface (API):

This is a library that allows you to write C and FORTRAN programs that
interact with MATLAB. It includes facilities for calling routines from MATLAB
(dynamic linking), calling MATLAB as a computational engine, and for reading and
writing [Link] toolboxes are there in MATLAB for computing
recognition techniques, but we are using IMAGE PROCESSING toolbox.

GRAPHICAL USER INTERFACE (GUI):

MATLAB’s Graphical User Interface Development Environment (GUIDE)

provides a rich set of tools for incorporating graphical user interfaces (GUIs) in M-
functions. Using GUIDE, the processes of laying out a GUI (i.e., its buttons, pop-up
menus, etc.)and programming the operation of the GUI are divided conveniently into
two easily managed and relatively independent tasks. The resulting graphical M-
function is composed of two identically named (ignoring extensions) files:

 A file with extension .fig, called a FIG-file that contains a complete graphical
description of all the function’s GUI objects or elements and their spatial
arrangement. A FIG-file contains binary data that does not need to be parsed when
he associated GUI-based M-function is executed.

 A file with extension .m, called a GUI M-file, which contains the code that
controls the GUI operation. This file includes functions that are called when the
GUI is launched and exited, and callback functions that are executed when a user
interacts with GUI objects for example, when a button is pushed.

To launch GUIDE from the MATLAB command window, type guide filename
where filename is the name of an existing FIG-file on the current path. If filename is
omitted, GUIDE opens a new (i.e., blank) window.

50
 Screen.6.5:GUI Window

A graphical user interface (GUI) is a graphical display in one or more

windows containing controls, called components that enable a user to perform
interactive tasks. The user of the GUI does not have to create a script or type
commands at the command line to accomplish the tasks. Unlike coding programs to
accomplish tasks, the user of a GUI need not understand the details of how the tasks
are performed.

GUI components can include menus, toolbars, push buttons, radio buttons, list
boxes, and sliders just to name a few. GUIs created using MATLAB tools can also
perform any type of computation, read and write data files, communicate with other
GUIs, and display data as tables or as plots.

51
 PSEUDO CODE

MATLAB CODE:

function varargout = naveen_main1(varargin)

gui_Singleton = 1;
gui_State = struct('gui_Name', mfilename, ...
'gui_Singleton', gui_Singleton, ...
'gui_OpeningFcn', @naveen_main1_OpeningFcn, ...
'gui_OutputFcn', @naveen_main1_OutputFcn, ...
'gui_LayoutFcn', [] , ...
'gui_Callback', []);
if nargin && ischar(varargin{1})
gui_State.gui_Callback = str2func(varargin{1});
end

if nargout
[varargout{1:nargout}] = gui_mainfcn(gui_State, varargin{:});
else
gui_mainfcn(gui_State, varargin{:});
end

function naveen_main1_OpeningFcn(hObject, eventdata, handles, varargin)

[Link] = hObject;
a = ones(256,256);
axes(handles.axes1);
imshow(a);
axes(handles.axes2);
imshow(a);

guidata(hObject, handles);

function varargout = naveen_main1_OutputFcn(hObject, eventdata, handles)

varargout{1} = [Link];

function pushbutton1_Callback(hObject, eventdata, handles)

clc
workspace

imaqhwinfo;
info = imaqhwinfo('winvideo',1)
celldisp([Link])
vid=videoinput('winvideo',1,'YUY2_640x480');
set(vid,'ReturnedColorSpace','rgb');

preview(vid);
pause;

52
 data=getsnapshot(vid);
axes(handles.axes1);
imshow(data);
X = data;
im =X;
data = imresize(data,[128 128]);
imwrite(data,'[Link]');
imwrite(data,'[Link]')

% cd 'template'
% imwrite(data,'[Link]');
% imwrite(data,'[Link]')
%
% cd ..
%m = imresize(X,0.3);
% X2 =m;
if isrgb(X)
X = rgb2gray(X);

X = X;
% X = imresize(X1,0.3);
X2 =uint8(X);
X2 = histeq(X2);
end

closepreview(vid)
handles.X = X;
handles.X2 = X2;
guidata(hObject, handles);

function pushbutton2_Callback(hObject, eventdata, handles)

X = handles.X2;
imshow(X);

nn =9;
alfa =2;
sigma =1;
y1 = weberlaw(nn,alfa,sigma,X);
axes(handles.axes2);
imshow(y1);
handles.y1 = y1;
guidata(hObject, handles);
function pushbutton3_Callback(hObject, eventdata, handles)
temp = [];
y1 = handles.y1;
features12 = [];
sample =10;
for k = 1 : 1
k1 = int2str(k);
k2 = strcat(k1,'.bmp');
I = imread(k2);
nn =9;
alfa =2;
sigma =1;
I = histeq(I);

53
 y = weberlaw(nn,alfa,sigma,I);
axes(handles.axes2);
imshow(y);
I = y1;
figure
imshow(I);

T = y;
figure
imshow(T);
[r1 c1] = size(I);
image22=T-mean(mean(T));
[r c] = size(T);
dd1=corr2(I,T)
% for i=1:1:r1-r+1
% for j=1:1:c1-c+1
% f = I(i:i+r-1,j:j+c-1,:);
% t = T(:,:,:);
% C = corr2(t, f);
%
% f = max(max(C));
%
% dd(i,j) = f;
%
% end
% end
% dd1 = max(max(dd))
mm = 0.2
if dd1 > mm
warndlg('Autherised');
s='A'
s1=serial('COM5','BaudRate',9600);
fopen(s1);
fwrite(s1,s);
fclose(s1);
delete(s1);
allot='5 seconds';
else
warndlg(' Not Autherised');
s='B'
s1=serial('COM5','BaudRate',9600);
fopen(s1);
fwrite(s1,s);
fclose(s1);
delete(s1);
allot='5 seconds';
open('unauthorise4exe - [Link]');
end
handles.dd1 =dd1;
[Link] = mm;
mk = imread('[Link]');
axes(handles.axes2);
imshow(mk);
end
guidata(hObject, handles);

54
function pushbutton4_Callback(hObject, eventdata, handles)
clc
train

KEIL CODE:

//---------------------------//
//***********INCLUDES********//
//---------------------------//
#include <LPC214X.H>

#include "UART_ARM.H"
#include "LCD.H"
#include "ADC_ARM.H"
#include "Utility.h"

//------------------------------------//
//***********Macros Definition********//
//------------------------------------//

//---------------------------------------//
//***********ISR Fn Declaration *********//
//---------------------------------------//
void T1isr(void)__irq;

void UART0_ISR (void)__irq;

void UART1_ISR (void)__irq;
void UART0_Intrpt(void);
void UART1_Intrpt(void);

void delay(unsigned int n)

{
int i,j;
for(i=0;i<n;i++)
{
for(j=0;j<0x2700;j++)
{;}
}
}
//---------------------------------------//
//************ UART0 Intrpt *************//
//---------------------------------------//
void UART0_Intrpt(void)
{

U0IER = 0;

VICIntSelect = 0<<6; //UART0 ('0' - irq

'1'-fiq)
VICVectCntl6 = 0x020 | 6; //VIC slot enabled
VICVectAddr6 = (unsigned long)UART0_ISR; //pass address of UART0
VICIntEnable = 1 << 6; //Enable UART0
Interrupt

55
}

//-------------------------------------//
//***********GPIO Initialize Fn *******//

//-------------------------------------//
void INIT_GPIO(void)
{

IODIR1 &= ~(0xF<<16); //configure p1.16 - p1.19

as input
IODIR1 |= (0xF<<28); //configure p1.28 - p1.31 as output
IODIR1 |= (0xF<<24); //configure p1.24 - p1.27 as output

//-------------------------------------//
//***********LCD Initialize Fn ********//
//-------------------------------------//
void LCD_START(void)
{
LCD_CONFIG(&IOPIN0,20,&IOPIN1,20);
LCD_INIT();
LCD_CLEAR();
LCD_PUTS(" HOME SECURITY ", 1, 1);
delay_Nx10cyc(5999999);
LCD_PUTS("PASS:", 2, 1);
}

//--------------------------//
//***********Fn Main********//
//--------------------------//
void main (void)
{
unsigned char PASS[4];
unsigned int i=0;
PINSEL0 = 0;
PINSEL1 = 0;
PINSEL2 &= 0x00000000;
VPBDIV = 0x02;

UART0_INIT(9600);
UART1_INIT(9600);
UART0_Intrpt();
UART0_PUTC('K');
UART1_PUTC('K');
IODIR0 = (1<<15);
IODIR1 |= ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28));
// IODIR1 &= ~(0X0F << 16);

56
 IODIR1 &= ~((1<<16)|(1<<17)|(1<<18)|(1<<19)|(1<<27));
LCD_START();

//INIT_GPIO();
//INIT_ADC0(CHANNEL1 | CHANNEL2);

Enable_U0IER();

IOSET1 = (1<<30)|(1<<29)|(1<<28);
while (1)
{

if(!(IOPIN1 & (1 << 16)))

{
PASS[i]='1';
UART0_PUTC('A');
LCD_PUTS("*", 2, 5+i);
i=i+1;
while(!(IOPIN1 & (1 << 16)));
delay_Nx10cyc(5999999);
}
if(!(IOPIN1 & (1 << 17)))
{
PASS[i]='2';
UART0_PUTC('B');
LCD_PUTS("*", 2, 5+i);
i=i+1;
while(!(IOPIN1 & (1 << 17)));
delay_Nx10cyc(5999999);
}
if(!(IOPIN1 & (1 << 18)))
{
PASS[i]='3';
UART0_PUTC('C');
LCD_PUTS("*", 2, 5+i);
i=i+1;
while(!(IOPIN1 & (1 << 18)));
delay_Nx10cyc(5999999);
}
if(!(IOPIN1 & (1 << 19)))
{
PASS[i]='4';
UART0_PUTC('D');
LCD_PUTS("*", 2, 5+i);
i=i+1;
while(!(IOPIN1 & (1 << 19)));
delay_Nx10cyc(5999999);
}
if(!(IOPIN1 & (1 << 27)))
{
if((PASS[0] == '1') && (PASS[1] == '1') && (PASS[2] == '1') &&
(PASS[3] == '1'))
{
LCD_PUTS("matchin", 2, 9);

57
 UART0_PUTC('S');
IOSET1 = (1 << 31);
IOCLR1 = (1 << 28);
delay_Nx10cyc(5999999);
IOSET1 = (1 << 28);
}
else
{
LCD_PUTS(" alert!!", 2, 5);
UART0_PUTC('N');
IOCLR1 = (1 << 31);
UART1_PUTS("AT+CMGS=\"+918185000774\"\
r"); // UART1_PutS ("AT+CMGS=\"08500006854\"\r"); //COVAI
delay(1000);
UART1_PUTS("UNAUTHORIZED
PERSON, SIGN MISSMATCH");// UART1_PutS ("\nLattitude: ");
delay(1000);
UART1_PUTC (0x1A);
delay(1000);
IOSET1 = (1 << 31);
}
i=0;
while(!(IOPIN1 & (1 << 27)));
delay_Nx10cyc(5999999);
}

//---------------------------------------//
//************* UART0 ISR ***************//
//---------------------------------------//

void UART0_ISR (void)__irq

{

char Msg,ch;
if(((Msg = U0IIR) & 0x01) == 0) //Check
Flag Status of Recieve Interrupt
{
ch = U0RBR;
switch(ch)
{

case 'A' : LCD_PUTS(" AUTHORIZED ", 1, 1);

UART0_PUTC('Z');
IOSET1 = (1 << 31);
IOCLR1 = (1 << 30);
delay_Nx10cyc(5999999);
IOSET1 = (1 << 30);
break;

case 'B' : LCD_PUTS(" UN AUTHORIZED", 1, 1);

58
 UART0_PUTC('X');
IOCLR1 = (1 << 31);
IOCLR1 = (1 << 29);

UART1_PUTS("AT+CMGS=\"+918185000774\"\r"); // UART1_PutS
("AT+CMGS=\"08500006854\"\r"); //COVAI
delay(1000);
UART1_PUTS("UNAUTHORIZED
PERSON, SIGN MISSMATCH");// UART1_PutS ("\nLattitude: ");
delay(1000);
UART1_PUTC (0x1A);
delay(1000);
IOSET1 = (1 << 29);
break;

}
VICVectAddr = 6;

**************************//////////*****************************

59
 RESULTS

The project was motivated by the fact that the signature is widely used as a
means of personal identification tool for humans, this led to the need for an automatic
verification system. A method proposed to develop an authentication system based on
personal signatures where the user signature is compared with the database signature
and the authenticated persons are allowed for banking procedure. The user get the
message alert for the unauthorized usage to access the user account.

Screen.8.1:Matching of input signature with database signature

Screen.8.2: Signature authorized

60
 CONCLUSION AND SCOPE OF THE FUTURE WORK

CONCLUSION

The signature of a person is an important attribute of a human being which can

be used to authenticate human identity. As signatures continue to play a very
important role in financial, commercial and legal transactions, truly secured
authentication becomes more and more crucial. So, a signature verification process is
discussed in this project work. Here the user signature is compared with the database
signature using MATLAB. If the signature is matched transaction process will be
completed. On other case , this will be considered as unauthorized. This study aims to
reduce to a minimum the cases of forgery in business transactions and can prevent all
the illegal activities. As the verification is done automatically, this technique is very
effective.

SCOPE OF THE FUTURE WORK

Handwritten signature is one of the most widely accepted personal attributes

for identity verification of the person. The written signature is regarded as the primary
means of identifying the signer of a written document .In the signature verification
process, the user signature is compared with the database signature using MATLAB
for matching. In future, Verification ability of the system can also be increased by
using Brain signal based password that can be used to provide the security and Cloud
communication can also be proposed. This development can provide efficient and
huge potential in future.

61
 REFERENCES

[1] H. Feng and C. C. Wah, “Online signature verification employing a new extreme
points warp technique,” Pattern Recognit. Lett., vol. 24, no. 16, pp. 2943–2951, 2003.

[2] J. Galbally, M. Martinez-Diaz, and J. Fierrez, “Aging in biometrics: associate

degree experimental analysis on on-line signature,” PLOS ONE, vol. 8, no. 7, p.
e69897, 2013.

[3] E. Maiorana, P. Campisi, J. Fierrez, J. Ortega-Garcia, and A. Neri, “Cancelable

templates for sequence-based biometry with application to on-line biometric
identification,” IEEE Trans. Syst., Man, Cybern. A, Syst., Humans, vol. 40, no. 3, pp.
525–538, May 2010.

[4] Ramachandra A C, Pavithra K, Yashasvini K, Raja K B, Venugopal K R and

Patnaik L M. 2008. Cross-Validation for Graph Matching based Offline Signature
Verification. India Conference INDICON 2008

[5] L. Nanni, “An advanced multi-matcher methodology for on-line signature

verification that includes world options and tokenised random numbers,”
Neurocomputing, vol. 69, nos. 16–18, pp. 2402–2406, 2006.

[6] L. G. Plamondon and R. Plamondon, “Automatic signature verification and writer

identification—The state of the art,” Pattern Recognit., vol. 22, no. 2, pp. 107–131,
1989.
[7]W. Nelson, W. Turin, and T. Hastie, “Statistical methods for on-line signature
verification,” Int. J. Pattern Recognit. Artif. Intell., vol. 8, no. 3, pp. 749–770, 1994.
[8] Özgündüz E, Şentürk T and M. Karslıgil E. 2005. Offline Signature Verification
and Recognition by Support Vector Machine, Eusipco-2005, 4-8 September, 2005,
Antalya, Turkey, pp. 113-116

[9]L. L. Lee , T. Berger and E. Aviczer "Reliable on-line signature verification

systems", IEEE. Trans. Pattern Anal. Mach. Intell., vol. 18, no. 6, pp.643 -647
1996.
[10] Baltzakis H and Papamarkos N. 2001. A new signature verification technique
based on a two-staged neural network classifier. Engineering Applications of
Artificial Intelligence 14 (2001) (pp 95-103)

62
[11]W. Nelson , W. Turin and T. Hastie "Statistical methods for on-line signature
verification", Int. J. Pattern Recognit. Artific. Intell., vol. 8, pp.749 -770 1994
[12]Y. Mizukami , M. Yoshimura , H. Miike and I. Yoshimura "An off-line signature
verification system using and extracted displacement function", Pattern Recognit.
Lett., vol. 23, pp.1569 -1577 2002
[13]T. Qu , A. E. Saddik and A. Adler "A stroke based algorithm for dynamic
signature verification", Proc. Canad. Conf. Electrical and Computer Engineering,
vol. 1, pp.461 -464 2004
[14]S. Agarwal and V. Kumar "Online character recognition", Proc. 3rd Int. Conf.
Information Technology and Applications, vol. 1, pp.698 -703 2005.
[15]T. Hastie , E. Kishon , M. Clark and J. Fan "A model for signature
verification", Proc. IEEE Int. Conf. Systems, Man, Cybernetics, vol. 1, pp.600 -604
199
[16]R. Plamondon and S. N. Srihari "Online and off-line handwriting recognition: A
comprehensive survey", IEEE. Trans. Pattern Anal. Mach. Intell., vol. 22, no. 1,
pp.63 -84 2000
[17]G. Dimauro , S. Impedovo , M. G. Luccchese , R. Modugno and G. Pirlo "Recent
advancement in automatic signature verification", Proc. 9th IEEE Int. Workshop on
Frontiers in Handwriting Recognition, pp.179 -184 2004
[18]R. Plamondon , P. Yergeau and J. J. Brault "A multi-level signature verification
system", From Pixels to Features III—Frontiers in Handwriting Recognition, pp.363
-370 1992
[19]F. Alonso-Fernandez , J. Fierrez-Aguilar , F. Del-Valle and J. Ortega-Garcia
"On-line signature verification using tablet pc", Proc. 4th Int. Symp. Image and
Signal Processing and Analysis, pp.245 -250 2005
[20]]J. B. Fasquel and M. Bruynooghe. 2004. A hybrid opto-electronic method for
fast off-line handwritten signature verification. International Journal on Document
Analysis and Recognition (2004)
[21]Ahmad S M S, Shakil A, Faudzi M A, Anwar R M and Balbed M A M. 2009. A
Hybrid Statistical Modeling, Normalization and Inferencing Techniques of an Off-line
Signature Verification System. 2009 World Congress on Computer Science and
Information Engineering
[22]Bansal A, Garg D, and Gupta A. 2008. A Pattern Matching Classifier for Offline
Signature Verification. First International Conference on Emerging Trends in
Engineering and Technology (IEEE Computer Society)
[23]Fang B, Wang Y Y, Leung C H, Tang Y Y, Kwok P C K, Tse K W and Wong Y

63
K. 1999. A Smoothness Index Based Approach for Off-line Signature Verification.
Proceedings of the Fifth International Conference on Document Analysis and
Recognition ICDAR‟99
[24]Samuel D and Samuel I. 2010. Novel Feature Extraction Technique for Offline
Signature Verification System. International Journal of Engineering Science and
TechnologyVol. 2(7), 2010, (pp 3137-3143)
[25]Fakhlai M, Pourreza H. 2008. Off line Signature Recognition Based on Wavelet,
Curvelet and Contourlet Transforms. 8th WSEAS International Conference on Signal
Processing and Computational Geometry and Artificial Vision (ISCGAV‟08),
Rhodes, Greece, August 20-22, 2008
[26]Miguel A. Ferrer, Jesu´s B. Alonso and Carlos M. Travieso. 2005. Offline
Geometric Parameters for Automatic Signature Verification Using Fixed-Point

[27]Abdala M. A. and Yousif N. A. 2009 Offline Signature Recognition and

Verification Based on Artificial Neural Network Eng & Tech. Journal, Vol.27, No.7,
2009
[28]Bharadi V A and Kekre H B. 2010. Off-Line Signature Recognition Systems.
2010 International Journal of Computer Applications Volume 1, No. 27, (pp 0975 -
8887)
[29]Prakash H N and Guru D S. 2010. Offline Signature Verification - An Approach
Based on Score Level Fusion. 2010 International Journal of Computer Applications
Volume 1, No. 18, (pp 0975 - 8887)
[30]Hanmandlu M, Hafizuddin M. Yusof M. and Madasu V 2005. Off-line signature
verification and forgery detection using fuzzy modeling. Pattern Recognition 38
(2005) (pp 341 – 356)
[31]Hai Rong Lv, Wen Jun Yin and Jin Dong. 2009. Offline Signature Verification
based on Deformable Grid Partition and Hidden Markov Models. IEEE International
Conference on Multimedia and Expo ICME 2009, New York
[32]Vargas J. F., Ferrer M. A., Travieso C. M. and Alonso J. 2011. Off-line signature
verification based on grey level information using texture features. Pattern
Recognition 44 (2011) (pp 375–385)
[33]Armand S, Blumenstein M and Muthukkumarasamy V. 2006. Off-line Signature
Verification based on the Modified Direction Feature. The 18th IEEE International
Conference on Pattern Recognition (ICPR'06)
[34]DAŞ M T and DÜLGER L C. 2007. Off-Line Signature Verification with NN
algorithm. 22nd International Symposium on Computer and Information Sciences
2007, ISCIS 2007, Ankara.
[35]Basavaraj L and Sudhaker Samuel R D. 2009. Offline-line Signature Verification
and Recognition - An Approach Based on Four Speed Stroke Angle. International
Journal of Recent Trends in Engineering, Vol 2, No. 3, November 2009
[36]Bertolini D, Oliveira L S, Justino E and Sabourin R. 2010. Reducing forgeries in
writer-independent off-line signature verification through ensemble of classifiers.
Pattern Recognition 43 (2010), (pp 387 – 396)

64
65
.

66