UNIT-I

THE 8086 MICROPROCESSOR

Title Contents
Unit-I Contents Introduction to 8086
Microprocessor
architecture Addressing
modes
Instruction set and assembler
directives Assembly language
programming Modular
Programming
Linking and Relocation
Stacks
Procedures
Macros
Interrupts and interrupt service
routines Byte and String
Manipulation.
Text books: 1. Yu-Cheng Liu, Glenn [Link],
“Microcomputer Systems: The 8086 /
8088 Family - Architecture,
Programming and Design”, Second
Edition, Prentice Hall of India, 2007.
2. Mohamed Ali Mazidi, Janice
GillispieMazidi, RolinMcKinlay, “The
8051 Microcontroller and Embedded
Systems:
Using Assembly and C”, Second
Reference books: 1. Doughlas [Link],
“Microprocessors and Interfacing,
Programming and Hardware”,
TMH,2012
2. [Link] and
D.A Godse
Microprocessor and Micrcontrollers”,
Technical Publications.

Prepared By Verified By
1
[Link] kanna T [Link]/ ECE
[Link] [Link]/ ECE

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 UNIT I
THE 8086 MICROPROCESSOR
Syllabus:

Introduction to 8086 – Microprocessor architecture – Addressing modes - Instruction

set and assembler directives – Assembly language programming – Modular
Programming - Linking and Relocation - Stacks - Procedures – Macros – Interrupts
and interrupt service routines – Byte and String Manipulation.

Microcomputer:
The term microcomputer is generally synonymous with personal computer, or a
computer that depends on a microprocessor.
Microcomputers are designed to be used by individuals, whether in the form
of PCs, workstations or notebook computers.
A microcomputer contains a CPU on a microchip (the microprocessor), a
memory system (typically ROM and RAM), a bus system and I/O ports, typically
housed in a motherboard.
Microprocessor:
A silicon chip that contains a CPU. In the world of personal computers,
the terms
microprocessor and CPU are used interchangeably.
A microprocessor (sometimes abbreviated μP) is a digital electronic
component with miniaturized transistors on a single semiconductor integrated
circuit (IC).
One or more microprocessors typically serve as a central processing unit
(CPU) in a computer system or handheld device.
Microprocessors made possible the advent of the microcomputer.
At the heart of all personal computers and most working stations sits a
microprocessor. Microprocessors also control the logic of almost all digital
devices, from clock radios to fuel-injection systems for automobiles.
Three basic characteristics differentiate microprocessors:
 Instruction set: The set of instructions that the microprocessor can
execute.
 Bandwidth: The number of bits processed in a single instruction.
 Clock speed: Given in megahertz (MHz), the clock speed determines
how many instructions per second the processor can execute.

In both cases, the higher the value, the more powerful the CPU. For example, a
32 bit microprocessor that runs at 50MHz is more powerful than a 16-bit
microprocessor that runs at 25MHz.
In addition to bandwidth and clock speed, microprocessors are classified as
being either RISC (reduced instruction set computer) or CISC (complex
instruction set computer).
Supercomputer:
A supercomputer is a computer that performs at or near the currently highest
operational rate for computers.
A supercomputer is typically used for scientific and engineering applications
that must handle very large databases or do a great amount of computation (or
both).
At any given time, there are usually a few well-publicized supercomputers that
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 operate at the very latest and always incredible speeds.
The term is also sometimes applied to far slower (but still impressively fast)
computers. Most supercomputers are really multiple computers that perform
parallel processing.
In general, there are two parallel processing approaches: symmetric
multiprocessing (SMP) and massively parallel processing (MPP).
Microcontroller:
A highly integrated chip that contains all the components comprising a
controller. Typically this includes a CPU, RAM, some form of ROM, I/O
ports, and timers.

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 Unlike a general-purpose computer, which also includes all of these
components, a microcontroller is designed for a very specific task - to control
a particular system.
A microcontroller differs from a microprocessor, which is a general-purpose
chip that is used to create a multi-function computer or device and requires
multiple chips to handle various tasks.
A microcontroller is meant to be more self-contained and independent, and
functions as a tiny, dedicated computer.
They are typically designed using CMOS (complementary metal oxide
semiconductor) technology, an efficient fabrication technique that uses less
power and is more immune to power spikes than other techniques.
Microcontrollers are sometimes called embedded microcontrollers
The main Difference between microprocessor and micro controller is
Microprocessor Micro Controller

It is a CPU It is a single chip

A microprocessor generally does A microcontroller is 'all in one',
not have Ram, ROM and IO pins. the processor, ram, IO all on the
one chip
Microprocessor contains ALU Micro Controller contains MP
control unit different register memory
And interrupt circuit ,i/o Interfacing circuit and
peripheral devices such as A/D
converter serial I/O
timer
It has one or two bit It has many bit handling instruction
handling instruction
It has capable of being built into It is usually used for more
bigger general purpose dedicated applications.
applications than a
microcontroller
Table 1.1 Difference between microprocessor and micro controller
The microprocessor used in some applications such as,
i. For measurements, display and control of current, voltage, temperature,
pressure, etc.
ii. For traffic control and industrial tool control.
[Link] speed control of machines

1.1 INTRODUCTION TO 8086

1.1.1 Features:
Intel 8086 was launched in 1978.
It was the first 16-bit microprocessor.
This microprocessor had major improvement over the execution
speed of 8085. It is available as 40-pin Dual-Inline-Package (DIP).
It is available in three versions:
a. 8086 (5 MHz)
b. 8086-2 (8 MHz)
c. 8086-1 (10 MHz)
.It consists of 29,000 transistors.
The 8086 is 16 bit microprocessors. The term “16 bit” means that its
arithmetic logic unit, internal registers and most of its instructions are
designed to work with 16 bit binary words.
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The 8086 has a 16 bit data bus, so it can read data from or write data to
memory and ports either 16bits or 8bits at a time
The 8086 has a 16 bit address bus ,so it can directly access 2 20 or 1048576
memory locations
The 8086 can generate 16bit I/O
address. The 8086provides fourteen
16 bit registers

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 The 8086 has multiplexed address and data bus which reduces the
number of pins. The Intel 8086 supports multiprogramming
Intel 8086 is designed to operate in two modes, namely the minimum node and
maximum node
1.2 ARCHITECTURE OF 8086 MICROPROCESSOR
Intel 8086 is a 16 bit integer processor.
It has 16-bit data bus and 20-bit address bus.
The lower 16- bit address lines and 16-bit data lines are multiplexed
(AD0-AD15). 20-bit address lines are available.
8086 can access up to 220 or 1 Mega byte of physical
memory. The basic architecture of 8086 is shown
below.
The internal architecture of Intel 8086 is divided into two units, viz.,
 Bus Interface Unit (BIU) and
 Execution Unit (EU).
Bus Interface Unit (BIU) and Execution Unit(EU)
The BIU performs all bus operations such as instruction fetching, reading and
writing operands for memory and calculating the addresses of the memory
operands.
The instruction bytes are transferred to the instruction queue.
EU executes instructions from the instruction system byte queue.
Both units operate asynchronously to give the 8086 an overlapping instruction
fetch and execution mechanism which is called as Pipelining. This results in
efficient use of the system bus and system performance.
BIU contains Instruction queue, Segment registers, Instruction pointer, and
Address adder.
EU contains Control circuitry, Instruction decoder, ALU, Pointer and Index
register, Flag register.
1.2.1 BUS INTERFACR UNIT(BIU):
It provides a full 16 bit bidirectional data bus and 20 bit address bus.
The bus interface unit is responsible for performing all external bus
operations. it has the following functions:
Instructions fetch Instruction queuing, Operand fetch and storage, Address
relocation and Bus control.
The BIU uses a mechanism known as an instruction stream queue to
implement pipelinearchitecture.
This queue permits pre fetch of up to six bytes of instruction code. Whenever
the queue of the BIU is not full, it has room for at least two more bytes and
at the same time the EU Is not requesting it to read or write operands from
memory.
The BIU is free to look ahead in the program by prefetching the next
sequential instruction.
These prefetching instructions are held in its FIFO queue. With its 16 bit data
bus, the BIU fetches two instruction bytes in a single memory cycle.
After a byte is loaded at the input end of the queue, it automatically shifts up
through the FIFO to the empty location nearest the output.
The EU accesses the queue from the output end. It reads one instruction byte
after the other from the output of the queue.
If the queue is full and the EU is not requesting access to operand in memory.
These intervals of no bus activity, which may occur between bus cycles, are

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known as
Idle state. The following Figure 1.1 shows 8086 Internal Block Diagram.

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 Figure 1.1 8086 Internal Block Diagram

If the BIU is already in the process of fetching an instruction when the EU

request it to read or write operands from memory or I/O, the BIU first
completes the instruction fetch bus cycle before initiating the operand read /
write cycle.
The BIU also contains a dedicated adder which is used to generate the 20bit
physical address that is output on the address bus.
This address is formed by adding an appended 16 bit segment address and
a 16 bit offset address.
For example:
The physical address of the next instruction to be fetched is formed by
combining the current contents of the code segment CS register and the
current contents of the instruction pointer IP register.
The BIU is also responsible for generating bus control signals such as those for
memory read or write and I/O read or write.
1.2.2 EXECUTION UNIT(EU):
The Execution unit is responsible for decoding and executing all instructions.
•The EU extracts instructions from the top of the queue in the BIU, decodes
them,
Generates operands if necessary, passes them to the BIU and requests it to
perform the read or write by cycles to memory or I/O and perform the
operation specified by the instruction on the operands.
During the execution of the instruction, the EU tests the status and control
flags and updates them based on the results of executing the instruction.
If the queue is empty, the EU waits for the next instruction byte to be fetched

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and shifted to top of the queue.
When the EU executes a branch or jump instruction, it transfers control to
a location corresponding to another set of sequential instructions.
Whenever this happens, the BIU automatically resets the queue and then
begins to fetch instructions from this new location to refill the queue.

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1.2.3 Instruction Queue:
The BIU fetches up to 6 instruction bytes for the following instructions.
TheBIU stores these perfected bytes in first-in-first-out register set called a
queue.
When theEU is ready for its next instruction it simply reads the instruction
byte(s) for the instruction from the queue in the BIU.
This is much faster than sending out an address tothe system memory and
waiting for memory to send back the next instruction byte orbytes.
Except in the case of JMP and CALL instructions, where the queue must
bedumped and then reloaded starting from a new address, this prefetch-and-
queue schemegreatly speeds up processing.
Fetching the next instruction while the current instructionexecutes is called
pipelining.
Pipeline Diagram is follows.

Figure 1.2 Pipelining

1.2.4 Register organization of 8086:

8086 has a powerful set of registers containing general purpose and

specialpurpose registers. All the registers of 8086 are 16-bit registers.
The general purpose registers, can be used either 8-bit registers or 16-bit
registers.
The general purpose registers are either used for holding the data, variables
and intermediate results temporarily or for other purpose like counter or for
storing offset address for some particular addressing modes etc.
The special purpose registers are used as segment registers, pointers, index
registers or as offset storage registers for particular addressing modes.
Fig 1.3 shows register organization of 8086. We will categorize the register set
into four groups as follows:
1.2.5 General purpose registers:

Figure 1.3 Register Organization of 8086

The registers AX, BX, CX, and DX are the general 16-bit registers.
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AX Register:
Accumulator register consists of two 8-bit registers AL and AH, which can be
combined together and used as a 16- bit register AX. AL in this case contains the
low-order byte of the

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word, and AH contains the high-order byte. Accumulator can be used for I/O
operations, rotate and string manipulation.
BX Register:
This register is mainly used as a base register. It holds the starting base
location of a memory region within a data segment. It is used as offset storage for
forming physical address in case of certain addressing mode.
CX Register:
It is used as default counter or count register in case of string and loop
instructions.
DX Register:
Data register can be used as a port number in I/O operations and
implicitoperand or destination in case of few instructions. In integer 32-bit multiply
and divideinstruction the DX register contains high-order word of the initial or
resulting number.
1.2.6 Segment Registers:
To complete 1Mbyte memory is divided into 16 logical
segments. The complete1Mbyte memory segmentation is
as shown in fig 1.5. Each segment contains 64Kbyte
ofmemory.
There are four segment registers such as,
1. Code segment (CS)
2. Stack segment (SS)
3. Data segment (DS)
4. Extra segment (ES)
1. Code segment (CS):
Code segment (CS) is a 16-bit register containing address of 64 KB
segment withprocessor instructions.
The processor uses CS segment for all accesses to instructionsreferenced by
instruction pointer (IP) register.
CS register cannot be changed directly.
The CS register is automaticallyupdated during far jump, far call and
far returninstructions.
It is used for addressing a memory location in the code segment of
thememory, where the executable program is stored.
2. Stack segment (SS):
Stack segment (SS) is a 16-bit register containing address of 64KB segment
withprogram stack.
By default, the processor assumes that all data referenced by the stackpointer
(SP) and base pointer (BP) registers is located in the stack segment.
SS registercan be changed directly using POP
instruction. It is used for addressing stack segment
ofmemory.
The stack segment is that segment of memory, which is used to store stack
data.
3. Data segment (DS):
Data segment (DS) is a 16-bit register containing address of 64KB segment
with program data. By default, the processor assumes that all data referenced
by generalregisters (AX, BX, CX, and DX) and index register (SI, DI) is located
in the data segment.
DS register can be changed directly using POP and LDS
instructions. It points to the datasegment memory where
the data is resided.
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4. Extra segment (ES):
Extra segment (ES) is a 16-bit register containing address of 64KB segment,
usually with program data.
By default, the processor assumes that the DI register references theES
segment in string manipulation instructions.
ES register can be changed directly using POP and LES instructions.

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 Table 1.2 8086 default 16 bit segment and offset address combination
It also refers to segment which essentially is another data segment of
the memory. It also containsdata.

Figure 1.4MemorySegmentation

1.2.7 Pointers and index registers:

The pointers contain within the particular segments.
The pointers IP, BP, SPusually contain offsets within the code, data and stack
segments respectively.
Instruction Pointer (IP):
It is act as a program counter
It points to the address of the next instruction to be executes.
Its contents automatically incremented when the execution of a program
proceeds further The contents of the IP and code segments register are used
to compute the memory address of the instruction code to be fetched.
This is done during the fetch cycle.
Stack Pointer (SP):
Stack Pointer (SP) is a 16-bit register pointing to program stack in stack
segment.
Base Pointer (BP):
Base Pointer (BP) is a 16-bit register pointing to data in stack segment.
BP register isusually used for based, based indexed or register indirect addressing.
Source Index (SI):
Source Index (SI) is a 16-bit register. SI is used for indexed, based indexed and
register indirect addressing.
Destination Index (DI):
Destination Index Data addresses in string manipulation instructions.
Destination Index (DI) is a 16-bit register.
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 DI is used for indexed, based indexed andregister indirect addressing, as
well as a destination data addresses in string manipulationinstructions.
1.2.8 Flag register:

Figure 1.5 Flag Register

Flags Register determines the current state of the processor.

They are modifiedautomatically by CPU after mathematical operations
It allows to determine the type ofthe result, and to determine conditions to
transfer control to other parts of the program.
The 8086 flag register has 9 active flags and they aredivided into two
categories:
1. Conditional Flags
2. Control Flags
1. Conditional Flags:
Conditional flags are as follows:
Carry Flag (CY):
This flag indicates an overflow condition for unsigned integer
arithmetic. It is also used in multiple-precision arithmetic.
Auxiliary Flag (AC):
If an operation performed in ALU generates a carry/barrow from lower
nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7).
The AC flag is set i.e. carry given by D3 bit to D4 is AC
flag. This is not a general-purpose flag.
It is used internally by the Processor to perform Binary to BCD conversion.
Parity Flag (PF):
This flag is used to indicate the parity of result.
If lower order 8-bits ofthe result contains even number of 1‟s.
The Parity Flag is set and for odd number of 1‟s,the Parity flag is reset.
Zero Flag (ZF):
It is set; if the result of arithmetic or logical operation is zero else it isreset.
Sign Flag (SF):
In sign magnitude format the sign of number is indicated by
MSB bit. Ifthe result of operation is negative, sign flag is
set.
2. Control Flags:
Control flags are set or reset deliberately to control the operations of the
execution unit. Control flags are as follows:
Trap Flag (TF):
It is used for single step control.
It allows user to execute one instruction of a program at a time for
debugging. When trap flag is set, program canberun in single step
mode.
Interrupt Flag (IF):
It is an interrupt enable/disable flag.
If it is set, the maskableinterrupt of 8086 is enabled and if it is reset, the
interrupt is disabled.

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 It can be set by executing instruction sit and can be cleared by executing CLI
instruction.
Direction Flag (DF):
It is used in string operation.

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 If it is set, string bytes are accessed from higher memory address to lower
memory address.
When it is reset, the string bytes are accessed from lower memory
address to higher memory address.

1.3 8086 MICROPROCESSOR ADDRESSING MODES

The different ways that processor access data are referred to as
addressing modes. The addressing modes of any processor can be
classified as:
1. Data addressing modes
2. Stack memory addressing modes
3. Program memory addressing modes
1.3.1. DATA ADDRESSING MODES:
The data addressing mode can be further classified as,
1. Addressing modes for accessing immediate and register data (register and
immediate modes)
2. Addressing modes for accessing data in memory(memory modes)
3. Addressing modes for accessing I/O Ports(I/O modes)
[Link]. Addressing modes for accessing immediate and register data
1. Register addressing mode:
This mode specifies the source operand, destination operand or both to be contained
in an 8086 register
Example:
MOV BX, CX;copies the 16 bit content of CX
into BX MOV CL, BL ; copies 8 bit
contents of BL into CL
Sample Register addressing modes are,

Figure 1. 6 Register Addressing Modes

2. Immediate addressing mode:

In an immediate mode,8 bit or 16 bit data can be specified as a part of
instruction. Transfers the source, an immediate byte or word of data, into the
destination register or memorylocation
The source operand is a constant.
The operand comes immediately after the opcode.
For this reason, this addressing mode executes quickly.
Immediate addressing mode can be used to loadinformation into any of the
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 registers except the segment registers and flag registers..
Examples:
MOV BL,26H;copies the 8 bit data 26H into BL

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 MOV CX.4567H;copies the 16 bit data 4567H into CX

Figure 1.7 Immediate Addressing Modes

[Link]. Addressing modes for accessing data in memory

The execution unit has direct access to all registers and data for register and
immediate operands.
The EU cannot directly access the memory operands.
It must be use the BIU segment registers to access memory operands.
For examples, when the EU needs a memory location, it sends an offset value
to the BIU. This offset is also called as Effective address(EA)
There are six ways to specify effective address (EA) in the instruction
a) Direct Addressing mode
b) Register Indirect Addressing mode
c) Based Addressing mode
d) Indexed Addressing mode
e) Based Indexed Relative Addressing mode
f) String addressing mode

1) Direct Addressing mode:

In this mode the 16 bit effective address (EA) is taken directly from
displacement field of instruction.
The displacement is stored in the location following the instruction opcode.
Example:
MOV AL,[3000H]
This instruction will copy the contents of the memory location, at a
displacement of 3000H from the data segment base, into the AL register.
Here, 3000H is the Effective address (EA) which is written directly in the
instruction.
Physical Address:[DS]X[10H]+EA=[DS]X[10H]+3000H
The physical address is calculated by combining the contents of offset location 2400
with DS.

2) Register indirect addressing mode:

In this mode, the EA is specified in either a pointer register or an
index register. The pointer register can be either base register BX or
base pointer register.
Index register can be either source index (SI) register or destination index (DI)
register. The 20 bit physical address is computing using DS and EA.
Examples:
1) MOV [DI], BX
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The instruction copies the 16-bit contents of BX into a memory location
offset by the value of EA specified in DI from the current contents in DS.
Now, if [DS]=7205H, [DI]=0030H, and [BX]=8765H.
Then after MOV [DI], BX, content of BX (8765H) is copied to memory locations
72080H.

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Physical address:[DS] X [10H] +EA= [DS] X [10H] + [DI]
2) MOV AX,[BX]
Moves into AX the contents of the memory location pointed to by DS
along with BX. Now, if [DS] value is 1000 and [BX] =1234.
The physical address is calculated as 1000x10+1234=11234H

3) Base plus index addressing:

Base plus index addressing is similar to indirect addressing because it
indirectly accessing data.
This addressing uses in base register (BP or BX) and one index register (DI
or SI) to indirectly address memory.
The base register often holds the beginning location of
memory array. The index register holds relative position of an
element in an array.
Example:
MOV CX, [BX + DI]
In this mode the EA is given by the sum of base and index register ie) [BX] +
[DI]
Physical address:[DS] X [10H] + EA=[DS] X [10H] + [BX] +[DI]

4) Register Relative addressing mode:

Register relative addressing is similar to base-plus-index addressing.
The data in a segment of memory are addressed by adding the
displacement to the contents of a base oran index register (BP, BX, DI or SI)
Example:
MOV CX [BX +0003H]; in this mode EA is given by sum of base register and
displacement

5) Base Relative plus index addressing:

The base relative plus index addressing is similar to the base plus index
addressing mode.
It adds a displacement besides using a base register and an index register to
generate a physical address of the memory,
This addressing mode is suitable to address data within the two dimensional
array.
Example:
MOV AL, [BX + SI +10H] ; In this mode the EA is the sum of base register, index
register and
displacement

6) String addressing mode:

This mode uses the index registers.
The string instruction assumes SI to point to the first byte or word of the
source operand DI to point to the first byte or word of the destination
operand.
The contents of SI and DI are automatically incremented or decremented to
point to the next byte or word.
The segment register for the source is DS.
The segment register for the destination must be ES.
Example:
MOVE BYTE;If [DF]=0;[DS]=3000H;[SI]=0600H;[ES]=5000H;[DI]=0400H;
[30600H]=38H;and
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[50400H]= 45H the after execution of the MOVS BYTE,[50400H]=38H;
[SI]=0601H and [DI]=0401H

[Link] Addressing modes for accessing I/O ports (I/O Modes)

A standard I/O device uses port addressing modes.
For memory –mapped I/O, memory addressing modes are
used. There are two types of port addressing modes are
1) Direct port mode

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 2) Indirect port mode
Direct port mode:
The port number is an 8-bit immediate operand.
This allows fixed access to ports numbered 0
to 255.
Example:
OUT 05H,AL; sends the contents of AL to 8 bit port
05H IN AX,80H;copies 16 bit contents of port 80H

Indirect Port mode:

Here the port number is taken from DX allowing 64K 8 bit ports or 32 K bit ports.
Example:
IN AL,DX;if [DX]=7890H,then it copies 8-bit content of port 7890H into AL
IN AX,DX;copies the 8 bit contents of ports 7890H and 7891H into AL
and AH respectively.

1.3.2. PROGRAMMEMORY ADDRESSING MODES:

JMP (Jump) and CALL instructions use program memory addressing
modes. These instructions have three distinct forms;
1. Direct program memory addressing
2. Relativeprogram memory addressing
3. Indirectprogram memory addressing
1) Direct program memory addressing:
In this addressing mode address where to transfer program control is specified
within the instruction along with the opcode.

Example:
JMP 2000H;
This instruction loads CS with 2000H and IP with 0000H to jump to memory location
2000H

2) Relative program memory addressing:

In this addressing mode, this term relative is restricted to instruction
pointer (IP). For example, if a JMP instruction skips the next 5 bytes of
memory.
The address in relation to the instruction pointer is a 5 that adds to the
instruction pointer. This generates the address of the next program instruction

Example:
JMP [05];
This instruction skips over the two bytes of memory that allow the JMP
instruction. When displacement is one byte (8 bit) it is called short jump.
When displacement is two byte (16 bit) it is called near jump.
In both short and near cases only contents of IP register are modified;
Contents of CS register are not modified; Such Jumps are called intrasegment
jumps
The relative JMP and CALL instructions can have either a 8 bit or a 16 bit
signed displacement that allows a forwarded memory reference or a reverse
memory reference.

3) Indirect program memory addressing:

The 8086 allows several forms of program indirect memory addressing for the

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JMP and CALL. Instructions.
In this addressing mode, it is possible to use any 16 bit register
(AX,BX,CX,DX,SP,BP,DI or SI) and Relative register([BP],[BX],[DI] or [SI]).

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 Assembly language Operation
JMP AX Jumps to the current code segment location
addressed by the contents of AX
JMP CX Jumps to the current code segment location
addressed by the contents of CX
JMP NEAR PTR [BX] Jumps to the current code segment location
addressed by the contents of the data segment
memory location
addressed by BX
JMP NEAR PTR[DI +2] Jumps to the current code segment location
addressed
by the contents of the data segment memory
location addressed by DI plus 2
JMP TABLE[BX] Jumps to the current code segment location
addressed by the contents of the data segment
memory location
addressed by TABLE plus BX
JMP ECX Jumps to the current code segment location
addressed by the contents of ECX
Table 1.3 Jump Addressing Modes

1.3.3. STACK MEMORY ADDRESSING MODES

There are two stack operations are performed

such as Push operations
Pop operations
The figure 1.8 a) represents PUSH BX places the contents of BX onto the stack
The figure 1.8 b) represents POP CX removes data from the stack and places them
into CX .

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Figure 1.8 PUSH BX Places the Contents of BX ontothe Stack

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The complete Addressing modes of 8086:

Figure 1.9 Summary of Addressing Modes

1.4 INSTRUCTION SET AND ASSEMBLER DIRECTIVES
The instruction set of the 8086 is divided into eight major groups as follows.
A. Data movement instructions
B. Arithmetic and logical instructions
C. String manipulation instruction
D. Program control transfer instructions
E. Iteration control instructions
F. Processor control instruction
G. External hardware synchronization instruction
H. Interrupt instruction
1.4.1 DATA TRANSFER INSTRUCTIONS:
The data transfer instructions are those, which transfers the DATA from any
one source to any one destination.
The data may be of any type. They are again classified into five groups.
They are
a) MOV instructions to transfer byte or word
b) PUSH/POP instructions
c) Load effective address instruction
d) String data transfer instruction
e) Miscellaneous data transfer instructions
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 [Link] MOVinstructions:
It is a general purpose instruction to transfer byte or word from register
to register, register to memory or from memory to register
MOV destination, source
The MOV instruction copies a word or a byte of data from some
source to a destination. The destination can be a register or a memory
location
The source can be either can be register, a memory location or a immediate
number The source and destination in a MOV instruction must be a same
type i.e. either both must be a byte or word
Example:
MOV BX, 592FH ; Load the immediate number 592FH in BX
MOV CL, [357SAH];Copy the contents of memory location at
a
displacement of 357AH from data segment
base into the CL register
MOV DS, CX ; copy word from CX register to data
segment
register
[Link] PUSH/POP Instructions:
These instructions are used to load or receive data from the stack memory
PUSH Source:
The PUSH instruction decrements stack pointer by two and copies a word from
source to the location in the stack.
The source must be a word (16 bit).
The source of the word can be general purpose register, a segment register or
memory. Whenever data is pushed on to the stack the first (MSB) data byte
moves into the stack segment memory location addressed by the SP-1.
The second (LSB) data byte moves into the stack segment memory location
addressed by the SP-2.
Examples:
1. PUSH CX ; decrements SP by 2, copy CX to stack
The following figure 1.10 shows the execution of PUSH CX instruction.

Figure 1.10 PUSH CX on the Stack

2. PUSHDS ; decrement SP by 2, copy DS to stack

29
3. PUSH NEXT [BX] ; decrement SP by 2, copy a word from memory in DS
(i.e. .PA=EA + DS) to stack with EA=NEXT + [BX]
PUSHF:
Puts the flag register contents on the stack

30
 Wheneverinstructionisexecuted on to the stack the first (MSB) data byte
moves into the stack segment memory location addressed by the SP-1.
The stack the second (LSB) data byte moves into the stack segment memory
location addressed by the SP-2.
POP destination:
The POP instruction copies a word from the stack location pointed by the stack
pointer to the destination.
The destination can be general purpose register, a segment register or memory
location. After the word is copied to the specified destination, the stack
pointer is automatically incremented by 2
Examples:
1. POP CX ; copy a word from top of the stack to CX and incremented
SP by 2 The following figure 1.11 shows the execution of POP CX
instruction.

Figure 1.11 POP CX on the Stack

2. POP DS ; copy a word from top of stack to DS and incremented SP by 2.

POPF:
Removes the word from top of the stack to the flag register.
Whenever instruction is executed, the byte from the stack segment memory
location addressed by SP moves into the most significant byte of the flag
register
The byte from the stack segment memory location addressed by SP +1 moves
into the least significant byte or the flag
[Link] Load Effective Address Instruction:
The Load effective address group includes following instructions.
1) LEA(Load Effective Address )
2) LDS(Load pointer using DS )
3) LES(Load ES with pointer )

1) LEA (Load Effective Address):

Format: LEA register, source
This instruction determines offset of the variable or memory location.
It loads a 16-bit register with the offsetaddress of the data specified by
the source.
Examples:
1. LEA CX, TOTAL ; loads CX with offset of TOTAL in DS
2. LEA AX, [BX], [DI] ; loads AX with EA = [BX] + [DI]

31
2) LDS (Load pointer using DS)
Format: LDS register, source
It loads 32-bit pointer from memory source todestination register and DS.
The offset is placed in the destination register and thesegment is placed in DS.

32
 This instruction copies a word from two memory locations into the register
specified in the instruction.
It then copies a word from the next two memory locations into the DS register.
Example:
LDS CX, [391AH] ; Copy the contents of memory at displacements of
391AH and 391BH to CX .Then copy the contents at
displacement of 391CH and 391DH in DS.

3) LES (Load ES with pointer)

Format: LES register, source
It loads 32-bit pointer from memory source to destination register and ES.
The offset is placed in the destination register and the segment is
placed in ES. This instruction loads new values into specified register
A successive four memory location loads into the ES register.
The word from the first two memory locations is copied into the specified
register and the word from the next two memory locations is copied into the ES
register.
Example:
LES CX, [3483H] ; Copy the contents of memory displacement of 3483H in
DS to CL. Contents of 3484H in DS to CH and
Copy the contents of memory at displacement of 3485H and
3486H in DS to ES register.

[Link] String Data Transfer Instruction

1) MOVS/MOVSB/MOVSW Instruction
These instructions copy a byte or word from a location in the data segment
to a location in the extra segment.
The offset of the source byte or word in the data segment must be in the SI
register. The offset of the destination byte or word in the data segment
must be in the DI register.
Examples:
CLD ; Clear Direction Flag to auto increment SI
and DI MOV AX, 0000H
MOV OS, AX ; Initialize data segment register
to 0 MOV ES, AX ; Initialize extra segment
register to 0
MOV SI, 2000H ; Load offset of start of source string
into SI MOV DI, 2400H ; Load offset of start of
destination into DI MOV CX. 041-1 ; Load length of
string In CX as counter
REP MOVSB ; Decrement CX and MOVSB until CX will be 0.

After move SI will be one greater than offset of last byte in source string. D! will be
none greater than offset of last byte of destination string. CX will be 0.

2) REP / REPE / REPZ /REPNE/REPNZ Prefix:

REP is a prefix which is written before one of the string instructions.
Theseinstructions repeat until specified condition exists.

Instruction Code Condition for Exit

REP CX=0
REPE/ REPZ CX =0 or ZF = 0
REPNE / REPNZ CX =0 or ZF=1
33
 Table 1.4 Repeat Conditions
Examples:
REPZ CMP SB ; Compare string bytes until CX = 0; or until string bytes not equal.

34
3) LODS / LODSB / LODSW
This instruction copies a byte from a string location pointed to by SI to AL, or
a wordfrom a string location pointed to by SI to AX.
LODS does not affect any flags. LODSBcopies byte and LODSW copies a word,
Examples:
CLD ; Gear direction flag so SI is auto
incremented MOV SI, OFFSET S_STRING ; Point ST at string
WDS S_STRING.

4) STOS / STOSB / STOSW

The STOS instruction copies a byte from AL or a word from AX to a memory
location in the extra segment.
DI Is used to hold the offset of the memory location in the extra segment.
After the copy, DI is automatically incremented or decremented to point to the
next string element in memory.
If the direction flag, DF, is cleared, then DI will automatically be incremented by
one for a byte string or incremented by two for a word string.
If the direction flag is set, DI will be automatically decremented by one for a
byte string or decremented by two for a word string.
STOS does not affect any flags. STOSB copies byte and STOSW copies a word.
Examples:
MOV Dl, OFFSET D_STRING ;Point DI at destination string
STOS D_STRING ; Assembler uses string name to determine
; Whether string is of type byte or type word.
; If byte string, then string byte replaced
; With contents of AL If word string, then
; String word replaced with contents
of AX MOV DI, OFFSET D_STRING ; Point DI at destination string
STOSB ; “B” added to 5105 mnemonic directly
; tells assembler to replace byte in string with byte
from
; AL STOSW would tell assembler directly to replace a
; Word in the string with a word from AX.

[Link] Miscellaneous Data Transfer Instructions

This group consists of following instructions.
1) XCHG
2) LAHF
3) SAHP
4) XLAT
5) IN and OUT

1) XCHG Instruction:
Format: XCHG destination, source.
The XCHG instruction register or the contents of a register with the contents of
a memory location(s).
Theinstruction cannot exchange the contents of two memory
locations. The source anddestination both must be words or
bytes.
The segment registers can‟t be used in these Instructions.
Examples:
XCHG BX, CX ; Exchange word in BX with word in CX.
35
XCHG AL, CL ; Exchange byte in AL with byte in CL
XCHG AL, SUM [BX] ; Exchange byte in AL with byte in
memory at
; EA = SUM + [BX].
; PA = EA + DS.

36
2) LAHFInstruction:
Load lower byte of flag register in AH.
This instruction copies the contents of lower byte of 8086 flag register to AH
register.

3) SAHFInstruction:
Copy AH registers to low byte of flag register.
The contents of the AH register are copied into the lower byte of the 8086 flag
register.

4) XLATInstruction:
Translate byte in AL.
The XLAT instruction replaces a byte in the AL register with a byte from a
lookuptable in memory.
BX register stores the offset of the starting address of the
lookup table AL register stores the byte number from the
lookup table.
This instruction copies byte from address pointed by [BX + AL] back into
AL.

5) IN and OUT instructions

IN Instruction:
Input a byte or word from port.
The IN instruction will copy data from a port to the accumulator.
If an 8-bit port is read, the data will go to AL and if a 16-bit port is read the
data will go to AX.

The IN instruction can be executed in two different addressing modes,

1. Direct:
In direct addressing mode 8-bit address of the port is a part of theinstruction.
Examples:
IN AL, 0F8H ; Copy a byte from port 0F8H
to AL IN AX, 95H ; Copy a word from port
95H to AX.

2. Indirect:
In indirect addressing, the address of the port is referred from DX register.
Since DX is a 16-bit register, the port address can be any number between
0000H to FFFH.
Therefore it is possible address to up to65,536 ports in this mode.
Examples:
MOV DX, 30F8H ; Load 16-bit address of the port in DX.
IN AL. DX ; Copy a byte from 8-bit port 30F8H to
AL. IN AX, DX ; Copy a word from 16-bit port 30F8H
to AX.

OUT Instruction:
Send a byte or word to a port.
The OUT instruction copies a byte from AL or a word from AX to the
specified port. The OUT instruction can be executed in two different
addressing modes.

37
1. Direct:
In direct addressing mode 8-bit address of the port is a part of the instruction.
Examples:
OUT [Link] ; Copy contents of AL to 8 bit port
0F8H. OUT 0FBH, AX ; Copy contents of AX to 16-
bit port 0FBH.

38
2. Indirect:
In indirect addressing, the address of the port is referred from
DXregister. It has advantage of accessing 216 i.e. 65536 ports
as mentioned earlier.
Examples:
MOV DX, 30F8H ; Load 16-bit address of the port in
DX. OUT DX, AL ; Copy the contents of AL to port
30F8H. OUT DX, AX ; Copy the contents of AX
to port 30F8H.

1.4.2 ARITHMETIC AND LOGICAL INSTRUCTIONS:

The arithmetic and logic group of instructions include
1) Addition instructions
2) Subtraction instructions
3) Multiplication instructions
4) Division
5) BCD and ASCII Arithmetic instructions
6) Comparison
7) Basic Logic Instructions - AND, OR NOT, XOR
8) Shift and Rotate instructions

[Link] Addition
This group of instructions consists of following instructions
a) ADD: Addition
b) ADC: Addition with carry
c) INC: Increment (Add 1)

a) & b) ADD/ADC Instruction:

Format: ADD destination, source / ADC destination, source.
These instructions add a number from source to a number from destination
and putthe result in the destination.
The ADC, instruction also adds the status of carry flag intothe result. The
source may be an immediate number, a register, or a memory location.
Thesource and the destination in an instruction cannot both be memory
locations. The sourceand destination both must be a word or byte.
Flags affected: AP, CF, OF, PP. SF, ZR
Examples:
ADD AL, 0F0H ; Add immediate number 0F0H to contents of AL.
ADC DL. CL ; Add contents of CL to contents of DL with
carryandstoreresultinDL i.e. DL+CL+CY
ADC DX, BX ; Add contents of BX to contents of DX with carry and store
result in DX
i.e. DX DX + BX + CY
ADD CL, TOTAL [BX]; Add byte from effective address TOTAL [BX] to contents
of CL. ADD CX, TOTAL [BX]; Add word from effective address TOTAL [BX] to
contents of CX.

c) INC Instruction:
Format: Increment destination.
The INC instruction adds 1 to the specified destination. The destination
may be a Register or memory location.
The AP, OF, PF, SF and ZF flags are affected.
Examples:
39
INC AL ; Add 1 to contents of AL.
INC BX ; Add 1 to contents of BX.
INC BYTE PTR [BX] ; Increment byte at offset of BX in DS.
; BYTE PTR directive indicates to the assembler; that the byte
from memory is to be incremented.

40
INC WORD FIE [BX] ; Increment word at offset of BX in DS.
; WORD PTR directive indicates to the assembler; that the word
from memory is to be incremented.

[Link] Subtraction
This group of instructions consists of following group of instructions.
a) SUB : Subtraction
b) SBB : Subtraction with borrow
c) DEC: Decrement (subtract 1)
d) NEG : 2‟s complement of a number

a) &b)SUB / SBB Instruction:

Format: SUB destination,
Source.
SBB destination, Source.
These instructions subtract the number in the source from the number in the
destination and put result in the destination.
The SBB, instruction also subtracts the status of carry flag from
the result. The source may be an immediate number, a register, or
a memory location. The destination may be a register or a
memory location.
The source and the destination both cannot be memory
locations. The source and destination both must be word or
byte.
If you want to subtract a byte from a word, you must copy the byte to a word
location and fill the upper byte of the word with zeroes before subtracting.
Flags affected: AF, CF, OF, PF, SF, and ZF.
Examples:
SUB AL, 0F0H ; Subtract immediate number 0F0H from contents of AL
store result
in AL.
SBB DL, CL ; Subtract contents of CL and status of carry flag from the
contents
of DL and store result in DL.i.e. DL-CL-CY
SBB DX, BX ; Subtract contents of BX and status of carry flag from the
DX and store result in DX. i.e. DX-BX-CY
SUB CL, TOTAL [BX] ; Subtract byte from effective address TOTAL [BX]
from the contents of CL and store result in CL
SUB CX, TOTAL [BX] ; Subtract word from effective address TOTAL [BX]
from the contents of CX and store result in CX.
c) DEC instruction:
Format: DEC Decrement destination.
The DEC instruction subtracts 1 from the specified
destination. The destination may be a register or a
memory location.
Flags affected: AP, OF, PF, SF and ZF
Examples:
DEC AL ; Subtracts 1 from the contents
of AL DEC BX ; Subtracts 1 from the contents
of BX.

d) NEG Instruction: Form 2’s complement.

41
 This instruction replaces the number in a destination with the 2‟s
complement of that number. The destination can be a register or a memory
location.
This Instruction can be implemented by inverting each bit and
adding I to it. The negate instruction updates the AF, CF, SF, PF,
ZF and OF flags.
Examples:
; AL = 0011 0101 35H
NEC AL ; Replace number in AL with its 2‟s complement
; AL = 1100 1011 = CBH

42
3) Comparison:
The comparison instruction (CMI‟) compares a byte/word from the specified
source with a byte/word from the specified destination.
The source and destination both must be byte or word. The source may be an
immediate number, a register, or a memory Location.
The destination may be a register or a memory location.
The comparison is done by subtracting the source byte or word from the
destination byte or word. But the result is not stored in the destination.
Source and destination remain unchanged, only flags are
updated. Flags: The AF, OF, SF, ZF, PF and CF are updated by the
CMP instruction. Examples:
CMP BL, 01H ; Compare immediate number 01H with
byte in BL CMP CX, BX ; Compare word in BX with word in
CX.
CMP CX, TOTAL ; Compare word at displacement TOTAL in DS with word in CX.
The result of comparison is checked by conditional jump, conditional call
andconditional return instructions.

[Link] Multiplication
This group of instructions consists of following group of instructions.
a) MUL: Unsigned multiplication
b) IMUL: Signed multiplication

a) MUL Instruction:
Format: MUL source
This instruction multiplies an unsigned byte from source and unsigned byte in
ALregister or unsigned word from source and unsigned word in AX register.
The source canbe a register or a memory location.
When the byte is multiplied by the contents of AL, theresult is stored in AX.
The most significant byte is stored in AH and least significant byteis stored in
AL
Flags: MUL instruction affects AF, PF, SF, and ZF flags.
Examples:
MUL BL ; ALxBL,result in AX.
MUT BX ; AX x BX, result high word in DX low word
in AX. MUL WORD PTR [BX] ; AX time‟s word in DS pointed by
[BX]
; Result high word in DX Low word in AX.

b) IMUL Instruction:
This instruction multiplies a signed byte from some source and a signed byte in
AL, ora signed word from some source and a signed word in AX.
The source can be register or memory location.
When a signed byte is multiplied by AL a signed result will be put inAX.
When a signed word is multiplied by AX, the high-order word of the signed
result isput in DX and the low-order word of the signed result is put in AX.
Flags: MUL instruction affects AP, PF, and SF.
Example:
IMULBL ; AL x BL. Result in AX
IMULCX ; AX x CX, high-order word of result in DX and low-order word of result in
AX
[Link] Division

43
This group of instructions consists of following group of instructions
a) DIV
b) IDlV
a) DIVInstruction:
Format:DIV
source

44
 This instruction is used to divide an unsigned word by a byte or to divide
anunsigned double word by a word.
When dividing a word by a byte, the word must be in AX register.
After the divisionAL will contain an 8-bit quotient and AH will contain an 8-bit
remainder. For DIV instruction source may be a registeror memory location.
Flags: All flags are undefined after a DIV instruction.
Examples:
DIV CL ; Word in AX/byte in CL, Quotient in AL, remainder in AH.
DIV CX ; Double word in DX and AX/word in CX, Quotient in AX, remainder in DX.

b) IDIV Instruction:
Format: IDIV source.
This instruction is used to divide a signed word by a signed byte or to
divide asigned double word (32-bits) by a signed word.
Rest all is similar to DIV instruction.

1.4.3 BCD AND ASCII ARITHMETIC

The 8086 allows arithmetic manipulation of both BCD (Binary coded decimal)
andASCII (American Standard Code for Information Interchange) data.

[Link] BCD Arithmetic

The 8086 provides two instructions to support BCD arithmetic. They correct
result of aBCÐ addition and a BCD subtraction.
The DAA (decimal adjust after addition) instructionfollows BCD addition and
the DAS (decimal adjust after subtraction) follows BCDsubtraction.
Both instructions correct the result of the addition or subtraction so that
ills aBCD number.

DAA Instruction: Decimal Adjust Accumulator.

This instruction is used to make sure the result of adding two packed BCD
numbers isadjusted to be a legal BCD number.
Instruction works as follows:
If the value of the low-order four bits (D3-D0) in the AL is greater than 9 or
ifAFis set, the instruction adds 6 (06) to the low-order four bits.
If the value of the high-order four bits( D7 - D4) in the AL is greater than 9 or
if carry flag is set, the instruction adds 6 (60) to the high-order four bits.

Examples:
; AL = 0011 1001 = 39 BCD
; CL = 0001 0010 = 12 BCD
Add AL, CL ; AL = 0100 1011 =
4BH
DAA ; add 0110 because 1011 > 9
; AL 0101 0001 51 BCD

DAS Instruction: Decimal Adjust After Subtraction.

This instruction is used after subtracting two packed BCD numbers to make sure
the result is correct packed BCD.
Instruction works as follows:
If the value of the low-order four bits (D3-D0) in the AL is greater than 9 or if
AFis set; the instruction subtracts 6 (06) from the low-order four bits.
45
If the value of the high-order four bits (D7-D4) in the AL is greater than 9 or if
carry flag is set, the instruction subtracts 6 (60) from the high-order four bits.

46
Example:
; AL = 0011 0010 = 32 BCD
; CL = 0001 0111 = 17 BCD
SUB AL, CL ; AL 0001 1011 IBH
; Subtract 0110 Because 1011 > 9
; AL 0001 0101 = 15 BCD
The DAS instruction updates the AF, CF, PF, and
ZF. The 0F flag is undefined afterDAS instruction.

[Link] ASCII Arithmetic

ASCII numbers range in value from 30H to 39H for the
numbers 0-9. The 8086provides four instructions for ASCII
arithmetic.
1) AAA: ASCII adjust after addition
2) AAS: ASCII adjust after subtraction
3) AAM: ASCII adjust after multiplication
4) AAD: ASCII adjust before division

1) AAAInstruction: ASCII Adjust for Addition.

The numbers from 0-9 are represented as 30H-39H in ASCII code.
When you want toadd two decimal digits which are represented in ASCII
code, it is necessary to mask uppernibble (3) from the code before addition.
The 8086 allows you to add the ASCII codes fortwo decimal digits without
masking off the “3” in the upper nibble of each digit.
The AAAinstruction can be used after addition to get the current result in
unpacked BCD form.
Examples:
;AL =0011 0100ASCII8
;CL =0011 1000 ASCII4
ADD AL, CL ;AL =0110 1100
; 6CH = Incorrect temporary result
AAA ; AL 0000 0010 Unpacked BCD for
2.
; carry =1 to indicate correct answer is 12 decimal.

The AAA instruction updates the AF and the CF, but the OF, PF, SF, and ZF are left
undefined.

2) AAS Instruction: ASCII Adjust after subtraction.

The numbers from 0-9 are represented as 30-39 in ASCII code.
When you want to subtract two decimal digits which are represented in ASCII
code, it is necessary to mask upper nibble (3) from the code before subtraction.
The 8086 allows you to subtract the ASCII codes for two decimal digits
without masking off the „3 in the upper nibble of each digit.
The AAS instruction can be used after subtraction to get the current result in
unpacked BCD form.
Example:
; AL=0011 1000ASCÍI8
; CL = 0011 0010
ASCII 2 SUB AL, CL ;
AL=000001101BCD06
; CF = 0
47
AAS ;AL=00000010=BCD0
6
; CF = O no borrow required

3) AAM Instruction: ASCII Adjust After Multiplication.

After the two unpacked BCD digits are multiplied, the AAM instruction is used
toadjust the product to two unpacked BCD digits in AX.

48
Examples:
; AL = 0000 0100 = Unpacked BCÐ 4
; CL=00000110= UnpackedBCD6
MULCL ; AL xCLResultinAX.
; AX = 0000 0000 0001 1000 = 0018H
AAM ; AX = 0000 0010 0000 0100=
0204H
; Which is unpacked BCD for 24.
Now by adding 3030H in AX register we get the result in ASCII form.

4) AADInstruction: ASCII Adjust Before Division.

AAD converts two unpacked BCD digits in AH and AL to the equivalent binary
number in AL.
This adjustment must be made before dividing the two unpacked BCDdigits in
AX by and packed BCD byte.
After the division AL will contain the unpacked BCD quotient and AL will contain
the unpacked BCD remainder.
The PF, SF and ZF are updated. The AF, CF and DF are undefined alter AAD.
Example :
; AX = 0403 unpacked BCD for 43 decimal, CL = 07H
AAD ; Adjust to binary before division,
; AX = 002BH = 2BH = 43 decimal.
DIV CL ; Divide AX by unpacked BCD in CL
; AL = quotient = 06 unpacked BCD
; AH = remainder 01 unpacked BCD
Now by adding 3030H in AX register we get the quotient and remainder in
ASCII form.

1.4.4 BASIC LOGIC INSTRUCTIONS

The basic logic instructions include AND, OR, Exclusive-OR, and NOT.
This group also includes TEST instruction which is a special form of the AND
instruction.
[Link] AND Instruction:
Format: AND destination, source.
AND operation with two inputs produces result logic 1 only when both the
inputs are logic
1.i.e. Y = A B.
A B Y
0 0 0
0 1 0
1 0 0
1 1 1
Table 1.5 Truth Table for AND gate
This instruction logically ANDs each bit of the source byte or word with the
corresponding bit in the destination and stores result in the destination.
The source may be an immediate number, a register or a memory
location. The destination may be a registeror a memory location.
The source and destination both cannot be memory locations in thesame
instruction. The CF and OF are both 0 after AND. The PF, SF and ZF are
affected.
AF is undefined.
49
Examples:
1. ; AL=10010011=93H
; BL = 0111 0101 = 7511
AND BL,AL ;ANDbyteinALwithbyte in BL
; BL = 0001 0001 = 11H
2. ; CX = 0110 1011 1001 1110
AND CX, 00F0H ; CX = 0000 0000 1001 0000

50
 The AND operation clears bits of a binary number. The task of clearing a bit in
abinary number is called masking.

Figure 1.12 Masking Using AND Operation

[Link] ORInstruction:
Format:OR destination, source.
OR operation with two inputs produces result logic 1 when any one or both inputs
arc logic 1. i.e., Y = A + B.
A B Y
0 0 0
0 1 1
1 0 1
1 1 1
Table 1.6 Truth Table for OR gate
This instruction logically ORs each bit of the source byte or word with the
corresponding bit in the destination and stores result in the destination.
The source may be an immediate number, a register or a memory
location. The destination may be a registeror a memory location.
The source and destination both cannot be memory locations in the same
instruction. The CF and OF are both 0 after OR.
The PF, SF and ZF are affected. AFis undefined.
Examples :
1. ; AL = 1001 0011 =
93H
; BL = 0111 0101 = 75K
OR BL, AL ; OR byte in AL with byte in BL.
. ;BL=1111O111=F7H

2. ; CX = 0110 1011 1001 1110

OR CX, 00F0H ; CX 0110 1011 1111 1110
The OR instruction is used to set (make one) any bit in the binary number.

Figure 1.13 Masking Using AND Operation

[Link] XOR Instruction:

Format: XOR destination, source.
XOR operation produces result logic 1 when odd number of inputs are logic 1 i.e.
Y=Aa +aA
51
 A a Y
0 0 0
0 1 1
1 0 1
1 1 0
Table 1.7 Truth Table for XOR gate
This instruction logically XORs each bit of the source byte or word with
thecorresponding bit in the destination and stores result in the destination.
The source may bean immediate number, a register or a memory
location. The destination may be a register or a memory location.
The source and destination both cannot be memory locations in the same
instruction. The CF and OF are both 0 after XOR. The PF, SF and ZF are
affected.
AF is undefined.
Examples:
1. ; AL = 1010 1111 =
AFH
; BL = 1111 0000 = F0H
XOR BL, AL ; XOR byte in AL with byte in BL
; BL = 0101 1111 = 5FH
The XOR instruction is used if some bits of a register or memory location
must be inverted.
This instruction allows part of a number to be inverted or complemented.

Figure 1.14 Masking Using AND Operation

[Link] NOT Instruction:

Format: NOT destination.
The NOT instruction inverts each bit of a byte or a
word. The destination can be register or a memory
location.
Flags: NOT instruction affects no flag.
Examples:
; AL = 0110 1100
NOTAL ; AL= 10010011
; CX=1010 1111 0010 0110
NOT CX ; CX = 0101 0000
11011001
[Link] Test and bit test instructions:
The TEST instruction performs the AND operation.
The difference is that the ANDinstruction changes the destination operand,
while the TEST instruction does not A TEST only affects the condition of the
flag register, which indicates the result of the test.
PF, SF and ZF will be updated to show the results of the ANDing.
PF has meaningonly for the lower 8 bits of the destination. AF will be undefined.
Examples:
52
TEST AL, CL ; AND CL with AL
; Update flags, result is not stored.
TEST BX, CX ; AND CX with BXUpdateflagsresult is not stored.

53
 ;
Figure 1.15Test Operation

1.4.5 SHIFT AND ROTATE

[Link] Shift:
Shift instructions position or move binary data to the left or right by shifting
themwithin the register or memory location.
The shift operations can be classified as logical shifts and arithmetic shifts.
The logical shifts move a 0 into the rightmost bit position for a logical left
shift (SHL). A 0 into the leftmost bit position for a logical right shift (SHR).
The arithmetic left shift (SAL) and logical left shift operations areidentical.

Figure 1.16 Shift Operations

SAL/SHL Instruction:
Format: SAL/SHL destination, count.
SAL and SHL arc two mnemonics for the same instruction.
This instruction shifts eachbit in the specified destination to the left and 0 is
stored at LSB position.
The MSB is shifted into the carry flag.
The destination can be a byte or a word. It can be in a registeror in a memory
location.
Diagram 1.17 shows SAL instruction for byte operation.
Flags: All flags are affected.

54
Figure 1.17 SAL/SHL Instruction

55
Examples:
SAL CX, 1 ; Shift word in CX 1 bit position left, O
in LSB MOV CL, 05H ; Load desired number of shifts in CL
SAL AX, CL ; Shift word in AX left 5 times
; 0s in 5 least-significant bits.
SHR Instruction:
Format:SHR destination, count.
This instruction shifts each bit in the specified destination to the right and 0 is
stored at MSB position.
The 158 is shifted into the carry flag.
The destination can be a byte or aword. It can be in a register or in a memory
location.
Diagram 1.18 shows SHR instruction for byte operation.
Flags: All flags are affected.

Figure 1.18 SHR Instruction

Examples:

SHR CX, 1 ; Shift word in CX I bit position right, 0 in

MSB. MOV CL, 05H ; Load desired number of shifts in CL.
SHR AX, CL ; Shift word in AX right 5 times
; 0‟s in 5 most significant bits.

SAR Instruction:
Format:SAR destination, count.
This instruction shifts each bit in the specified destination some number of bit
positions to the right.
As a bit is shifted out of the MSB position, a copy of the old MSB is put in
the MSB position.
The LSB will be shifted into CF.
The destination can be a byte or a word.
It can be in a register or in a memorylocation. The number of shifts is indicated
by count Diagram 1.19 shows SAR instruction for byte operation.
Flags: All flags are affected.

56
Figure 1.19 SHR Instructions

57
Examples:
SAR BL, 1 ; Shift byte in BL one bit position
right. MOV CL, 04H ; Load desired number of shifts
in CL
SAR DX, CL ; Shift word stored in DX 4 bit positions right.
[Link] Rotate
Rotate instructions position or move binary data by rotating the information
in a register or memory location, either from one end to another or through
the carry flag.
This is illustrated in the following figure 1.20

Figure 1.20 Rotate Operations

ROL Instruction:
Format:ROL destination, count.
This instruction rotates all bits in a specified byte or word to the left some
number of bit positions.
MSB is placed as a new LSB and a new CF.
Diagram 1.21 shows ROL instruction for byte
rotation.

Figure 1.21 ROL Instruction

The destination can be a byte or a word.

It can be in a register or in a memory
location; The numbers of shifts are

58
 indicated by count.
Examples:
ROL CX, 1 ; Word in CX one bit position left, MSB to LSB
and CF MOV CL 03H ; Load desired number of bits to rotate in
CL.
ROL BL. CL ; Rotate BL three positions.

59
ROR Instruction:
Format:ROR destination, count.
This instruction rotates all bits in a specified byte or word to the right some
number of bit positions.
LSB is placed as a new MSB and a new
CF. The destinations can be a byte or a
word.
It can be in a register or in a memorylocation. The number of shifts arc
indicated by count.
Diagram 1.22 shows ROR instruction for byte rotation.

Figure 1.22 ROR Instruction

Examples:
ROR CX, 1 ; Rotated word in CX one bit position right,
; LSB to MSB and CF.
MOV CL, 03H ; Load number of bits to rotate
in CL ROR BL, CL ; Rotate BL three positions.

RCL Instruction:
Format: RCL destination, count.
This instruction rotates all of the bits in a specified word or byte some
number of bit positions to the left along with the carry flag.
MSB is placed as a new carry and previous carry is placed as a
new LSB. The destination can be a byte or a word.
It can be in a register or in a
memorylocation. The numbers of shifts
are indicated by count.
Diagram shows 1.23 RCLinstructions for byte rotation.

Figure 1.23 RCL Instruction

RCR Instruction:
Format:RCR destination, count.
This instruction rotates all of the bits in a specified word or byte some
number of bit Positions to the right along with the carry flag.
LSB is placed as a new carry and previous carry is placed as a new
MSB. The destination can be a byte or a word.
60
 It can be in a register or in a memory
location. The numbers of shifts are
indicated by count.
Diagram1.24 shows RCR instruction for byte rotation.

61
 Figure 1.24 RCR Instruction

Examples:
RCR CX, 1 ; Word in CX 1 bit right, LSB to CF, CF to
MSB. MOV CL, 04H ; Load number of bit positions to rotate in
CL. RCR AL, CL ; Rotate AL 4 bits right
1.4.6 STRING COMPARE INSTRUCTIONS
The string comparison instructions allow the programmer to test a section of
memory against a constant or against another section of memory.
The 8086 provides two instructions for string comparisons:
1) CMPS (compare string)
2) SCAS (string scan).

[Link] CMPS / CMPSB / CMPSW Instruction:

A string is a series of the same type of data items in sequential memory
locations.
The CMI‟S instruction can be used to compare a byte in one string with a byte
in another String or to compare a word in one string with a word in another
string.
SI is used to hold the offset of a byte or word in the
source string Dl is used to hold the offset of a byte or a
word in the other string.
The comparison is done by subtracting the byte or word pointed to by DI from
the byte or word pointed to by SI.
The AF, CF, OF, E‟F, SF, and ZF flags are affected by the comparison.
Examples:
MOV SI, OFFSET F_STRING ; Point SI at source string,
MOV DI, OFFSET S_STRING ; Point Dl at destination
string CLD ; DF cleared so SI and DI
will
; auto increment after compare
CMPS F_STRING, S_STRING ; The assembler uses names to determine whether
; strings were declared as type byte or as type, word.
MOV CX, 100 ; Put number of siring elements
in CX, MOV SI. OFFSET F_STRING ; Point SI at source of string
MOV Dl, OFFSET S_STRING ; Point DI at destination of string
STD ; DF set so SIand DI will auto decrement
after
; compare
REPE CMPSB ; Repeat the comparison of string bytes until
end
; of string or until compared bytes arc not equal.

[Link] SCAS / SCASB / SCASW Instruction:

62
 SCAS compares a string byte with a byte in AL or a string word with word in AX.
The instruction affects the flags, but it does not change either the operand in
AL (AX) or the operand in the string.
The string to be scanned must be in the extra segment and DI must contain
the offset of the byte or the word to be compared.
SCAS affects the AF, CF, OF, PF, SF and ZF flags.
Examples :

63
 ; Scan a text string of 80 characters
; for a carriage return
MOV AL, 0DH ; Byte to be scanned for
into AL MOV DI, OFFSET TEXT_STRING ;Offset of string
to Dl
MOV CX, 80 ; CX used as clement counter
CLD ; Clear DF, so DI auto increments

REPNE SCAS TEXT_STRING ; Compare byte in string with byte in AL.

SCASB says compare strings as bytes and SCASW says compare strings
as words.

1.4.7PROGRAM CONTROL INSTRUCTION:

The 8086 to Fetch is next instruction from the location specified or
indicated by instruction rather than from the next location after the JMP
instruction.
The JMP instructions arc basically classified as
1) Unconditional Jump (JMP)
2) Conditional jump instructions.
A conditional jump instruction allows the programmer to make decisions
based upon numerical tests.
The results of numerical tests are held in the flag bits, which are then
tested by conditional jump instructions.
The jump instructions are further classified as
1) Short jump instructions,
2) nearjump instructions
3) Far jump instructions.
A short jump is a two-byte instruction that allows jumps or branches to memory
locations within +127 and - 128 bytes from the address following the jump.
A three byte near jumpallows a branch or jump within ± 32 kbytes (from the
instruction in the current code segment.
A five byte far jump allows a jump to any memory location within the real
memory system.
The short and near jump are often called intra segment jumps and the far
jumps are often called intersegmentjumps.
The short jumps are also called relative jumps because in such
instructions the destination location is specified relative to the current location.
The Fig. 3.9 shows instruction formats for short, near and far jumps instructions.

64
 Figure 1.25 Instruction formats for short, near and far jumps instructions

Near and far jumps are further described as

1) Direct
2) Indirect.

65
 If the destinationaddress for the jump is specified directly within the instruction,
then the jump is describedas direct.
If the destination address for the jump is contained in a register or memory
location, the jump is referred us indirect.
Examples: (Unconditional jump)
JMP NEXT ; Fetch next instruction from address at label NEXT.

J Cond - Conditional Jump:

Conditional jumps are always short jumps in the 8086.
These instructions will cause a jump to a label given in the instruction if the
desired condition(s) occurs in the program before the execution of the
instruction.
The destination must be in the range of -128 bytes to +127 bytes from the
address of the instruction after the conditional transfer instruction.
1f the Jump is not taken execution simply goes on to the next instruction.

Figure 1.26 Jump Instructions

1.4.8. ITERATION CONTROL INSTRUCTIONS:

These instructions are used to execute a series of instructions some number of
times. The number is specified in the CX register.
The CX register is automatically decrementedby one, each time after execution
of LOOP instruction.
66
Until CX = 0, execution will jumpto a destination specified by a label in the
instruction. The destination address for thejump must be in the range of -128
bytes to +127 bytes.

67
 Instruction codeDescription Condition for exit
1. LOOP Loop through a sequence CX = 0
of instructions
2. LOOPE / LOOPZ Loop through a sequence CX =0 or ZF=0
of instructions
3. LOOPNE/ LOOPNZ Loopthrough a sequence of CX = 0 or ZF = 1
instructions
Table 1.8Iteration Control Instructions

1.4.9 MACHINE CONTROL AND MISCELLANEOUS INSTRUCTIONS

STC Instruction:
This instruction sets the carry flag; STC does not affect any other flag.
CLC Instruction:
This instruction resets the carry flag to Zero. CLC does not affect anyother flag.
CMC Instruction:
This instruction complements the carry flag. CMC does but affect anyother flag.
STD Instruction:
This instruction is used to set the direction flag to one.
SIand/or DI can be decremented automatically after execution of string
instructions. STD does not affect any other flag.
CLD Instruction:
This instruction is used to reset the direction flag to zero.
SIand/or Dl can be incremented automatically after execution of string
instructions. CLDdoes not affect any other flag.

STI Instruction:
This instruction sets the interrupt flag to
one. This enables INTRinterrupt of the
8086.
STI does not affect any other flag.

CLI Instruction:
This instruction resets the interrupt flag to zero.
Due to this 8086 willnot respond to an interrupt signal on its
INTR input. CLI does not affect any other flag.

HLT Instruction:
The HLT instruction will cause the 8086 to stop fetching and
executinginstructions. The 8086 will enter a halt state.

WAIT Instruction:
When this instruction executes, the 8086 enters an idle condition whereit is
doing no processing.
The 8086 will stay in this idle state until a signal is asserted onthe 8086 TEST
input pin, or until a valid interrupt signal is received on the INTR or theNMI
interrupt input pins.
WAIT affects no flags. The WAIT instruction is used to synchronize the 8086 with
externalhardware such as the 8087 math coprocessor.

ESC Instruction:
This instruction is used to pass instructions to a coprocessor such as the8087
68
math coprocessor
When the 8086 fetches an ESC instruction, the coprocessor decodes the
instruction The 8086 treats the ESC instruction as a NOP

69
 LOCK Instruction:
The LOCK prefix allows a microprocessor to make sure that another
processordoes not take control of the system bus.
The LOCK prefix is put in front of the critical [Link] an instruction
with a LOCK prefix executes, the 8086 will assert its bus lock signaloutput.
This signal is connected to an external bus controller device which then
preventsany otherprocessor from taking over the system bus. LOCK affects no
flags.
Examples:
LOCK XCHG SEMAPHORE, AL ; The XCHG instruction requires two
busaccesses.
: The LOCK prefix prevents another processor
from taking control of the system bus between
the two accesses.

NOP Instruction:
At the time of execution of NOP instruction, no operation is performedexcept
fetch and decode. It takes three clock cycles to execute the instruction.
NOPinstruction does not affect any flag.
This instruction is used to fill in time delays or todelete and insert instructions
in the program while trouble shooting.

CBW: Convert Signed Byte to Signed Word

This instruction copies the sign of a byte in AL to all the bits
in AH. CBW does notaffect any flag.
Example:
; AX = 0000 0000 1001 1010
CBW ; convert signed byte in AL to signed word in
AX
; Result: AX = 1111 11111001 1010

CWD: Convert Signed Word to Signed Double Word.

This instruction copies the sign bit of a word in AX to all the bits of the DX register
CWD does not affect any flag.
Example:
; DX =0000 0000 0000 0000
; AX = 1001 0000 1001 0001
CWD ; Convert signed word in AX to signed double word in DX : AX
; Result: DX = 1111 1111 1111 1111
AX = 1001 0000 1001 0001

1.4.10 INTERRUPT INSTRUCTIONS

INT Instruction:
Format: INT Type
The term type in theinstruction refers to a number between 0-255 which
identifies the interrupt.
The address ofthe procedure is taken from the memory whose address is four
times the type number.

INTO Instruction:
70
If the overflow flag is set, this instruction will cause an indirect far callto a
procedure The 8086 will read anew value for IP from address 000IOH and a
new value of CS from addresses 00012H.

71
IRET Instruction:
The IRET instruction is used at the end of the interrupt service routine to
return execution to the interrupted program.
The 8086 copies return address from stack into IP and CS registers and the
stored value of flags back to the flag register.

1.5 ASSEMBLER DIRECTIVES

1.5.1 Assembler directives
TheAssembler directives enable to control the way in which a program
assembles and lists.
They act during the assembly of a program and do not generate any executable
machine Code.
There are many specialized assembler directives are,

ALIGN, ASSUME, .CODE, .DATA, DB, DW, DD, DQ, and DT, DUP
END, EQU, EVEN, EXTRN, GROUP, LABEL, LENGTH, MACRO and ENDM
NAME, .MODEL, OFFSET, ORG, PTR, PAGE, PROC and ENDP
PUBLIC, SHORT, .STACK, TITLE, TYPE
Assembler Directives:
1) ASSUME
2) DB - Defined Byte.
3) DD - Defined Double Word
4) DQ - Defined Quad Word
5) DT - Define Ten Bytes
6) DW - Define Word

[Link] ASSUME Directive

The ASSUME directive is used to tell the assembler that the name of the logical
segment should be used for a specified segment.
The 8086 works directly with only 4 physical
segments: a Code segment,
a data
segment, a
stack
segment,
an extra segment.
Example:
ASUME CS: CODE; CODE contains the Instruction statements for the program and
should be treated as a code segment.
ASUME DS: DATA; Any instruction which refers to a data in the data segment, data will
found in the logical segment DATA.

[Link] DB Directive:
DB directive is used to declare a byte type variable or to store a byte in memory
location.
Example:
1. PRICE DB 49h, 98h, 29h ;Declare an array of 3 bytes, named as PRICE and initialize.
2. NAME DB ‘ABCDEF’; Declare an array of 6 bytes and initialize with ASCII code for
letters
3. TEMP DB 100 DUP (?); Set 100 bytes of storage in memory and give it the name as
TEMP,

72
[Link] DW Directive
The DW directive is used to define a variable of type word or to reserve storage
location oftype word in memory.
Example:
MULTIPLIER DW 437Ah; this declares a variable of type word and named it
asMULTIPLIER. This variable is initialized with the value 437Ah when it is loadedinto
memory to run.

73
EXP1 DW 1234h, 3456h, 5678h; this declares an array of 3 words and initialized with
specified Values.

[Link] STOR1 DW 100 DUP(0) Directive;

Reserve an array of 100 words of memory and initialize all wordswith 0000. Array is
named as STOR1.

[Link] END Directive

END directive is placed after the last statement of a program to tell the assembler
that thisis the end of the program module.

[Link] ENDP Directive

ENDP directive is used along with the name of the procedure to indicate the end of
aprocedure to the assembler.
Example:
SQUARE_NUM PROCE; It start the procedure; some steps to find the square root of a
number
SQUARE_NUM ENDP; Hear it is the End for the procedure.

[Link] END - End Program

[Link] ENDP - End Procedure
[Link] ENDS- End Segment
[Link] EQU - Equate
[Link] EVEN - Align on Even Memory Address
[Link] EXTRN

[Link] ENDS Directive

This ENDS directive is used with name of the segment to indicate the end of that
logicsegment.
Example:
CODE SEGMENT; It Start the logic segment containing code some
instructionsstatements to perform the logical operation.
CODE ENDS; End of segment named as CODE

[Link] EQU Directive

This EQU directive is used to give a name to some value or to a symbol.
Each time the assembler finds the name in the program, it will replace the
name with the value or symbol yougiven to that name.
Example:
FACTOR EQU 03H; the starting of your program and later in the program can use this
ADD AL, FACTOR ; if FACTOR is used many no of times in aprogram and you want to
change the value, all you had to do is change the EQU statement atbeginning, it will
changes the rest of all.

[Link] EVEN Directive

This EVEN directive instructs the assembler to increment the location of the
counter tothe next even address
If the word is at even address 8086can read a memory in 1 bus cycle.
If the word starts at an odd address, the 8086 will take 2 buscycles to get the
data.
Example:
DATA1 SEGMENT; Location counter will point to 0009 after assembler reads next
statement
SALES DB 9 DUP(?) ;declare an array of 9 bytes
74
EVEN; increment location counter to 000AH
RECORD DW 100 DUP ( 0 ) ;Array of 100 words will start from an even address for
quickerread
DATA1 ENDS

75
[Link] GROUP - Group Related Segments
[Link] LABLE
[Link] NAME
[Link] OFFSET
[Link] ORG – Originate

[Link] GROUP Directive

The GROUP directive is used to group the logical segments named after the
directiveinto one logical group segment.

[Link] INCLUDE Directive

This INCLUDE directive is used to insert a block of source code from the namedfile
into the current source module.
[Link] PROC - Procedure
[Link] PTR - Pointer
[Link] PUBLC
[Link] SEGMENT
[Link] SHORT
[Link] TYPE

[Link] PROC Directive

The PROC directive is used to identify the start of a procedure. The term near or far
isused to specify the type of the procedure.
Example:
SMART PROC FAR;this identifies that the start of a procedure named as SMART
and Instructs the assembler that the procedure is far .
SMART ENDP This PROC is used with ENDP to indicate the break of the procedure.

[Link] PTR Directive

This PTR operator is used to assign a specific type of a variable or to a label.
Example:
INC [BX] ;This instruction will not know whether to increment the byte pointed to
by BX or a Word pointed to by BX.
INC BYTE PTR [BX] ;increment the byte pointed to by BX.
This PTR operator can also be usedto override the declared type of
variable. If we want to access the a byte in an arrayWORDS DW
437Ah, 0B97h, MOV AL, BYTE PTR WORDS

[Link] PUBLIC Directive

The PUBLIC directive is used to instruct the assembler that a specified name or
labelwill be accessed from other modules.
Example:
PUBLIC DIVISOR, DIVIDEND; these two variables are public so these are available to
allmodules. If an instruction in a module refers to a variable in another assembly
module, we can access that module by declaring as EXTRN directive.

[Link] TYPE Directive

TYPE operator instructs the assembler to determine the type of a variable
anddetermines the number of bytes specified to that variable.
Example:
Byte type variable – assembler will give a value 1
Word type variable – assembler will give a value 2
Double word type variable – assembler will give a value 4
ADD BX, TYPE WORD_ ARRAY;hear we want to increment BX to point to next
word in an array of words.
76
[Link] MACROS:
Macros are just like procedures, but not really. Macros Look like procedures,
but they exist only
Until your code is compiled
After compilation all macros are replaced with real instructions.
If you declared a macro and never used it in your code, compiler will imply
ignore it.
Example:
Macro definition:
name MACRO [parameters,...]
<instructions>
ENDM

Unlike procedures, macros should be defined above the code that uses it,
for example: MyMacro MACRO p1, p2, p3
MOV AX, p1
MOV BX, p2
MOV CX,
p3 ENDM
ORG 100h
MyMacro 1, 2, 3
MyMacro 4, 5,
DX RET
The above code is expanded
into: MOV AX, 00001h
MOV =X,
00002h MOV
CX, 00003h
MOV AX,
00004h MOV
BX, =0005h
MOV CX, DX

Some important facts about macros and procedures:

1) When you want to use a procedure you should use =B>CALL
instruction, For example: CALL MyProc =/FONT
When you want to use a macro, you can just type its
name. For example: MyMacro =/FONT>
2) Procedure is located at some specific address in memory, and if you use the
same procedure 100 times, the CPU will transfer control to this part of the
memory.
The control will be returned back to the program by RET instruction. The
=B>stack is used tokeep the return address.
The CALL instruction takes about 3 bytes, so the size of the output executable
file =rows very insignificantly, no matter how many time the procedure is
used.
Macro is expanded directly in program's code. So if use the same macro 100
times, the compiler expands the macro 100 times, making the output
executable file larger andlarger, each time all instructions of a macro are
inserted.
3) In stack or any general purpose registers to pass parameters to
procedure. To pass parameters to macro, you can just type them
after the macro name. For example:MyMacro 1, 2, 3

77
4) To mark the end of the macroENDMdirective is enough.
To mark the end of the procedure, you should type the same of the procedure
before the
ENDP directive.

78
Summary Of Assembler Directives:

Figure 1.27 Summary of Assembler Directives

79
 1.6 Assembly language programming

There are three language levels that can be used to write a program
1. Machine level language
2. Assembly level language
3. High level language programs
1.6.1 Machine Level Language Programs
A program which has simply a sequence of the binary codes for the instructions
iscalled machine level language program.

1.6.2 Assembly Language Programs:

Programmers write programs in assemblylanguage. They then translate the
assembly language program to machine language so thatit can be loaded into
„memory and executed.
Assembly language uses two, three or four letter words to represent each
instruction types these words are referred to asmnemonics.
The letters in an assembly language mnemonic are usually initials or
ashortened form of theEnglish word(s) for the operation performed by the
instruction.
Forexample, the mnemonic for addition is ADD, the mnemonic for logic AND
operation isAND, and the mnemonic for the instruction for copy data from one
location to another isMOV.

1.6.3 Assembly Instruction Format:

The assembly text is usually divided into fields, separated by spaces and
tabs. Aformat for assembly language program can be given as
Label: Mnemonic Operand l, Operand 2; Comment
The first held, which is optional, is the label field, used to specify symbolic
labels. Alabel is an identifier that is assigned to the address of the first byte
of the instruction in
The second field is mnemonic, which is compulsory. All instructions must
contain amnemonic.
The third and following fields are operands. The operandsdepends on the
instruction. If there are two operands, they are separated by a comma.
The last field is a comment field. It begins with a delimiter such as the
semicolon.

Figure 1.28 Instruction Format

80
1.6.4 Comparison between various micro computer languages

Figure 1.29 Comparison between various micro computer languages

1.6.5 Assembly process

Developing and execution steps of assembly language.

Figure 1.30 Developing and execution steps of assembly language

81
 The first step in the development process is to write an assembly
language program. The assembly language program can be written with
an ordinary text editor.
The assembly language program text is an input to the assembler.
Theassembler translates assembly language statements to their binary
equivalents, usuallyknown as object code.
Assemble Time:
Time required translating assembly code to object code is called assembletime.
During assembling process assembler checks for syntax errors and
displaysthem before giving object code module,
Object code module:
The object code module contains the information about where the program or
module to be loaded in memory.
If the object code module is to be linked with other separatelyassembled
modules then it contains additional linkage information.
Link time:
Assembled modules are combined into one single load module, by the linker.
The linkeralso adds any required initialization or finalization code to allow the
operating system tostart the program running and to return control to the
operating system after the program has completed.

[Link] ASSEMBLER
Assembler translates a source file that was created using theeditor into
machine language such as binary or object code.
The assembler reads thesource file of our program from the disk where we
saved it after editing.
An assemblerusually reads our source file more than once.
The assembler generates two files on the floppy or hard during these two
passes.
1) Thefirst file is called the object file. The object file contains the
binary codes for theinstructions and information about the addresses
of the instructions.
2) The second filegenerated by the assembler is called assembler list file.
This file contains the assemblylanguage statements, the binary code
for each instruction, and the offset for each instruction.
In the first pass, the assembler performs the following operations:
1) Reading the source program instructions.
2) Creating a symbol table in which all symbols used in the program,
together withtheir attributes, are stored.
3) Replacing all mnemonic codes by their binary codes.
4) Detecting any syntax errors in the source program.
5) Assigning relative addresses to instructions and data.
On a second pass through the source program, the assembler extracts the
symbol from the operand field and searches for it in the symbol table.
If the symbol does not appear in the table, the corresponding statement is
obviously erroneous. If the symbol does appear inthe table, the symbol is
replaced by its address or value.
We can use a suitable Editor to type .asmfile. We can convert object file
from .asm fileusing popular assemblers MASM (Microsoft macro assembler) or
TASM (Turbo assembler).
The command on command prompt performing this operation is as given below

82
 C:\ MASM\ BIN\> MASM [Link]
Where [Link] is name of the .asm file which is to be converted to .obj file.

83
[Link] LINKER

A linker is a program used to join together several object files into one large
object file. When writing large programs, it is usually much more efficient to
divide the large program into smaller modules.
Each module can be individually written, tested anddebugged.
When all the modules work, they can be linked together to form a
largefunctioning program.
The command on command prompt for converting .obj file to .EXE files as
given below: C: \ MASM BIN \ > LINK [Link];

1.6.6 Translation of assembler instructions:

The instructions of 8086 vary from 1 to 6 bytes in length.
The figure 1.31 shows theinstruction formats for 1 to 6 bytes
instruction format The first field is theoperation code field, commonly
known as opcode field.
Opcode field indicates the type ofoperation lo be performed by the
processor. The other field in the instruction format isoperand field.
The operand field may consists of source/destination operand, sourceoperand
address,destination operand address or next instruction address,
The operand (displacement) may be either 8-bit or 16-bit longdepend on the
instruction and its addressing mode.
The opcode/addressing mode byte(s) may be followed by:
1) No additional byte
2) Two byte EA (For direct addressing only).
3) One or two byte displacement
4) One or two byte immediate operand
5) One or two byte displacement followed by a one or two byte immediate
operand

8066 has special 1-bit indicators. They are:

W-bit:
W-bit in theopcode of such instruction specify whether instruction is a byte
instruction(W
D-bit: = 0) or a word instruction (W = I).

The D-bit in the opcode of the instruction indicates that the register
S-bit: specifiedwithin the instruction is a source register (D = 0) or destination
register (D =1).

An 8-bit 2s complement number can be extended to a 16-bit 2‟s

complementnumber All of the bits in the higher-order byte equal the
mostsignificant bit in the low order byte. This is known as sign extension.
The S-bitalong with the W-bit indicate:

V-bit:
Figure 1.31 Operations of S and W

84
 uction shifts or rotates 2-bits.
V-
bit
dec
ide
s
the
nu
mb
er
of
shif
ts
for
rota
te
and
shif
t
inst
ruct
ion
s. if
V=
0,th
en
cou
nt
=1;
if
V=
1,
the
cou
nt
is in
CL
regi
ster
.
For
exa
mple
, if V
=I
and
CL
=2th
en
shift
or
rotat
e
instr
85
 Figure 1.32 Addressing Modes

Z-bit:
It is used for string primitives such as REP for comparison with ZF Flag.
1f it is 1, the instruction with REP prefix is executed until the zero flag matches
theZ-hit.

Figure 1.33 Two Opcode Addressing Modes

Where Mod, Reg and R/M fields specify operand as described in the following tables.

86
Figure 1.34 Mod Field Assignment

87
 Figure 1.35 REG Field Assignment

Figure 1.36 R/M Field Assignment

1.6.7 Assembly Language Programming Guidelines:

a) What is an optimum solution? :
Takes minimum memory space for the program and minimum time for
theexecution of a task.
Consider space for program storage (program length), space for data
storage and spaceused by the stack.
b) Use of proper instructions:
More than one set of instructions are available to perform particular
function. Forexample, if the function is add 01 in the BX register of 8086
we have twooptions: ADD BX, 0001H or INC BX.
Check the spaceand time for both the options and then select the option which
requires lessspace and time.
The instruction ADD BX, 000IH is 4 byte Instruction and requires 4 clock cycles
execute. The INC BX is a single byte instructionand requires 2 cycles for the
execution.
c) Use of advanced instructions:
Write a program to move ablock of data from the source to destination location
a programmer mayinitialize a pointer to indicate source location, a pointer to
indicate destinationlocation
Aftertransfer of one data element from source to destination location
programmermay use INC. DEC and JNZ instructions to increment source
and destinationpointers, decrement counter and to check whether all data

88
elements aretransferred or not, respectively.

89
The part listing of the program with both the approaches and then we compare them.

1. Part listing of program with general approach

MOV SI, 1000H : Initialize source pointer
MOV DI, 2000 H ; Initialize destination
pointer MOV CX, 0020 H ; Initialize counter
BACK: MOV AX, [SI] ; Get data element from
source MOV [DI], AX : Store it at
destination
INC SI ; Increment source
pointer INC DI ; Increment destination
pointer DEC CX ; Decrement counter
JNZ BACK ; if count is not zerorepeats

Use of proper addressing modes:

Easily make out that the register addressing takes less time to accessoperand
than the index and indirect addressing modes.
It is obvious that whenoperands are available in CPU registers they are
immediately available for Operation.
Fetching operands takes more time.
Store most ofthe operands in the CPU
registers. CPU registers are limited
innumbers.

Prepare documentation:
1. Description of the purpose of the program module.
2. In case of subroutine program list of passing parameters and return value.
3. Register and memory locations used.
4. Proper comments for each instruction used.

1.7 MODULAR PROGRAMMING

Programming tasks is divided into subtasks, separate modules are written for
performing subtasks.
Each module is tested separately.
The common routines required in modules are written in separate module and
they are called from individual modules.
Programming done in this fashion is called modular programming
Advantages of modular programming:
Code is short, simple and easy to
understand To make development is
faster.
It is easier to design, test, and debug a single module as compared to an entire
program. The scoping of variables can easily be controlled
Documentation can be easily understood
Retype the codes frequently modules are stored into the libraries and used
by several programs
It is easy to do modifications if any in a single module rather than in a program

The assembly languages components are classified into 4 types

1) Linking and Relocation.
2) Structures
3) Procedures or subroutines
90
4) Macros

91
 1.8 LINKING AND RELOCATION

Figure 1.37 Steps in program development and execution

The DOS linking program links the different object modules of a source
program and Function library routines.
To generate an integrated executable code of the source program.
The main input to the linker is the .OBJ file that contains the objectmodules of
the source programs.
Other supporting information may be obtained fromthe files generated by the
MASM. The linker program is invoked using the following options.
C> LINK
Or
C>LINK [Link]
The .OBJ extension is a must for a file to be accepted by the LINK as a valid object
file. The first object may generate a display asking for the object file, list
file and libraries asinputs and an expected name of the .EXE file to be
generated.
The output of the linkprogram is an executable file with the entered filename
and .EXE extension.
Thisexecutable filename can further be entered at the DOS prompt to execute
the file.
In the advanced version of the MASM, the complete procedure ofassembling and
linking is combined under a single menu invokable compile function.
A linker links the machine codes with the other required assembledcodes.
The linked file in binary for run on a computer is commonly known asexecutable

92
file or simply „.exe.‟ file.
The DOS linking program links the different object modules of a
sourceprogram and function library routines to generate an integrated
executable code of thesource program.

93
 The main input to the linker is the .OBJ file that containsthe object modules of
the source programs.
The linked file in binary for run on a computer is commonly known asexecutable
file or simply „.exe.‟ file.
After linking, there has to be re-allocation of thesequences of placing the codes
before actually placement of the codes in the memory.
The loader program performs the task of reallocating the codes after finding
thephysical RAM addresses available at a given instant.
The loader is a part of the operating system and places codes into thememory
after reading the „.exe‟ file.
Memory addresses may not start from 0x0000, and binary codes have to be
loaded at thedifferent addresses during the run.
The loader is used and it loads into a section of RAM the program
A program called locator reallocates the linked file and createsa file for
permanent location of codes in a standard format.
1.8.1 Segment combination
The assembler provides a means of regulating the waysegments in different
object modules are organized by the linker.
Segments with samename are joined together by using the modifiers attached
to the SEGMENT directives.
SEGMENT directive may have the form
Segment name SEGMENT Combination-type
Where the combine-type indicates how the segment is to be located
within the loadmodule.
Segments that have different names cannot be combined and segments
with thesame name but no combine-type will cause a linker error.
The possible combine-typesare:
PUBLIC
If the segments in different modules have the same name and combine-type
PUBLIC. Then they are concatenated into a single element in the load module.

COMMON
If the segments in different object modules have the same name and
theCombine-type is COMMON.
STACK
If segments in different object modules have the same name and the
combine type STACK.
One segment whose length is the sum of the lengths ofthe individually
specified segments.
AT
The AT combine-type is followed by an expression that evaluates to a
constantwhich is to be the segment address.
It allows the user to specify the exact location of thesegment in memory.
MEMORY
The segment to be placed at the last of the loadmodule. If more than one
segment with the MEMORY combine-type is being linked.
The below figure shows the combined type of PUBLIC and COMMON .the
use of PUBLIC eliminates the need to change the contents of the CS register
as the program passes between sets of instruction within the code segment.

94
Data segments can be given the PUBLIC combine type to cause the several
set of data to be combined into one larger set.
The COMMON combine type creates a pool of locations.
STACK provides a one stack that can be shared by several modules.

95
Figure 1.38 Generated Load Modules

96
 Figure 1.39 Source Modules 1 and 2

1.8.2 Access to External Identifiers

If an identifier is defined in an object module, then it is said to be a local (or
internal) Identifierrelative to the module.
If it is not defined in the module but is defined in one ofthe other modules
being linked, then it is referred to as an external (or global) identifierrelative to the
module.
Each module in multi-module programs maycontain two lists, one containing
the external identifiers that can be referred to by othermodules.
Two lists are implemented by the EXTRN and PUBLIC directives, which havethe
forms:
EXTRN Identifier: Type…, Identifier: Type
and
PUBLIC Identifier… Identifier
Where the identifiers are the variables and labels
External identifiers before it can generate theproper machine
code. Specified must be associated with each identifier in
anEXTRN statement. For a variable the type may be BYTE,
WORD, or DWORD and
For a label it maybe NEAR or FAR.

1.9 STACKS
The information is written on the stack, the operation is called [Link]
information is read from the stack, the operation is called POP.
1.9.1 Stack Structure of 8086/88
The 8086/88 has a special 16-bit register, SP to work as a stack pointer.
Thestack pointer (SP) register contains the 16-bit offset from the start of the
segment to the top of stack.
Physical address is produced by adding thecontents of stack pointer register
to the segment base address in SS.
Thecontents of the stack segment register are shifted four bits left and the
contents of SP are added to the shifted result.
If the contents of SP are 9F20H and SS are 4000Hthen the physical address.
SS = 4000H after shifting four bits left SS =
40000H Now
SS 40000H

97
+ SP 9F20H

Physical address

49F20H End of stack

segment 4FFFFH

98
1.9.2 PUSH and POP Operations
Stores the present contents of the registers in the stack with thehelp of PUSH
instruction. Loads the previous contents of the registerfrom the stack with the
help of POP instruction.
PUSH Operation:
The PUSH instruction decrements stack pointer by two and copies a word
fromsome source to the location in the stack where the stack pointer points.
Thesource must be a word (16 bit).
The source of the word can be a general purposeregister, a segment register or
memory.

POP Operation:
The POP instruction copies a word from the stack location pointed by the
stackpointer to the destination.
The destination can be a general purpose register, asegment register, or a
memory location.
After the word is copied to the specifieddestination, the stack pointer is
automatically incremented by 2.

1.9.3 CALL Operation

The CALL instruction is used to transfer execution to a subprogram
orprocedure. There are two basic types of CALLS,
1) Near
2) Far
A near CALL is a callto a procedure which is in the same code segment
as the CALL instruction.
A far CALL is a call to a procedure which is in a different segment from
thatwhich contains the CALL instruction.
1.9.4 RET Operation
The RET instruction will return execution from a procedure to the
nextinstruction after the CALL instruction in the calling program.
If the procedure is anear procedure the returnwill be done by replacing
the instruction pointer with a word from the top of thestack.
If the procedure is a far procedure then the instruction pointer will be
replaced by the wordat the top of the stack.
The stack pointer will then be incremented by two.
1.9.5 Overflow and Underflow of Stack
During PUSH operation stack pointer isdecremented
by two. Maximum length of stack segment is 64K.
One time the contents of SP willbe 0000H. Any further attempt to PUSI-l
data on the stack will result instack overflow.
On the other hand, at onetime the contents of SP will be FFFFH. Any
further attempt to POP data from thestack will result in stack underflow.

1.10 PROCEDURES
The procedure is a group of instructions stored as a separate program in the
memory and it is called from the main program.
The type of procedure depends on where the procedure is stored in the

99
memory.
Two types of procedures:
1) Near Procedure
2) Far procedure
Near Procedure and Far Procedure:

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0
 If it is in the same code segment where the main program is stored then it is
called near procedure otherwise it is referred to as far procedure.
For near procedure CALL instruction pushes only the IP register contents on
the stack For far procedures CALL instruction pushes both IP and CS on the
stack.

1.10.1 Reentrant Procedure.

Procedure 1 is called from main program,procedure2 is called from procedure1

and procedure 1 is again called from procedure2.
Program execution flow reenters in the procedure 1. This type ofprocedures is
called reentrant procedures.
The flow of program execution forreentrant procedure is shown in Fig.1.40

Figure 1.40 Flow Diagram and Pseudo code for Reentrant procedure

1.10.2 Recursive Procedure

A recursive procedure is a procedure which calls itself.

Recursive procedures are used to work with complex data structures
called trees Figure shows the flow diagram and pseudo-code for recursive
procedure.

Figure 1.41Flow Diagram and Pseudo code for recursive procedure

1.10.3 Passing parameters:

There are four ways to pass parameters to and from the procedure
10
1
1) Using registers
2) Using general memory
3) Using pointers

10
2
 4) Using stack

[Link]. Passing Parameters Using Registers

The data, to be passed is stored in the registers and these registers are
accessed Inthe procedure to process the data.

Example:
Passing Parameters Using Registers
; Main program
CODE SEGMENT
MOV AL, DATA ; Data to be passed is loaded in the AL register
…..
CALL PRO1
....
; Procedure
PRO1 PROC NEAR
MOV INPUT, AL ; Procedure access the data from AL register
….
RET
PRO1. ENDP
CODE ENDS
[Link]. Passing Parameters Using Memory
To pass few parameters to and from a procedure,registers are a convenient way
to do it. To pass alarge number of parameters to procedure we use memory.
This memory may be adedicated section of general memory or a part of stack.
Example:
Passing using general memory
; Main program
DATA SEGMENT
BCD_INPUT DB 42 ; Storage for BCD
value HEX_VALUE DB ? ; Storage for HEX
value DATA ENDS
CODE SEGMENT
CALL PRO1
; Procedure
PRO1 PROC NEAR MOV
AL, BCD_INPUT MOV
HEX_VALUE, AL RET
PRO1 ENDP CODE
ENDS
[Link]. Passing Parameters Using Pointers
Example:
Passing Parameters Using Pointers
; Main program
DATA
SEGMENT
BCD_INPUT DB 42 ; Storage for BCD
value HEX_VALUE DB ? ; Storage for HEX
value DATA ENDS
CODE SEGMENT
MOV SI, OFFSET BCD_YNPUT
MOV DI, OFFSET REX_VALUE

10
3
CALL PRO1

10
4
 ; Procedure
PRO1 PROC NEAR
MOV AL, [SI] ; Get BCD number pointed by SI in accumulator
MOV [DI], AL ; Store result in location pointed
by DI RET
PRO1 ENDP
CODE ENDS

[Link] Passing Parameters Using Stack

What is pushed on the stack and where the stackpointer points all the time in the
program.

Example:

Passing Parameter Using Stack

; Main program
DATA
SEGMENT
BCD_INPUT DW 4209 ; Storage for BCD
value HEX VALUE DW? ; Storage for HEX
value DATA ENDS
CODE SEGMENT
MOV JX, OFFSET BCD_INPUT
PUSH AX
CALL PRO1
; Procedure
PRO1 PROC NEAR
NOV AX, [BP+2] ; Base pointer is decremented by 2 when the
; Procedure is called. So BCD_INPUT
; is available at location [BP+21.
NOV [BP+2], AX; Store the result on the
stack RET
PRO1 ENDP
CODE ENDS

1.11 MACROS

Macro is a group of instructions. The macro assembler generates the code in

theprogram each time where the macro is „called‟.
Macros can be defined by MACRO andENDM assembler directives.

Example:
Macro definition for initialization of segment registers.

INIT MACRO; Define macro

MOV AX, data;
MOV DS;Body of macro
definition MOV ES AX;
ENDM; End macro

The assembler places the macroinstructions in the program each time when it is
invoked. This procedure is known as Macro expansion.

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5
1.11.1 Comparison of Procedure and Macro

[Link] Procedure Macro

1 Accessed by CALL and RET Accessed during assembly
instruction during with name givento macro when
program defined
execution.
2 Machine code for instructions is Machine code is generated
put onlyonce in the memory. for
instructionseach time when
macro is called.
3 With procedures less memory With macros more memory
is required. is required.
4 Parameters can be passed in Parameters passed as part
registers,memory locations, of statementwhich calls macro.
or stack.
Table 1.9Comparisons of Procedure and Macro
1.11.2 Passing Parameters in Macro
In Macro, parameters are passed as a part of statement which calls Macro.
Example:
PROMPT MACRO MESSAGE ; Define macro with MESSAGE as a
parameter MOVAH, 09H
LEA MESSAGE
INT 21H
ENDM
DATA ;End macro
MES1 DB 10, 13, „Student Name: $
MES2 DB 10, 13, „Student Address:
$
.CODE
START: MOV AX, @data ; Initialize
MOV DS, AX ; data segment
PROMPTMES1 ; Display MES1
PROMPT MES2 ; Display MES2
MOV AH, 4CH ; Return to
DOS INT 21H
END START
1.11.3 Local Variables in a Macro
Body of the Macro can use local variables. To define a localvariable, LOCAL directive is
used.
Example
DISPLAY MACRO A ; Displays ASCII character in
uppercase LOCAL J_LABEL ; Defines J_LABEL as
local
PUSH DX
CMP
AL,‟Z
JBE J_LABEL ; Check if uppercase
SUB AL, 20H ; Convert to
uppercase
J_LABEL: MOV DL,AL
MOV
AH,02H INT
21H POP
10
6
 DX END
1.11.4 Conditional Assembly Statements In Macros
[Link] lF-ELSE-ENDlF Statement
IF - ELSE -ENDIF structure general format for theIF family of conditional statements.
.IF XX (condition)
.ELSE (optional) Conditional Block
. ENDIF (end of IF)

10
7
 EveryIF directive must have a matching ENDIF to terminate atested condition
.ELSE is optional
Statement Function
IF If the expression is true
IFB If the argument is blank
IFE If the expression is not true
IFDEF If the label has been defined
IFNB If argument is not blank
TFNDEF If the label has not been defined
IFIDN If argument 1 equals argument 2
IFDIF If argument 1 does not equal argument 2
Table 1.10 conditional assembly language IF statements

[Link] REPEAT Statement

REPEAT statement is used to repeat macro sequence for a fix numberof time. The
repetition count is specified immediately after the REPEAT statement.

[Link] WHILE Statement

WHILE statement is used to repeat macro sequence until theexpression
specified with it is true.
The WHILE statement allows to use relational operators in its expression.

Operator Function
EQ Equal
NE Not equal
LE Less than or Equal
LT Less than
GE Greater than or Equal
GT Greater than
NOT Logical inversion
AND Logical AND
OR Logical OR
XOR Logical exclusive-OR
Table 1.11Relational Operators used inWHILE statements

[Link] FOR Statement:

A FOR statement in the macro repeats the macro sequence for a list of data.

1.12 INTERRUPTS AND INTERRUPT SERVICE ROUTINES

The most common method of servicing such device is the polled approach.
This is where the processor must test each device in sequence and in effect
“ask” each one if itneeds communication with the processor.
It is easy to see that a large portion of the mainprogram is looping
through this continuous polling cycle.
When a microprocessor isinterrupted, it stops executing its current program
and calls a special routine which“services” the interrupt.
The event that causes the interruption is called interrupt and thespecial
routine executed to service the interrupt is called interrupt
serviceroutine/procedure.
Normal program can be interrupted by three ways:
1. By external signal

10
8
2. By a special instruction in the program or
3. By the occurrence of some condition.

10
9
 1.12.1 Sources of Interrupts in 8086:
8086 Interrupt ca come from any one of the three sources:
1) External signal
2) Special Instructions in the program
3) Condition produced by instruction

[Link] External signal (Hardware Interrupt)

An 8086 can get interrupt from an external signal applied to the nonmaskable
interrupt (NMI) input pin ‚or interrupt (INTR) input pin.

[Link] Special Instruction

8086 supports a special [Link] to execute special program.
At the end of theinterrupt service routine, execution is usually returned to the
interrupted program.

[Link] Condition Produced by Instruction

An 8086 is interrupted by some condition produced in the 8086 by the
execution of an Instruction.
At the end of each instruction cycle 8086 checks to see if there is any interrupt
request. If so, 8086 responds to the interrupt by performing series of actions
(Refer Fig. 1.42).

Figure 1.42 8086 interrupt Response

1. It decrements stack pointer by 2 and pushes the flag register on the stack.
2. It disables the LNTR interrupt input by clearing the interrupt flag in the flagregister.
3. It resets the trap flag in the flag register.
4. It decrements stack pointer by 2 and pushes the current code segment
registercontents on the stack.
5. It decrements stack pointer by 2 and pushes the current instruction
pointercontents on the stack.
6. It does an indirect far Jump at the start of the procedure by loading the CS and
IPvalues for the start of the interrupt service routine (ISR).

The block of memory is often called the interrupt vector table or the interrupt pointer
table.

11
0
 Figure 1.43 8086 interrupt vector table

Fig. 1.43 shows how the 256 interrupt pointers are arranged in the memory table.
Each interrupt type is given a number between O to 255 and the address of
eachinterrupt is found by multiplying the type by 4
E.g. for type 11, interrupt address is11x4=4410= 0002CH
Only first five types have explicit definitions such as divide by zero and non
maskable Interrupt.
The next 27 interrupt types, from 5 to 31, are reserved by Intel for
use in futuremicroprocessors.
The upper 224 interrupt types, from 32 to 255, are available for user
forhardware or software interrupts.
When the 8086 responds to an interrupt, It automatically goes to the specified
location
in the interrupt vector table to get the starting address of interrupt service
routine. So user has to load these starting addresses for different routines at the
start of the program.

1.12.2 8086 Interrupt Types

[Link] Divide by Zero Interrupt (Type O)
When the quotient from either a DIV or 10W instruction is too large to fit in the
resultregister; 8086 will automatically execute type O interrupt.

11
1
[Link] Single Step Interrupt (Type 1)
The type 1 interrupt is the single step trap. In the single step mode, system
willexecute one instruction and wait for further direction from user.

11
2
 An 8086 system is used in the single step mode by setting the trap flag.
If the trap flagis set, the 8086 will automatically execute a type 1 interrupt
after execution of eachinstruction.

[Link] Non Maskable Interrupt (Type 2)

Interrupt cannot be disabled by any software instruction.
This interrupt is activated by low to high transition on 8086 NMI input pin.

[Link] Breakpoint Interrupt (Type 3)

The type 3 interrupt is used to implement break point function in the
system. Thetype 3 interrupt is produced by execution of the INT 3
instruction.
Break point function isused as a debugging
[Link] Overflow Interrupt (Type 4)
The type 4 interrupt is used to check overflow condition after any signed
arithmetic Operation in the system.
The 8086 overflow flag, OF, will be represented in the destinationregister or
memory location.
For example. If you add the 8-bit signed number 0111 1000 (+ 120
decimal) and the 8 bit signed number 0110 1010 (+ 106 decimal), result is
1110 0010 (-98 decimal).
In signednumbers, MSB (Most Significant Bit) is reserved for sign and
other bits representmagnitude of the number.

1.12.3 Software Interrupts

Type 0 - 255:
The 8086 INT instruction can be used to cause the 8086 to do one of the 256
possibleinterrupt types.
To test the NMI routine without needing to apply an external signal to theNMI
input of the 8086.
The IBM PC has in its ROM collection ofroutines, each performing some specific
function such as reading character from keyboard,writing character to CRT.
This collection of routines referred to as Basic Input OutputSystem or BIOS.
The BIOS routines are called with INT instructions.

Summarize interruptresponse and how It is serviced by going through following steps.

1. 8086 pushes the flag register on the stack.
2. It disables the single step and the INTR input by clearing the trap flag and
interrupt flag in the flag register.
3. It saves the current CS and LP register contents by pushing them on the stack.
4. It does an indirect far jump to the start of the routine by loading the new valuesof
CS and IP register from the memory whose address calculated by multiplying 4 to
the interrupt type.
5. Once these values arc loaded in the CS and IP, 8086 will fetch the instruction
fromthe new address which is the starting address of interrupt service routine.
6. An IRET instruction at the end of the interrupt service routine gets the
previousvalues of CS and IP by popping the CS and IP from the stack.
7. At the end the flag register contents are copied back into flag register by
poppingthe flag register form stack.

1.12.4 Maskable Interrupt (INTR)

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3
The 8086 INTR input can be used to interrupt a program
execution. The 8086 isprovided with a maskable handshake
interrupt.
This interrupt is implemented by usingtwo pins - INTR and INTA
This interrupt can be enabled or disabled by STI (IF=1) or CLI(IF=O),
respectively. When the 8086 is reset, the interrupt flag is automatically
cleared(IF=0).

11
4
The 8086 responds to an INTR I interrupt as follows:
1. The 8086 first do two interrupt acknowledge machine cycles as shown in theFig.
1.44 to get the interrupt type from the external device.
In the first interrupt acknowledge machine cycle the 8086 floats the data bus lines
AD0-AD15 and sendsout an INTA pulse on its INTA output pin.
During the second interrupt acknowledge machine cyclethe 8086_sends out another
pulse on its INTA output pin

Figure 1.44 Interrupt acknowledge machine cycle

2. Once the 8086 receives the Interrupt type, it pushes the flag register on the
stackclears TF and IF, and pushes the CS and IP values of the next instruction on
thestack.
3. The 80S6 then gets the new value of IP from the memory address equal to 4
timesthe interrupt type (number), and CS value (rom memory address equal to 4
timesthe interrupt number plus 2.

1.13 Byte and String Manipulation.

1.13.1 String Manipulation Instruction:

1) MOVS/MOVSB/MOVSW Instruction
These instructions copy a byte or word from a location in the data segment
to a location in the extra segment.
The offset of the source byte or word in the data segment must be in the SI
register. The offset of the destination byte or word in the data segment
must be in the DI register.

Examples:
CLD ; Clear Direction Flag to auto increment SI
and DI MOV AX, 0000H
MOV OS, AX ; Initialize data segment register
to 0 MOV ES, AX ; Initialize extra segment
register to 0
MOV SI, 2000H ; Load offset of start of source string
into SI MOV DI, 2400H ; Load offset of start of
destination into DI MOV CX. 041-1 ; Load length of
string In CX as counter
REP MOVSB ; Decrement CX and MOVSB until CX will be 0.

After move SI will be one greater than offset of last byte in source string. D! will be
none greater than offset of last byte of destination string. CX will be 0.

2) REP / REPE / REPZ /REPNE/REPNZ Prefix:

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5
REP is a prefix which is written before one of the string
instructions. These instructions repeat until specified
condition exists.

11
6
 Instruction Code Condition for Exit
REP CX=0
REPE/ REPZ CX =0 or ZF = 0
REPNE / REPNZ CX =0 or ZF=1
Table 1.12 Repeat Conditions
Examples:
REPZ CMP SB ; Compare string bytes until CX = 0; or until string bytes not equal.

3) LODS / LODSB / LODSW

This instruction copies a byte from a string location pointed to by SI to AL, or
a wordfrom a string location pointed to by SI to AX.
LODS does not affect any flags. LODS copies byte and LODSW copies a word,
Examples:
CLD ; Gear direction flag so SI is auto
incremented MOV SI, OFFSET S_STRING ; Point ST at string
WDS S_STRING.

4) STOS / STOSB / STOSW

The STOS instruction copies a byte from AL or a word from AX to a memory
location in the extra segment.
DI Is used to hold the offset of the memory location in the extra segment.
After the copy, DI is automatically incremented or decremented to point to the
next string element in memory.
If the direction flag, DF, is cleared, then DI will automatically be incremented
by one for a byte string or incremented by two for a word string.
If the direction flag is set, DI will be automatically decremented by one for a
byte string or decremented by two for a word string.
STOS does not affect any flags. STOSB copies byte and STOSW copies a word.
Examples:
MOV Dl, OFFSET D_STRING ; Point DI at destination string
STOS D_STRING ; Assembler uses string name to determine
; Whether string is of type byte or type word.
; If byte string, then string byte replaced
; With contents of AL If word string, then
; String word replaced with contents
of AX MOV DI, OFFSET D_STRING ; Point DI at destination string
STOSB ; “B” added to 5105 mnemonic directly
; tells assembler to replace byte in string with byte
from
; AL STOSW would tell assembler directly to replace a
; Word in the string with a word from AX.

1.13.2Byte Manipulation Instruction:

AND Instruction:
Format: AND destination, source.
AND operation with two inputs produces result logic 1 only when both the
inputs are logic
1.i.e. Y = A B.
A B Y
0 0 0
0 1 0
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 1 0 0
1 1 1
Table 1.13 Truth Table for AND gate

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 This instruction logically ANDs each bit of the source byte or word with the
corresponding bit in the destination and stores result in the destination.
The source may be an immediate number, a register or a memory
location. The destination may be a register or a memory location.
The source and destination both cannot be memory locations in the same
instruction. The CF and OF are both 0 after AND. The PF, SF and ZF are
affected.
AF is undefined.
Examples:
1. ; AL=10010011=93H
; BL = 0111 0101 = 7511
AND BL,AL ;ANDbyteinALwithbyte in BL
; BL = 0001 0001 = 11H

2. ; CX = 0110 1011 1001 1110

AND CX, 00F0H ; CX = 0000 0000 1001 0000
The AND operation clears bits of a binary number. The task of clearing a bit in
abinary number is called masking.

Figure 1.45 Masking Using AND Operation

OR Instruction:
Format: OR destination, source.
OR operation with two inputs produces result logic 1 when any one or both inputs
arc logic 1. i.e., Y = A + B.
A B Y
0 0 0
0 1 1
1 0 1
1 1 1
Table 1.14 Truth Table for OR gate
This instruction logically ORs each bit of the source byte or word with the
corresponding bit in the destination and stores result in the destination.
The source may be an immediate number, a register or a memory
location. The destination may be a registeror a memory location.
The source and destination both cannot be memory locations in the same
instruction. The CF and OF are both 0 after OR.
The PF, SF and ZF are affected. AFis undefined.
Examples :
1. ; AL = 1001 0011 =
93H
; BL = 0111 0101 = 75K
OR BL, AL ; OR byte in AL with byte in BL.
. ;BL=1111O111=F7H
2. ; CX = 0110 1011 1001 1110
OR CX, 00F0H ; CX 0110 1011 1111 1110
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The OR instruction is used to set (make one) any bit in the binary number.

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 Figure 1.46 Masking Using AND Operation
XOR
Instruction
:
Format: XOR destination, source.
XOR operation produces result logic 1 when odd number of inputs are logic 1 i.e.
Y=Aa +aA
A a Y
0 0 0
0 1 1
1 0 1
1 1 0
Table 1.15 Truth Table for XOR gate
This instruction logically XORs each bit of the source byte or word with the
corresponding bit in the destination and stores result in the destination.
The source may be an immediate number, a register or a memory
location. The destination may be a register or a memory location.
The source and destination both cannot be memory locations in the same
instruction. The CF and OF are both 0 after XOR. The PF, SF and ZF are
affected. AF is undefined.
Examples:
1. ; AL = 1010 1111 =
AFH
; BL = 1111 0000 = F0H
XOR BL, AL ; XOR byte in AL with byte in BL
; BL = 0101 1111 = 5FH
The XOR instruction is used if some bits of a register or memory location
must be inverted. This instruction allows part of a number to be inverted
or complemented.

Figure 1.47 Masking Using AND Operation

NOT
Instruction
:
Format: NOT destination.
The NOT instruction inverts each bit of a byte or a word. The destination can
be register or a memory location.
Flags: NOT instruction affects no flag.
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Examples:
; AL = 0110 1100
NOTAL ; AL= 10010011
; CX=1010 1111 0010 0110
NOT CX ; CX = 0101 0000
11011001

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 Part-A (2 Marks Questions and Answers)
1. What is Microprocessor? Give the power supply & clock frequency of 8085. (Nov 2011)
A microprocessor is a multipurpose, programmable logic device that reads
binary instructions from a storage device called memory accepts binary data as
input and processes data according to those instructions and provides result as
output. The power supply of 8085 is
+5V and clock frequency in 3MHz.

2. List few applications of microprocessor-based system.

a) For measurements, display and control of current, voltage,temperature, pressure,
etc.
b) For traffic control and industrial tool control.
c) For speed control of machines.

3. What is Stack pointer?

Stack pointer is a 16 bit register. This register is always incremented/
decremented by 2. It is used as a memory pointer. The beginning of the stack is
defined by loading a 16-bit address in the stack pointer.

4. What is the function of program counter? (Nov 2011)

The function of the program counter is to point the memory address from
which the next byte is to be fetched. When a byte is being fetched the PC is
incremented by one to point to the next memory locations.

5. Define opcode and operand.

Opcode is the part of an instruction that identifies a specific operation.
Operand is a part of an instruction that represents a value on which the
instruction acts.

6. What are the I/O instructions are used in 8086?

The I/O instructions are as
follows: IN (Initiate Input
Operation)
OUT (Initiate Output Operation)

7. What are the different functional units in 8086?

Bus Interface Unit and Execution unit are the two different functional units in 8086.

8. What does EU do?

Execution Unit receives program instruction codes and data from BIU, executes
instructions and store the result in general registers.

9. Which Stack is used in 8086?

FIFO (First in First Out) stack is used in [Link] this type of Stack the first stored
information is retrieved first.

10. Discuss the function of instruction Queue in 8086?

In 8086, a 6-byte instruction queue is presented at the Bus Interface Unit
(BIU). It is used to prefetch and store at the maximum of 6 bytes of instruction code
from the memory. Due to this, overlapping instruction fetch with instruction
execution increases the processing speed.

11. What are the various interrupts in 8086?

Maskableinterrupts, Non-Maskable interrupts. 256 Software interrupts like
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Divide by zero, single step,nonmaskable interrupts Breakpoint, Overflow interrupt
Software interrupts and Hardware interrupts NMI and INTR.

12. Define bit, byte and word.

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 A digit of the binary number or code is called bit. Also, the bit is the
fundamental storage unit of computer memory. The 8-bit (8-digit) binary number or
code is called byte and 16-bit binary number or code is called word. (Some
microprocessor manufactures refer the basic data size operated by the processor as
word)
13. What is a bus?
Bus is a group of conducting lines that carries data, address and control signals.

14. What is the function of microprocessor in a system?

The microprocessor is the master in the system, which controls all the activity
of the system. It issues address and control signals and fetches the instruction and
data from memory. Then it executes the instruction to take appropriate action.

15. What is REP prefix? How it functions for string instructions?

This REP prefix is used for repeating the instruction with REP prefix will
execute repeatedly till the count in the cx register will be zero. This can be used in
with some of the string handling instructionsgive one example also.

16. Explain the instruction CLD.(Nov 2011)

CLD: this will clear the direction flag.

17. List the various addressing modes present in 8086?

There are 12 addressing modes present in 8086. They are,
(a) Register and immediate addressing
modes Register addressing
modes
Immediate addressing mode
(b)Memory addressing
modes. Direct
addressing modes
Register indirect addressing
modes Based addressing modes
Indexed addressing modes
Based Indexed addressing modes
String addressing modes
(c) I/O addressing modes
Direct addressing mode
Indirect addressing mode
(d)Relative addressing mode
(e) Implied addressing mode

18. What is an assembler directive?(Nov 2011)

Assembler directives are non-executable instruction for 8086 assembler; they
will help the assembler in the execution of a [Link]: assume. Ends, end
and org.

19. What is assembler (April 2009)

The assembler translates the assembly language program text which is given
as input to the assembler to their binary equivalents known as object code. The time
required to translate the assembly code to object code is called access time. The
assembler checks for syntax errors & displays them before giving the object code.

20. Explain ALIGN & ASSUME (Nov 2011)

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 The ALIGN directive forces the assembler to align the next segment at an
address divisible by specified divisor. The format is ALIGN number where number
can be 2, 4, 8 or 16. Example: ALIGN 8. The ASSUME directive assigns a logical
segment to a physical segment at any given time. It tells the assembler what
address will be in the segment registers at execution time. Examples: ASSUME CS:
code, DS: data, SS: stack

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21. What is interrupt service routine?[Nov/Dec 2009,2011]
Interrupt means to break the sequence of operation. While the CPU is
executing a program an interrupt breaks the normal sequence of execution of
instructions & diverts its execution to some other program. This program to which
the control is transferred is called the interrupt service routine.

22. What are Macros? [Nov/Dec 2007]

Macro is a group of instruction. The macro assembler generates the code in
the program each time where the macro is called. Macros are defined by MACRO &
ENDM directives. Creating macro is similar to creating new opcodes that can be used
in the program
INIT MACRO
MOV AX,
data MOV
DS
MOV ES,
AX ENDM

23. What is the use of addressing modes, mention the different types (Nov/Dec 2007)
The various formats of specifying the operands are called addressing modes, it
is used to access the operands or data. The different types are as follows
1) Immediate addressing
2) Register addressing
3) Direct addressing
4) Indirect addressing
5) Implicit addressing

24. What is the need of a flag register in 8086.[Nov/Dec 2009]

It indicates the status of the accumulator. There are 6 one bit flags are present.
They are, AF - Auxiliary Carry Flag
CF - Carry Flag
OF - Overflow
Flag SF - Sign
Flag
PF - Parity Flag
ZF - Zero Flag

25. Define Flags

The flags are used to reflect the data conditions in the accumulator. The 8085
flags are S-Sign flag, Z-Zero flag, AC-Auxiliary carry flag, P-Parity flag, CY- Carry flag

26. Define BIOS. [Nov/Dec 2011,May 2012]

The IBM PC has in its ROM a collection of routines, each of which performs
some specific function such as reading a character from keyboard, writing character
to CRT. This collection of routines is referred to as Basic Input Output System or BIOS

27. Define pipelining? (Nov/Dec 2011)

In 8086, to speed up the execution of program, the instructions fetching and
execution of instructions are overlapped each other. This technique is known as
pipelining. In pipelining, when the n instruction is executed, the n+1 instruction is
fetched and thus the processing speed is increased.

28. Discuss the function of instruction queue in 8086? (Apr/May 2011)

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 In 8086, a 6 -byte instruction queue is presented at the Bus Interface Unit
(BIU). It is used to prefetch and store at the maximum of 6 bytes of instruction code
from the memory. Due to this, overlapping instruction fetch with instruction
execution increases the processing speed.

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29. Name the hardware interrupts of 8086(May/June 2013)
1) Divide by Zero Interrupt(Type 0)
2) Single Step Interrupt (Type 1)
3) Non Maskable Interrupt (Type 2)
4) Breakpoint Interrupt (Type 3) and Overflow Interrupt (Type 4)

30. What is the function of LOCK and RQ/GT signals?(May/June 2013)

LOCK: This signal indicates that an instruction with a LOCK prefix is being executed
and the bus is not to be used by another processor.
RQ/GT1 and RQ/GT0: In the maximum mode, HOLD and HLDA pins are replaced by RQ
(Bus request)/GT0 (Bus Grant), and RQ/GT1 signals.

31. Comparison of Procedure and Macro (Nov/Dec 2012)

Procedure Macro
Accessed by CALL and RET Accessed during assembly with
instruction during name given to macro when
program defined
execution.
Machine code for instructions is
Machine code is generated for
put only once in the memory. instructions each time when
macro is called.
With procedures less memory With macros more memory is
is required. required.
Parameters can be passed in Parameters passed as part
registers, memory locations, of statement which calls
or stack. macro.

32. Explain PTR & GROUP

A program may contain several segments of the same type. The GROUP
directive collects them under a single name so they can reside in a single segment,
usually a data segment. The format is Name GROUP Seg-name,Seg-name PTR is
used to assign a specific type to a variable or a label. It is also used to override the
declared type of a variable.

33. Explain about MODEL

This directive provides short cuts in defining segments. It initializes memory
model before defining any segment. The memory model can be SMALL, MEDIUM,
COMPACT or LARGE. Model Code segments Data segments
Small One One
Medium Multiple
One Compact One
Multiple Large
Multiple Multiple

34. Explain PROC & ENDP

PROC directive defines the procedures in the program. The procedure name
must be unique. After PROC the term NEAR or FAR are used to specify the type of
procedure. Example FACT PROC FAR. ENDP is used along with PROC and defines the
end of the procedure.

35. Explain SEGMENT & ENDS

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 An assembly program in .EXE format consists of one or more segments.
The starts of these segments are defined by SEGMENT and the end of the
segment is indicated by ENDS directive. Format Name SEGMENT Name ENDS

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36. Explain TITLE & TYPE
The TITLE directive helps to control the format of a listing of an assembled
program. It causes a title for the program to print on line 2 of each page of the
program listing. Maximum 60 characters are allowed. Format: TITLE text. TYPE
operator tells the assembler to determine the type of specified variable in bytes. For
bytes the assembler gives a value 1, for word 2 & double word 4.

37. Define variable

A variable is an identifier that is associated with the first byte of data item. In
assembly language statement: COUNT DB 20H, COUNT is the variable.

38. What is the maximum memory size that can be addressed by 8086?
In 8086, an memory location is addressed by 20 bit address and the address
bus is 20 bit address and the address bus is 20 bits. So it can address up to one
mega byte (2^20) of memory space.

39. What is the function of the signal in 8086?

BHE signal means Bus High Enable signal. The BHE signal is made low when
there is some read or writes operation is carried out. I.e. whenever the data bus of
the system is busy.

40. What do you meant by addressing mode.(May/June 2014)

The different ways that processor access data are referred to as addressing
modes.
The addressing modes of any processor can be classified as:
1) Data addressing modes
2) Stack memory addressing modes
3) Program memory addressing modes

41. What is meant by a vectored interrupt? (May/June 2014)

When the external device interrupts the processor, has to execute interrupt
service routine for servicing that interrupt. If the internal control circuit of the
processor produces a CALL to a predetermined memory location, which is the
starting address of interrupt service routine. That address is called vectored
interrupt.

Part-B (16 Marks Questions)

1. Explain the Features of 8086 microprocessor.(Refer Sec.1.1.1)(May/June 2011)

2. Explain the register organization of 8086 processor in detail (Refer Sec 1.2.4)(June
2011)
3. Draw and explain in detail about the architecture of 8086. (Refer Sec.1.2)
(Nov/Dec 2012, 2013, Apr/May 2010)
4. Explain any 8 addressing modes of 8086 processor with an example.(Refer
Sec.1.3) (May/June2011,Apr/May 2011,Nov/Dec 2011)
5. Give an example for 8086 instructions.
String Instructions (Refer Sec 1.13.1),
Bit manipulationinstructions (Refer Sec 1.13.2)
Program Control instruction (Refer Sec 1.4.7) (Nov/Dec 2012)
6. Explain about the any 5 assembler directives. (Refer Sec 1.5)(May/June 2013, 2011,
2010)
7. State important guidelines for 8086 assembly language Programming (Refer Sec
1.6.7)
8. Explain how to access external identifiers. (Refer Sec 1.8.2)
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9. Explain the structure of stack of 8086(Refer Sec 1.9) (Nov/Dec 2007)
[Link] macro. Explain how to pass parameters to macros. (Refer Sec
1.11)(May/June 2010, 2011, 2012)
11. List different types of 8086 hardware interrupt (Refer Sec 1.12.1) (Apr/May 2010,
Nov/Dec 2012)
[Link] and discuss the interrupt vector of 8086. (Refer Sec [Link])(May/June 2014,
2012)

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