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Class-B Power Amplifier Experiment

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23 views4 pages

Class-B Power Amplifier Experiment

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© All Rights Reserved
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Analog Circuits Laboratory VNR VJIET

EXPERIMENT-1 Date:
CLASS-B POWER AMPLIFIER
(COMPLEMENTARY SYMMETRY AMPLIFIER)
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

a. Aim: a. To design class-B Complementary symmetry power amplifier with the observation of
crossover distortion for small signal input.
b. To calculate the theoretical and practical values of max efficiency. {( ηmax)class-B=78.5%}

b. Specification: The maximum efficiency required is 78.5%, which needs to be improved from
class-A Power ampler. Take Vcc=12V, Vss=-12V, use power transistors.

c. Apparatus
Hardware: a. Silicon-NPN-transistor2N6517 Hardware-SL100/CL100
b. Silicon-PNP-transistor2N6520 Hardware-SK100/CK100
c. Resistors RL=4.7KΩ
d. DSO
e. Signal generator, Regulated Power Supply
f. Bread board, Probes, Connecting wires
Software: [Link] Simulator: to verify the functionality of NPN and PNP Transistors
b. NI-Multisim-14.0-desktop app: to calculate circuit parameters

d. Theory:
About Transistors:
a. BC107- BC stands for Buried Channel
b. SL100 or CL100 –NPN (for Hardware)
c. CK100 or SK 100- PNP (for Hardware)
About Power Amplifier:
Class-B Operation: In Class-B operation, each active element (transistor) conducts for only one-
half (180 degrees) of the input signal cycle. Class-B amplifiers are more efficient than Class-A
amplifiers but can introduce distortion, particularly crossover distortion, where there is a gap
between the positive and negative halves of the signal. Complementary symmetry involves using
both NPN (Negative-Positive-Negative) and PNP (Positive-Negative-Positive) transistors in the
amplifier circuit. The NPN and PNP transistors work together to handle both positive and
negative halves of the input signal, providing a balanced and symmetric operation. Combining
these principles results in a Complementary Symmetry Class-B Power Amplifier, where both the
positive and negative halves of the signal are handled by NPN and PNP transistors working in
complementary pairs. This configuration aims to improve efficiency by allowing each type of
transistor to handle the portion of the signal where it operates more efficiently.

e. Schematic: complementary symmetry circuit with distortion in class-B Power amplifier

Figure 1. Zero bias complementary symmetry circuit


Analog Circuits Laboratory VNR VJIET

f. Procedure:
a. Connect the circuit as per the circuit diagram
b. Apply 2 V(p-p) with 1KHz frequency using function generator
c. Observe the output in DSO.
d. Note the cross-over distortion in output. (output Vp-p)
e. Remove the collector connection and put ammeter.
f. Note the IDC value from VCC and VSS
g. Using PDC and Pac formulas find the efficiency

g. Model graphs:

Figure 2. Input and output transient response of power amplifier, with crossover distortion

Figure 3. Input and output transient response of power amplifier, where crossover distortion is neglected
due to large input

h. Observations:
a. The AC input is applied to two transistors. During positive half cycle, NPN transistor conducts
and PNP transistor does not conduct. During the negative half cycle, PNP transistor conducts
and NPN transistor does not conduct.

b. To bring the transistor into active region from the cut off region, the transistor takes the cut
in voltage from the input. Due to this, we get crossover distortion in class-B power amplifier
which is shown in figure 2.

c. To make crossover distortion dominant the input strength is increased to the peak strength
of VDD so as to calculate maximum power dissipation as shown in the figure 3.

d. remaining observations mention here.


Analog Circuits Laboratory VNR VJIET

i. Calculation of circuit Parameters P =I *V =6.81m*12V


DC DC DD
IDC=6.81mA

VRMS=7.40V

P =I *V =6.81m*12
DC DC DD
IDC=6.81mA

Figure 4. Calculations of IDC from VCC and VSS branches to calculate DC input Power

-----------------------------------------------------------------------------------------------------------------------------
𝟏𝟏𝟔𝐦𝐖
Practical calculation of efficiency= % ήMAX = = = 70.7%
𝟏𝟔𝟑.𝟒𝐦𝐖
-----------------------------------------------------------------------------------------------------------------------------
(Input DC power)DC1 = VDD . =12 * IDC=12 * 6.81mA=81.72mW
(Input DC power)DC2 = -VDD. =-12 * IDC=-12 * -6.81mA=81.72mW
Total DC Input Power = PDC1 + PDC1 =81.71mW+81.72mW= 163.4mW

𝐕𝐦 𝐈𝐦 ( ) ( . )
Output AC power: AC power = Vrms *. Irms= ∗ = = =116mW
√ √
-----------------------------------------------------------------------------------------------------------------------------
Theoretical calculation of efficiency =
-----------------------------------------------------------------------------------------------------------------------------
( )( )

% ήMAX = √ √
∗ 100 = ∗ 100 = 78.5% (Where (Vm) max=Vin-Peak=VCC)
.

j. Beyond the content : Modified as Class-AB Power Amplifier for eliminating distortion

Vin

Vout

Figure 5. Class-AB power amplifier to eliminate the distortion for small signal input also
Analog Circuits Laboratory VNR VJIET

Figure-2

Figure-3

Scale:

k. Result:

Signature of the Faculty

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