EXPERIMENT – 8
PRACTICAL OP-AMP APPLICATIONS - II
(SIGNAL PROCESSING CIRCUITS)
8.1 OBJECTIVES:
a) To design and analyze the following signal processing circuits using
operational amplifiers:
Precision Half-Wave Rectifier (HWR)
Precision Full-Wave Rectifier (FWR)
Precision Positive Peak Clipper
Precision Negative Clamper
b) To simulate and verify the circuit performance using LTspice.
c) To construct and test the circuits using a breadboard and appropriate
components.
d) To measure key voltage levels and waveforms using an oscilloscope and
multimeter.
e) To compare measured values with theoretical design values and
simulation results, analyzing discrepancies and identifying potential
sources of error.
f) To document the experimental procedures, results, and observations in
a comprehensive report with schematics, tables, and graphs.
8.2 HARDWARE REQUIRED:
Power Supply: Variable regulated low voltage DC source
Equipment: AFO, DSO, DMM
Resistors: Various as per circuit requirements
Capacitors: As per circuit requirements
Semiconductors: IC741, 1N4001 diode, 5.1V Zener diode
Miscellaneous: Breadboard and wires
8.3 THEORY:
Operational amplifiers (op-amps) combined with diodes form active
diode circuits that can rectify, clip, and clamp signals with greater
precision than passive diode circuits. The major circuits analyzed in this
experiment are:
8.3.1 Precision Half-Wave Rectifier (HWR)
An inverting amplifier can be converted into an ideal half-wave rectifier
by adding two diodes as shown in Fig. 8.2. When Vi is positive, diode D1
conducts causing VOA (output of op-amp) to go negative by one diode
drop (≈ 0.6 V). Hence diode D2 is reverse-biased. The output voltage Vo
is zero, because, for all practical purposes, no current flows through RF
and the input current flows through D1. For negative input, i.e., Vi < 0,
diode D2 conducts and D1 is off. The negative input Vi forces the op-
amp output VOA positive and causes D2 to conduct. The circuit then
acts like an inverter for RF = R1 and output Vo becomes positive.
The op-amp in the circuit of Fig. 8.2 must be a high-speed op-amp
since it alternates between open-loop and closed-loop operations. The
principal limitation of this circuit is the slew rate of the op-amp. As the
input passes through zero, the op-amp output VOA must change from
0.6 V to - 0.6 V or vice-versa as quickly as possible in order to switch
over the conduction from one diode to the other. The circuit of Fig. 8.2
provides a positive output. However, if both the diodes are reversed,
then only a positive input signal is transmitted and gets inverted. The
circuit then provides a negative output.
8.3.2 Precision Full-Wave Rectifier (FWR)
The left side of the circuit in Fig. 8.3 is a precision half-wave rectifier
as in Fig. 8.2, but with the diodes reversed. The right side is an
inverting summing amplifier circuit (as you have done in experiment
7). The input voltage is applied to the terminal a of the summing
amplifier and to the input of the precision rectifier. Note that resistor
R2 in the precision half-wave rectifier circuit has twice the resistance
of R1, so the rectified voltage applied to terminal b of the summing
amplifier is —2Vi, as illustrated.
During the positive half-cycle of the input, the voltage at terminal a is
+Vi, while that at terminal b is -2V. The output from the summing
circuit with R5 = R4 is
During the negative half-cycle of the input, Va = —Vi and Vb = 0.
Consequently, the output is
It is seen that the output is a full-wave rectified version of the input
voltage.
8.3.3 Precision Clipper Circuits:
A clipper circuit, also known as a limiter, is an electronic circuit
designed to prevent a signal from exceeding a predetermined voltage
level. It "clips" off the portion of a waveform above or below a certain
voltage. Clipper circuits use diodes to perform this function, leveraging
the diode's forward voltage drop to conduct and limit the voltage.
Clippers can be classified as:
1. Positive Clippers: These circuits clip off the positive portion of the
input waveform above a certain voltage level.
2. Negative Clippers: These circuits clip off the negative portion of
the input waveform below a certain voltage level.
3. Peak Clippers: These circuits limit both the positive and negative
peaks of the input waveform. This is achieved by clipping both the
positive and negative portions of the waveform at predetermined
voltage levels. Peak clippers are sometimes referred to as combination
clippers or dual clippers.
Fig. 8.4 (a) shows an active positive clipper, a circuit that removes
positive parts of the input signal. The clipping level is determined by
the reference voltage Vref.
8.4
The positive clipper of Fig. 8.4 can be easily converted into a negative
clipper by simply reversing the diode D and changing the polarity of the
reference voltage Vref. The negative clipper clips off the negative parts of
the input signal below the reference voltage.
Peak clippers use back-to-back connected Zener diodes (and sometimes
bias voltages too) to clip off both the positive and negative peaks of the
signal. Fig. 8.5 shows a peak clipper circuit that is basically an inverting
amplifier with a clipping network in the feedback path. The clipping
network consists of two back-to-back Zener diodes (D1 and D2) in series.
This circuit takes an input signal and amplifies it, but the output voltage is
limited (clipped) to the range of -(VZ + VF) to +(VZ + VF).
Fig. 8.5: Peak Clipper Circuit
When the output voltage (Vo) is between the Zener breakdown voltage
(VZ) plus the forward voltage drop of a diode (VF) (i.e., - (Vz+VF) < Vo <
(VZ+VF), both Zener diodes are effectively open circuits. In this region,
the op-amp acts as a standard inverting amplifier.
The gain of the amplifier is approximately -R2/R1. The output voltage is an
amplified and inverted version of the input voltage (Vi).
When the output voltage (Vo) tries to exceed +(VZ + VF), Zener diode D2
breaks down and D1 conducts in the forward direction. This effectively
clamps the voltage at the op- amp's inverting input to a voltage close to
the ground. The op-amp output voltage is limited to VZ + VF. Any further
increase in the input signal will not cause the output to increase beyond
this level.
When the output voltage (Vo) tries to go below -(VZ + VF), Zener diode D1
breaks down and D2 conducts in the forward direction. Again, this clamps
the voltage at the op- amp's inverting input to a voltage close to the
ground. The op-amp output voltage is limited to -(VZ + VF). Any further
decrease in the input signal will not cause the output to decrease beyond
this level.
8.3.4 Precision Clamper
A clamper circuit, also known as a DC restorer, shifts the entire
waveform up or down to a different DC level. An op-amp-based
clamper is designed to achieve this DC shift with higher precision
and control compared to simpler diode-based clampers. The main
purpose of a clamper is to add a DC level to an AC signal. Op-amp
clampers can be classified based on the direction of the DC shift
they introduce:
1. Positive Clamper: This circuit shifts the input waveform upwards,
so the lowest point of the waveform is clamped to a certain voltage
level (ideally 0V, but it can be a different voltage if a reference
voltage is used).
2. Negative Clamper: This circuit shifts the input waveform
downwards, so the highest point of the waveform is clamped to a
certain voltage level.
3. Peak Clamper: A clamper circuit with a variable DC level is shown
in Fig. 8.6 (a). Here, the circuit shifts the entire input waveform
upwards so that its minimum value is at 0V, effectively "clamping"
the waveform to the 0V level or to a different voltage if a reference
voltage is used. Hence, the circuit is called a positive clamper.
The input signal (Vin) is AC-coupled to the circuit through the
capacitor C1. This means that only the AC component of the input
signal passes through; any DC component is blocked. When the
input signal goes negative, the diode D1 becomes forward biased
and conducts. This allows the capacitor C1 to charge up to
approximately the peak negative voltage (-Vp) of the input signal,
minus the diode forward voltage drop (VF). We'll assume VF is
negligible for simplicity.
When the input signal goes positive, the diode D1 becomes reverse-
biased and does not conduct. The capacitor C1 holds its charge
(ideally if we ignore any leakage).
The voltage at the output (Vo) is now the sum of the input voltage
(Vin) and the voltage stored on the capacitor (approximately Vp).
Because the capacitor is charged to approximately the peak
negative voltage (-Vp) of the input, the output voltage (Vo) is shifted
upwards by this amount. The lowest point of the output waveform is
clamped to approximately 0V (ideally, but it will be slightly more
due to the diode drop).
The op-amp is configured as a non-inverting buffer. Its purpose is to
provide a high input impedance and a low output impedance. This
prevents the load (RL) from discharging the capacitor C1, which
would disrupt the clamping action. The non-inverting configuration
isolates the clamping circuit from the load, ensuring it functions
properly. For precision clamping C1Rd<<T/2, where Rd is the
forward resistance of the diode D1 (100 typically) and T is the time
period of Vin. The input and output waveforms are shown in Fig. 8.6
(b, c C d).
A peak clamper (also known as a DC restorer) is a circuit that shifts
an AC signal so that either its positive or negative peak is clamped
to a specific DC voltage level. The circuit of a peak clamper is
depicted in Fig. 8.7, and it’s an example of a negative peak clamper,
where the negative peak is clamped to near 0V.
The input
signal (Vi) is AC-coupled to the circuit through capacitor C1. The op-amp is
configured to act as a comparator, controlling the conduction of diodes D1
and D2. It compares the voltage at its inverting input (derived from the
output voltage and the voltage across C1 with the voltage at its non-
inverting input (which is effectively ground due to R2). The resistors R1
and R2 provide negative feedback, stabilizing the circuit.
When the input signal (Vi) goes positive, the voltage at the inverting input
of the op- amp tends to go more positive (because the op-amp inverting
input is connected to the output through resistor R1) with respect to the
grounded non-inverting input terminal. This causes the op-amp output to
go negative (-VEE). This forward biases diode D2 and reverse biases D1.
Now, the negative feedback via D2 and R1 keeps the op-amp inverting
input terminal close to 0 V (or within microvolts of the ground level). So,
the circuit output is held close to ground level (Vo = 0 V). This causes C1
to charge to the positive peak value of the input signal Vi.
When the input signal (Vi) goes negative, the voltage at the inverting
input of the op- amp tends to go negative with respect to the grounded
non-inverting input terminal. This causes the op-amp output to go positive
(+VCC). This forward biases diode D1 and reverse biases D2. Now, the
negative feedback via D1 keeps the op-amp inverting input terminal close
to 0 V (or within microvolts of the ground level). With D2 reverse biased,
the circuit output is connected to the circuit input via C1 (which is already
charged to the positive peak value of the input signal), giving an output of
Thus, the input waveform is reproduced at the output with its upper level
clamped precisely at the ground. That is, the output waveform is a replica
of the input waveform, but shifted downwards so that its positive peak is
clamped to 0V. The entire signal is now below 0V. The signal is "riding" on
a DC level equal to the peak voltage.
8.4 CIRCUIT DESIGN
8.6.1. Precision Half-Wave Rectifier Design a non-saturating
precision half-wave rectifier (as in Fig. 8.2) to produce a 2 V peak output
from a 100 Hz sine wave input with a 0.5 V peak value. Use a bipolar op-
amp with a supply voltage of ±15 V.
Solution Select I1 = 500 µA (for adequate diode current)
8.4.1. Precision Full-Wave
Rectifier Design a precision
full-wave rectifier (as in Fig.
8.3) to produce a 2 V peak output from a 100 Hz sine wave input with a
0.5 V peak value. Use a bipolar op-amp with a supply voltage of ±15 V.
8.4.2 Precision Clipper Circuit Design an adjustable peak clipping
circuit (as in Fig. 8.5) to clip at approximately ±5.9 V. The circuit is to have
unity voltage gain before clipping. Use a bipolar op-amp with a supply
voltage of ±15 V.
8.4.2. Precision Clamper Circuit A ±5 V, 10 KHz sine / square wave
from a signal source with a resistance of 50 Ω is to have its positive peak
clamped precisely at ground level. The circuit is to have unity voltage gain
before clipping. Design a suitable clamping circuit as in Fig. 8.7. Use a
bipolar op amp with a supply voltage of ±15 V.
8.5 TABLE CALCULATIONS:
TABLE 1: Measurements for HWR and FWR Circuits: Expected vs. Measured Values
TABLE 2: Measurements for Clipper and Clamper Circuits: Expected vs. Measured Values
8.5 RESULTS
1. The measured output voltage of the precision half-wave rectifier
(HWR) closely matched the theoretical value of 2V. Minor variations
were observed due to diode switching characteristics and op-amp
offset voltages.
2. The precision full-wave rectifier (FWR) successfully converted both
positive and negative halves of the input signal into a unipolar
waveform. The measured output voltage was 2V, consistent with
theoretical predictions.
3. The clipper circuit effectively limited the output voltage at ±5.9V, as
expected. Small deviations were attributed to Zener diode tolerances
and op-amp response time.
4. The clamper circuit accurately shifted the waveform to the required
DC level, clamping the negative peak at 0V. The response time
depended on the capacitor value, confirming the theoretical design
considerations.
8.7 DISCUSSION
1. The precision rectifier circuits demonstrated their ability to rectify
low-level signals without the voltage drop typically associated with
diodes. The measured results closely followed theoretical values,
confirming their application in accurate signal processing.
2. The clipper circuit successfully clipped signal peaks at ±5.9V,
validating the role of Zener diodes in voltage limitation. The slight
variations in clipping levels were due to component tolerances.
3. The clamper circuit correctly shifted the waveform to the expected
DC level, showing that capacitor selection significantly impacts
performance.
4. The experimental values were validated against theoretical and
simulation results, with minor deviations attributed to practical
limitations of op-amps and components.
5. The output waveforms observed on the oscilloscope closely
matched the expected responses, confirming the accuracy of the
circuit design and theoretical analysis.